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19-1331; Rev 1; 6/98
KIT ATION EVALU ILABLE AVA
Upstream CATV Driver Amplifier
____________________________Features
o Single +5V Supply o Output Level Ranges from Less than 8dBmV to 62dBmV, in 1dB Steps o Gain Programmable in 1dB Steps o 350mW Typical Power Dissipation o Transmit-Disable Mode o Two Shutdown Modes
________________General Description
The MAX3532 is a programmable power amplifier for use in upstream cable applications. The device outputs up to 62dBmV (continuous wave) through a 1:2 (voltage ratio) transformer when driven with 36dBmV at its input. It features variable gain, which is controlled via a 3-wire digital serial bus and available in 1dB steps. The operating frequency ranges from 5MHz to 42MHz. The MAX3532 offers three operating modes: high power, low noise, and transmit disable. High-power mode achieves the highest output levels, while low-noise mode achieves the lowest output noise when driving lower output levels. Transmit disable mode places the device in a high-isolation state with minimum output noise, for use between bursts in TDMA systems. Two power-down modes are also available. Software shutdown mode permits power-down of all analog circuitry while maintaining the programmed gain setting. Shutdown mode disables all circuitry and reduces current consumption below 10A. The MAX3532 comes in a 36-pin SSOP package screened for the extended-industrial temperature range (-40C to +85C).
MAX3532
_______________Ordering Information
PART MAX3532EAX TEMP. RANGE -40C to +85C PIN-PACKAGE 36 SSOP
___________________Pin Configuration
TOP VIEW
________________________Applications
Cable Modems CATV Set-Top Box Telephony over Cable
GND 1 GND 2 GND 3 GND 4 GND 5 GND 6
36 SHDN 35 TXEN 34 VOUT33 VOUT+ 32 GND
__________Typical Operating Circuit
36 CONTROL LOGIC 35 1-10, 12, 13, 15-17, 21-25, 32 TXEN VOUT+ GND 33 8.0 SHDN VOUT34 8.0 1:2 OUTPUT
MAX3532
31 VEE2 30 VCC2 29 VCC 28 VIN+ 27 VIN26 VEE 25 GND 24 GND 23 GND 22 GND 21 GND 20 SCLK 19 SDA
GND 7 GND 8 GND 9 GND 10 VEE1 11
MAX3532
INPUT 0.001F 28 27 0.001F VIN+ VIN-
VEE2
31 0.1F
GND 12 GND 13
VCC VCC 0.1F
VCC2 VCC VEE
30 29
VCC1 14 GND 15 GND 16 GND 17
26 20 19 18 CONTROL LOGIC
VCC 0.1F
14 V 1 CC 11 V 1 EE
SCLK SDA CS
CS 18
SSOP
Protected under U.S. Patent 5,748,027 ________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
Upstream CATV Driver Amplifier MAX3532
ABSOLUTE MAXIMUM RATINGS
VCC ........................................................................-0.5V to +7.0V Input Voltage Levels (all inputs) .................-0.3V to (VCC + 0.3V) Continuous RMS Input Voltage (VIN+, VIN-) ..................60dBmV Continuous Current (VOUT+, VOUT-)...............................100mA Continuous Power Dissipation (TA = +70C) 36-Pin SSOP (denote at 11mW/C above +70C) ........900mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, no RF applied, TA = -40C to +85C, unless otherwise noted.) PARAMETER Supply Voltage Supply Current Software Shutdown Current Shutdown Current Digital Input High Voltage Digital Input Low Voltage Digital Input High Current Digital Input Low Current SYMBOL VCC ICC ICC ICC VIH VIL IIH IIL TXEN = 1, SHDN = 1, D7 and D6 = 1X or 01 TXEN = X, SHDN = 1, D7 and D6 = 00 TXEN = X, SHDN = 0, D7 and D6 = XX CS, SDA, SCLK, TXEN, SHDN CS, SDA, SCLK, TXEN, SHDN CS, SDA, SCLK, TXEN, SHDN CS, SDA, SCLK, TXEN, SHDN -100 2.4 0.8 100 CONDITIONS MIN 4.75 75 1.5 0.1 TYP MAX 5.25 95 2 10 UNITS V mA RMS mA A V V A A
AC ELECTRICAL CHARACTERISTICS
(VCC = +5V, VIN = 36dBmV, SHDN = TXEN = 1, fIN = 20MHz, ZLOAD = 75 through a 1:2 transformer with two precision 8.0 backtermination resistors, TA = -40C to +85C, unless otherwise noted. Typical values are measured at TA = +25C.) PARAMETER Output Signal Swing Voltage Gain Output Step Size Isolation in Standby Mode Two-Tone Third-Order Distortion (Note 1) Second Harmonic Distortion (Note 1) Third Harmonic Distortion (Note 1) AM to AM AM to PM Output Noise (High-Power Mode) (Note 1) IMR3 HD2 HD3 AMAM AMPM TXEN = 0, fIN = 42MHz, VOUT = 58dBmV Two input tones at 40MHz and 40.25MHz, both at 30dBmV; VOUT = 52dBmV per tone fIN = 20MHz, VOUT = 52dBmV fIN = 20MHz, VOUT = 58dBmV fIN = 14MHz, VOUT = 52dBmV fIN = 14MHz, VOUT = 58dBmV VIN = 36dBmV to 40dBmV, AV = 22dB VIN = 36dBmV to 40dBmV, AV = 22dB D7 and D6 = 11, BW = 160kHz, VOUT = 46dBmV to 62dBmV, f = 5MHz to 42MHz SYMBOL VTXOUT AV High power, D7-D0 = 11111101 Low noise, D7-D0 = 1001000 24 CONDITIONS MIN TYP 3.6 26 -32 1 36 -43 -59 -46 -67 -57 0.1 1 -80 -79 -37.5 -55 -40 -58 -48 -28 MAX UNITS Vp-p dB dB dB dBc dBc dBc dB degrees dBc
2
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Upstream CATV Driver Amplifier
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, VIN = 36dBmV, SHDN = TXEN = 1, fIN = 20MHz, ZLOAD = 75 through a 1:2 transformer with two precision 8.0 backtermination resistors, TA = -40C to +85C, unless otherwise noted. Typical values are measured at TA = +25C.) PARAMETER Output Noise (Low-Power Mode) Output Noise (Note 1) (Standby Mode) (Note 1) Output Noise (Standby Mode) (Note 1) Output Return Loss (Note 1) TXEN Transient Duration TXEN Transient Step Size Power-Enable Transient Duration (Note 1) SERIAL INTERFACE CS to SCLK Setup Time CS to SCLK Hold Time SDA to SCLK Setup Time SDA to SCLK Hold Time SCLK Pulse Width High SCLK Pulse Width Low tCSS tCSH tSDAS tSDAH tSCLKH tSCLKL (Note 1) (Note 1) (Note 1) (Note 1) (Note 1) (Note 1) 20 20 20 20 50 50 ns ns ns ns ns ns SYMBOL CONDITIONS D7 and D6 = 10, VOUT > 27dBmV, BW = 160kHz, f = 5MHz to 42MHz D7 and D6 = 10, VOUT 27dBmV, BW = 160kHz, f = 5MHz to 42MHz TXEN = 0, BW = 160kHz, f = 5MHz to 42MHz fIN = 5MHz to 42MHz TXEN rise/fall time < 100ns, TA = +25C (Note 1) TA = +25C, AV = 22dB (Note 1) TA = +25C 1 12 3 25 2.5 7 100 5 MIN TYP -75 -47 -47 MAX -73 -45 -45 UNITS dBc dBmV dBmV dB s mV s
MAX3532
Note 1: Guaranteed by design and characterization.
__________________________________________Typical Operating Characteristics
(VCC = 5.0V, VIN = 36dBmV, fIN = 20MHz, SHDN = TXEN = 1, ZLOAD = 75 through a 1:2 transformer with two precision 8.0 backtermination resistors, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX3532toc01
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX3532toc02
SUPPLY CURRENT vs. OUTPUT LEVEL
95 SUPPLY CURRENT (mA) 90 85 80 75 70 65 60
MAX3532toc03
85 VCC = 5.25V 80 SUPPLY CURRENT (mA)
90 85 SUPPLY CURRENT (mA) 80 TA = +25C 75 70 TA = -40C 65 60 TA = 0C TA = +85C
100
75
70 VCC = 5.0V VCC = 4.75V 60 -40 -20 0 25 50 85 TEMPERATURE (C)
65
4.75
5 SUPPLY VOLTAGE (V)
5.25
12 16 21 26 31 36 41 45 50 55 59 64 OUTPUT LEVEL (dBmV)
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3
Upstream CATV Driver Amplifier MAX3532
_____________________________Typical Operating Characteristics (continued)
(VCC = +5V, VIN = 36dBmV, SHDN = TXEN = 1, fIN = 20MHz, ZLOAD = 75 through a 1:2 transformer with two precision 8.0 backtermination resistors, TA = -40C to +85C, unless otherwise noted. Typical values are measured at TA = +25C.)
GAIN vs. FREQUENCY
MAX3532toc04
OUTPUT NOISE vs. GAIN STATE
MAX3532toc05
OUTPUT LEVEL vs. GAIN STATE
60 OUTPUT LEVEL (dBmV) 50 40 30 20 10 LOW-NOISE MODE
MAX3532toc06
40 30 20 GAIN (dB) 10 0 -10 -20 -30 -40 0 20 40 60 80 100 120 140 FREQUENCY (MHz) 54 48 60 54 48 42 36 30 24 18 HIGH-POWER MODE LOW-NOISE MODE 57 GAIN STATE 60
-10 OUTPUT NOISE IN 160kHz (dBmV) -15 -20 -25 -30 -35 -40 -45 -50 LOW-NOISE MODE HIGH-POWER MODE
70 HIGH-POWER MODE
0 -10 0 5 10 15 20 25 30 35 40 45 50 55 60 GAIN STATE
5 10 15 20 25 30 35 40 45 50 55 60 GAIN STATE
REAL AND IMAGINARY INPUT IMPEDANCE vs. FREQUENCY
10,000 8000 IMPEDANCE () IMPEDANCE () 6000 4000 2000 0 -2000 -4000 -6000 0 20 40 60 80 100 FREQUENCY (MHz) 0 5 IMAGINARY REAL 80 60 40 20
MAX3532toc07
REAL AND IMAGINARY OUTPUT IMPEDANCE vs. FREQUENCY
MAX3532toc08
12,000
120 100
REAL
IMAGINARY 10 20 30 40 50 75 100
FREQUENCY (MHz)
SECOND HARMONIC DISTORTION vs. INPUT FREQUENCY
MAX3532toc09
THIRD HARMONIC DISTORTION vs. INPUT FREQUENCY
-35 HARMONIC DISTORTION (dBc) -40 -45 -50 -55 -60 -65 -70 VOUT = 40dBmV VOUT = 25dBmV VOUT = 55dBmV VOUT = 52dBmV
MAX3532toc10
-30 -35 HARMONIC DISTORTION (dBc) -40 -45 -50 -55 -60 -65 -70 10 15 20 VOUT = 40dBmV 25 30 35 40 45 VOUT = 25dBmV VOUT = 55dBmV
-30
-75 50 10 15 20 25 30 35 40 45 50 INPUT FREQUENCY (MHz)
INPUT FREQUENCY (MHz)
4
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Upstream CATV Driver Amplifier
______________________________________________________________Pin Description
PIN 1-10, 12, 13, 15, 16, 17, 21-25, 32 11 14 18 19 20 26 NAME GND Ground Pins Serial Data Interface Ground. As with all grounds, maintain the shortest possible (low-inductance) connections to the ground plane. Serial Data Interface +5V Supply. Bypass this pin with a 0.1F decoupling capacitor as close to the part as possible. Serial-Interface Enable. TTL-compatible input. See Serial Interface section. Serial-Interface Data. TTL-compatible input. See Serial Interface section. Serial-Interface Clock. TTL-compatible input. See Serial Interface section. Programmable Gain Amplifier (PGA) Ground. As with all grounds, maintain the shortest possible (low-inductance) connection to the ground plane. Negative Input. When not used, this port must be AC coupled to ground. Along with VIN+, this port forms a high-impedance differential input to the PGA. Driving this port differentially will increase the rejection of second-order distortion. Positive Input. Along with VIN-, this port forms a high-impedance differential input to the PGA. Driving this port differentially will increase the rejection of second-order distortion. AC couple to this pin. PGA +5V Supply. Bypass this pin with a decoupling capacitor as close to the part as possible. Power Amplifier +5V Supply. Bypass this pin with a decoupling capacitor as close to the part as possible. Power Amplifier Ground. As with all grounds, connections maintain the shortest possible (low-inductance) length to the ground plane. Positive Output. Along with VOUT-, this pin forms a low-impedance output. Typically this port drives a 1:2 transformer through 8 series resistors. Negative Output. Along with VOUT+, this pin forms a low-impedance output. Typically this port drives a 1:2 transformer through 8 series resistors. Transmit Amplifier Enable. Setting this pin low places the transmitter in a high-isolation state (transmit disable mode). In this mode, however, significant common-mode voltage swings exist. It is, therefore, important to maintain good balance of the differential output through to the transformer primary. Shutdown. When this pin is set low, all functions (including the serial interface) are disabled, leaving only leakage currents to flow. FUNCTION
MAX3532
VEE1 VCC1 CS SDA SCLK VEE
27
VIN-
28 29 30 31 33 34
VIN+ VCC VCC2 VEE2 VOUT+ VOUT-
35
TXEN
36
SHDN
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5
Upstream CATV Driver Amplifier MAX3532
Shutdown Mode
SHDN BIAS
MAX3532
VIN+ VINPGA
VOUT-
In normal operation the shutdown pin (SHDN) is driven high. When SHDN is asserted low, all circuits within the IC are disabled. Only leakage currents flow in this state. Data stored within the serial-data interface latches will be lost upon shutting down the part.
TXEN
Transmit-Disable Mode
VOUT+ SERIAL-DATA INTERFACE
CS
SDA
SCLK
When the TXEN pin is asserted high, the device is in transmit mode. When TXEN is driven low, the transmit amplifier switches to common-mode operation and the output signal appears at the output pins VOUT+ and VOUT- with the same phase. These identical signals cancel within the output transformer core, providing high isolation from input to output. Optimum isolation is achieved in low-noise mode with a low gain setting.
Figure 1. Functional Diagram
Serial Interface
_______________Detailed Description
The following sections describe the blocks shown in the Functional Diagram (Figure 1).
Programmable-Gain Amplifier
The MAX3532's processing path is made up of the programmable-gain amplifier (PGA) and the transmit power amplifier, which together provide better than 64dB of output level control in 1dB steps. The PGA is implemented as a programmable Gilbert cell attenuator. It uses a differential architecture to achieve maximum linearity. When it is driven single ended, specified performance is achieved given that the unused input is decoupled to ground. The gain of the PGA is determined by the serial-data interface. See Table 2.
The serial interface has an active-low enable (CS) to bracket the data, with data clocked in MSB first on the rising edge of SCLK. Data is stored in the storage latch on the rising edge of CS. The serial interface controls the state of the PGA and output amplifier. The register format is shown in Tables 1 and 2. Serial-interface timing is shown in Figure 2.
Transmit Power Amplifier
The transmit power amp is capable of driving +8dBmV to +62dBmV differentially when driven with +36dBmV. To achieve the necessary swing from a single +5V supply, an external 1:2 transformer must be used. The output of the transmit power amplifier is a very low-impedance emitter follower, which requires two 8 series termination resistors to achieve adequate output return loss. The power amplifier's gain is set via the serial-data interface. The transmit power amplifier has a switchable +16dB or +0dB gain to achieve high linearity or low noise, respectively. High-gain mode sets the power amp's gain to +16dB, allowing for the highest output signal swings. Low-noise mode sets the gain to 0dB, which achieves the lowest output noise.
Transmit Modes The hardware TXEN line is ANDed with software bit D7, so both TXEN and D7 must be high to transmit. Bit D6 governs whether the device is set to high-gain mode (D6 = 1) or to low-noise mode (D6 = 0). High-power mode should be used for output levels above 45dBmV. This transition point optimizes the MAX3532's distortion performance, but either mode may be used throughout the full complement of programmed gain states. Bits D5-D0 define 64 PGA gain states, nominally 1dB each.
Table 1. Serial-Interface Control Words
BIT MSB 7 6 5 4 3 2 1 LSB 0 MNEMONIC D7 D6 D5 D4 D3 D2 D1 D0 DESCRIPTION Chip-State Control MSB Chip-State Control LSB Gain Control, Bit 5 Gain Control, Bit 4 Gain Control, Bit 3 Gain Control, Bit 2 Gain Control, Bit 1 Gain Control, Bit 0
6
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Upstream CATV Driver Amplifier MAX3532
Table 2. Chip-State Control Bits
TXEN 1 1 X 0* X 1 1 -- 1 1 D7 1 1 0 X 0 1 1 1 1 1 D6 1 0 1 X 0 0 0 -- 1 1 D5 X X X X 0 0 -- 1 1 D4 X X X X 0 0 -- 1 1 D3 X X X X 1 1 -- 0 0 D2 X X X X 1 1 -- 1 1 D1 X X X X 0 1 -- 0 1 D0 X X X X 1 0 -- 1 0 STATE High-power transmit Low-noise transmit; subtract 16dB from VOUT Transmit disabled All analog circuitry off VOUT = +8dBmV VOUT = +9dBmV -- VOUT = +56dBmV VOUT = +57dBmV
*Except state 000XXXXXX, which is software shutdown.
A
B
C
D
E
F
D7
D6 A: tCSS B: tSDAS
D5
D4
D3
D2
D1
D0 E: tSCKH F: tCSH
C: tSDAH D: tSCKL
Figure 2. Serial-Interface Timing Diagram
Software Shutdown Mode Software-shutdown mode is enabled when both D7 and D6 are low (D7, D6 = 00). This mode minimizes current consumption while maintaining the programmed gain state stored in the serial data-interface's latch. All analog functions are disabled in this mode.
__________Applications Information
Output Match
The MAX3532's output circuit is a differential emitter follower that has a near-zero impedance over the operating frequency range. In order to match to a singleended impedance, a transformer and back-termination resistors are required. Furthermore, operation from a single +5V supply requires that the output signal swing be stepped up to achieve the rated output levels. These are described in the next two sections.
Transformer To achieve the rated output levels, a 1:2 (voltage ratio) transformer is required. This transformer must have adequate bandwidth to cover the intended application. Note that most RF transformers specify a bandwidth with a 50 load on the primary and a matching resistance on the secondary winding. The much lower (approximately 16 due to the back-termination resistors) impedance of the MAX3532's output will tend to shift the low-frequency edge of the bandwidth specification down by a factor of three or more due to primary inductance. Keep this in mind when specifying a transformer. RF transformer cores are inherently nonlinear devices, which must be operated in their linear region if distortion is a critical consideration. In general, the size of the transformer core used and the number of turns will govern the distortion performance of the transformer for a given output level. Therefore a transformer of adequate size must be used to minimize its contribution to the overall distortion budget. Back-Termination Resistors The value of the back-termination resistors depends on two parameters: the ultimate output impedance (as referred through the output transformer), and the quality of the output match desired. The output impedance depends on the value of the termination resistors by the following formula: ZOUT = 4 x [ 2 x (Rterm + RP)] where Rterm is the value of one termination resistor and RP is parasitic resistance.
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7
Upstream CATV Driver Amplifier
Some allowance must be made for parasitic inductance in the transformer as well as on the printed circuit board. Therefore, choose a resistance value lower than a perfect match. Two 8.0 resistors will provide a nearoptimum match. If the output match is less than critical, the back-termination resistors can be set to a lower value. This will extend the upper limit of the output level range (by dropping less voltage across the resistors and more across the load), and may improve distortion performance for a given output level.
MAX3532
Since the MAX3532 has a low-impedance output, the output traces must also be kept as short as possible, as small amounts of inductance can have an impact at higher frequencies. The back-termination resistors should be kept as close to the device as possible.
Layout Issues
A well designed printed circuit board is an essential part of an RF circuit. For best performance pay attention to power-supply layout issues, as well the output circuit layout.
Output Circuit Layout The differential implementation of the MAX3532's output has the benefit of significantly reducing even-order distortion, the most significant of which is second-harmonic distortion. The degree of distortion cancellation depends on the amplitude and phase balance of the overall circuit. It is critical that the traces leading from the output pins be exactly the same length.
Power-Supply Layout For minimal coupling between different sections of the IC, the ideal power-supply layout is a star configuration. This configuration has a large valued decoupling capacitor at the central V CC node. The V CC traces branch out from this node, each going to a separate VCC node in the MAX3532 circuit. At the end of each of these traces is a decoupling capacitor that provides a very low impedance at the frequency of interest. This arrangement provides local VCC decoupling at each VCC pin. The traces leading from the supply to VCC (pin 29) and VCC2 (pin 30) must be made as thick as practical to keep resistance well below 1.
Ground inductance degrades distortion performance. Therefore, ground plane connections to VEE (pin 26) and VEE2 (pin 31) should be made with multiple vias if possible.
Chip Information
TRANSISTOR COUNT: 1100
________________________________________________________Package Information
SSOP2.EPS
8
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