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DS21Q348DK
3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
www.maxim-ic.com
GENERAL DESCRIPTION
The DS21Q348 design kit is an evaluation board for the DS21Q348 3.3V E1/T1/J1 line interface. The DS21Q348DK is intended to be used as a daughter card with either the DK2000 or the DK101 motherboards. The board comes complete with a line interface unit (LIU), transformers, termination resistors, configuration switches, network connectors, and an interface to the motherboard.
FEATURES

Expedites New Designs by Eliminating First-Pass Prototyping Interfaces Directly to the DK101 or DK2000 Motherboards Demonstrates Key Functions of the DS21Q348 High-Level Software Provides Visual Access to Registers Software-Controlled (Register Mapped) Configuration Switches to Facilitate Clock and Signal Routing BNC Connections for 75W E1 Bantam and RJ48 Connectors for 120W E1 and 100W T1 Multitap Transformer Facilitates True Impedance Matching for 75W and 120W/100W Paths
ORDERING INFORMATION
PART DS21Q348DK DESCRIPTION DS21Q348 (Quad BGA) Design Kit
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DS21Q348DK 3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
COMPONENT LIST
DESIGNATION 1 C1, C2, C6, C10, C12, C22, C24 C13-C16 C17-C20 C3-C5, C7, C8, C11, C21, C23, C25, C26 C9 DS1-DS5 J1, J6-J13 J14 J15, J16 J2 J3-J5 R17, R20, R21, R25, R28-R36, R53 R18, R19, R22-R24, R26, R27 R1-R16, R37-R41, R54-R57 R42, R43 R44-R51 T1-T4 U1 QTY 1 7 4 4 10 1 5 9 1 2 1 -- 14 7 25 2 8 4 1 DESCRIPTION 3.3V E1/T1/J1 line interface, 0C to +70C, 144-pin BGA 0.47mF 10%, 25V ceramic capacitors (1206) 0.1mF 10%, 25V ceramic capacitors (1206) 1mF 10%, 16V ceramic capacitors (1206) 0.1mF 10%, 16V ceramic capacitors (0603) 10mF 20%, 16V tantalum capacitors (B case) LED, red, SMD Right-angle, 5-pin BNC connectors Right-angle RJ45, 8-pin, 4-port jack 50-pin, dual row, vertical SMD sockets 10-pin, dual row, vertical connector 8-row by 2-column pin strip, 0.1" centers, 0.025" post 10kW 1%, 1/10W resistors (0805) 51.1W 1%, 1/10W resistors (0805) 0W 5%, 1/8W resistors (1206) 1.0kW 1%, 1/10W resistors (0805) 61.9W 1%, 1/8W resistors (1206) XFMR, dual, 16-pin SMT Xilinx CPLD 72 macrocell, 100-pin TQFP, 3.3V SUPPLIER Dallas Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Kruvand Molex Samtec Digi-Key NA Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Pulse Engineering Avnet PART DS21Q348 PCC1891CT-ND PCC1883CT-ND PCC1882CT-ND 311-1088-1-ND PCS3106CT-ND P500CT-ND UCBJR220 43223-8140 TFM-125-02-S-D-LC S2012-05-ND Lab Stock P10.0KCCT-ND P51.1CCT-ND P0.0ETR-ND P1.00KCCT-ND P61.9FCT-ND TX1099 XC95142XL10TQ100C
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DS21Q348DK 3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
BASIC OPERATION
Hardware Configuration
Using the DK101 Processor Board: * Connect the daughter card to the DK101 processor board. * Supply 3.3V to the banana-plug receptacles marked GND and VCC_3.3V. (The external 5V connector is unused. Additionally, the TIM 5V supply headers are unused.) * All processor-board DIP switch settings should be in the ON position with the exception of the flashprogramming switch, which should be OFF. * From the Programs menu launch the host application named ChipView.exe. Run the ChipView application. If the default installation in options were used, click the Start button on the Windows toolbar and select Programs(R)ChipView(R)ChipView. Using the DK2000 Processor Board: * Connect the daughter card to the DK2000 processor board. * Connect J1 to the power supply that is delivered with the kit. Alternately, a PC power supply can be connected to connector J2. * From the Programs menu launch the host application named ChipView.exe. Run the ChipView application. If the default installation in options were used, click the Start button on the Windows toolbar and select Programs(R)ChipView(R)ChipView. General: * Upon power-up, the RCL LEDs are lit, and the INT LED is off. * After power-up, the RCL LEDs extinguish upon external loopback. * Due to the dual winding transformer, only the 120W line build-out configuration setting is needed to cover 75W E1 and 120W E1.
Quick Setup (Register View)
* * * * The PC loads the program, offering a choice between DEMO MODE, REGISTER VIEW, and TERMINAL MODE. Select Register View. The program requests a definition file. Select DS21Q348DK02A0_CPLD.DEF. The Register View Screen appears, showing the register names, acronyms, and values. Note the CPLD def file contains a link such that the def file for the DS21Q348 is also loaded. Selection among the def files is accomplished using the drop-down box on the right-hand side of the program window. From the drop-down box select the DS21Q348 def file and configure register CCR3 of ports 1 through 4 with a 90h. - The device begins transmitting a pseudorandom bit sequence. Upon external loopback, the RCL LED extinguishes, denoting that the device has found a carrier and has successfully decoded the pseudorandom bit sequence. For more advanced configurations, please refer to the DS21Q348 data sheet.
Miscellaneous: * Clock frequencies are provided by a register-mapped CPLD, which is on the DS21Q348 daughter card. * The definition file for this CPLD is named DS21Q348DK02A0_CPLD.def. See CPLD Register Map definitions.
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DS21Q348DK 3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
ADDRESS MAP
The DK101 daughter card address space begins at 0x81000000. The DK2000 daughter card address space begins at: 0x30000000 for slot 0 0x40000000 for slot 1 0x50000000 for slot 2 0x60000000 for slot 3 All offsets in the Daughter Card Address Map table are relative to the beginning of the daughter card address space.
Daughter Card Address Map
OFFSET 0X0000 to 0X0015 0X2000 to 0X2015 0X3000 to 0X3015 0X4000 to 0X4015 0X5000 to 0X5015 DEVICE CPLD LIU Port 1 LIU Port 2 LIU Port 3 LIU Port 4 FUNCTION Board ID, clock and signal routing Board is populated with either the DS21Q348 or the DS21448. Please see the factory data sheet for details.
Registers in the CPLD can be easily modified using ChipView, a host-based user-interface software, with the definition file named DS21Q348DK02A0_cpld.def. This file is included as part of the design kit documentation download (accessed through the DS21Q348's quick view data sheet). The definition file for the LIU is named DS21Q348.def.
CPLD Register Map
OFFSET 0X0000 0X0001 0X0002 0X0003 0X0004 0X0005 0X0006 0X0007 0X0011 0X0012 0X0013 0X0014 0X0015 REGISTER BID -- XBIDH XBIDM XBIDL BREV AREV PREV MCLK_SRC TCLK1_SRC TCLK2_SRC TCLK3_SRC TCLK4_SRC TYPE Read-Only -- Read-Only Read-Only Read-Only Read-Only Read-Only Read-Only Read-Write Read-Write Read-Write Read-Write Read-Write FUNCTION Board ID Unused High Nibble Extended Board ID Middle Nibble Extended Board ID Low Nibble Extended Board ID Board FAB Revision Board Assembly Revision PLD Revision MCLK Source Register TCLK1 Source Register TCLK2 Source Register TCLK3 Source Register TCLK4 Source Register
ID Registers
OFFSET 0X0000 0X0002 0X0003 0X0004 0X0005 0X0006 0X0007 NAME BID XBIDH XBIDM XBIDL BREV AREV PREV FUNCTION Board ID. BID is read-only with a value of 0xD. High Nibble Extended Board ID. XBIDH is read-only with a value of 0x00. Middle Nibble Extended Board ID. XBIDM is read-only with a value of 0x02. Low Nibble Extended Board ID. XBIDL is read-only with a value of 0x00. Board FAB Revision. BREV is read-only and displays the current fab revision. Board Assembly Revision. AREV is read-only and displays the assembly revision. PLD Revision. PREV is read-only and displays the current PLD firmware revision.
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DS21Q348DK 3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
Control Registers
The control registers are used set the clock frequency on the MCLK and TCLK pins. Options are 1.544MHz, 2.048MHz, external source (through AUX CLK BNC), and tri-state. MCLK_SRC: MCLK SOURCE (OFFSET = 0x0011) INITIAL VALUE = 0x1
(MSB) -- NAME HI_Z EXTOSC 2048MHZ 1544MHZ -- -- POSITION MCLK_SRC.3 MCLK_SRC.2 MCLK_SRC.1 MCLK_SRC.0 -- HI_Z EXTOSC FUNCTION 1 = Tri-state MCLK. 1 = Connect MCLK to the external oscillator. 1 = Connect MCLK to the 2.048MHz clock. 1 = Connect MCLK to the 1.544MHz clock. 2048MHZ (LSB) 1544MHZ
TCLK1_SRC: TCLK SOURCE (OFFSET = 0x0012) INITIAL VALUE = 0x1
(MSB) -- NAME HI_Z EXTOSC 2048MHZ 1544MHZ -- -- POSITION TCLK1_SRC.3 TCLK1_SRC.2 TCLK1_SRC.1 TCLK1_SRC.0 -- HI_Z EXTOSC FUNCTION 1 = Tri-state TCLK1. 1 = Connect TCLK1 to the external oscillator. 1 = Connect TCLK1 to the 2.048MHz clock. 1 = Connect TCLK1 to the 1.544MHz clock. 2048MHZ (LSB) 1544MHZ
TCLK2_SRC: TCLK SOURCE (OFFSET = 0x0013) INITIAL VALUE = 0x1
(MSB) -- NAME HI_Z EXTOSC 2048MHZ 1544MHZ -- -- POSITION TCLK2_SRC.3 TCLK2_SRC.2 TCLK2_SRC.1 TCLK2_SRC.0 -- HI_Z EXTOSC FUNCTION 1 = Tri-state TCLK2. 1 = Connect TCLK2 to the external oscillator. 1 = Connect TCLK2 to the 2.048MHz clock. 1 = Connect TCLK2 to the 1.544MHz clock. 2048MHZ (LSB) 1544MHZ
TCLK3_SRC: TCLK SOURCE (OFFSET = 0x0014) INITIAL VALUE = 0x1
(MSB) -- NAME HI_Z EXTOSC 2048MHZ 1544MHZ -- -- POSITION TCLK3_SRC.3 TCLK3_SRC.2 TCLK3_SRC.1 TCLK3_SRC.0 -- HI_Z EXTOSC FUNCTION 1 = Tri-state TCLK3. 1 = Connect TCLK3 to the external oscillator. 1 = Connect TCLK3 to the 2.048MHz clock. 1 = Connect TCLK3 to the 1.544MHz clock. 2048MHZ (LSB) 1544MHZ
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DS21Q348DK 3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
TCLK4_SRC: TCLK SOURCE (OFFSET = 0x0015) INITIAL VALUE = 0x1
(MSB) -- NAME HI_Z EXTOSC 2048MHZ 1544MHZ -- -- POSITION TCLK4_SRC.3 TCLK4_SRC.2 TCLK4_SRC.1 TCLK4_SRC.0 -- HI_Z EXTOSC FUNCTION 1 = Tri-state TCLK4. 1 = Connect TCLK4 to the external oscillator. 1 = Connect TCLK4 to the 2.048MHz clock. 1 = Connect TCLK4 to the 1.544MHz clock. 2048MHZ (LSB) 1544MHZ
DS21Q348 INFORMATION
For more information about the DS21Q348, please consult the DS21Q348 data sheet available on our website, www.maxim-ic.com/DS21Q348.
DS21Q348DK INFORMATION
For more information about the DS21Q348DK, including software downloads, please consult the DS21Q348DK data sheet available on our website at www.maxim-ic.com/DS21Q348DK.
TECHNICAL SUPPORT
For additional technical support, please email your questions to telecom.support@dalsemi.com.
SCHEMATICS
The DS21Q348 schematics are featured in the following 11 pages.
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
(c) 2003 Maxim Integrated Products * Printed USA
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