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Preliminary
Product Description
Stanford Microdevices' SPA-1218 is a high efficiency GaAs Heterojunction Bipolar Transistor (HBT) amplifier housed in a low-cost surface-mountable plastic package. These HBT amplifiers are fabricated using molecular beam epitaxial growth technology which produces reliable and consistent performance from wafer to wafer and lot to lot. This product is specifically designed for use as a driver amplifier for infrastructure equipment in the 1950 MHz PCS band. Its high linearity makes it an ideal choice for multi-carrier and digital applications.
SPA-1218
1960 MHz 1 Watt Power Amp with Active Bias
VCC VBIAS RFIN N/C
Active Bias
Product Features * On-chip Active Bias Control * Patented High Reliability GaAsHBT Technology * High Linearity Performance: +48dBm OIP3 Typ. * Surface-Mountable Plastic Package Applications * PCS Systems * Multi-Carrier Applications
RFOUT/ VCC
Input Match
Symbol f0 P 1dB S 21 S11 OIP3 Icc Rth, j-l
Parameters: Test C onditions: Z0 = 50 Ohms, VC C =5V, Temp = 27C Frequency of Operati on Output Power at 1dB C ompressi on Vc1, Vbi as, Vc2 = 5.0V Small Si gnal Gai n Input VSWR Output Thi rd Order Intercept Poi nt Power out per tone = +14 dBm D evi ce C urrent, VC C = 5V Thermal Resi stance (juncti on - lead)
U nits MHz dB m dB dB m mA C /W
Min. 1930
Typ.
Max. 1990
29.5 12.0 1.5:1 48.0 320 40
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford Microdevices product for use in life-support devices and/or systems. Copyright 2000 Stanford Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 1
http://www.stanfordmicro.com
EDS-101428 Rev A
Preliminary Preliminary SPA-1218 1950 MHz 1 Watt Power Amp.
1950 MHz Application Circuit Data, Icc=320 mA, T=+27C, VCC=5V
Note: Tuned for Output IP3 P1dB vs Frequency Gain vs. Frequency
32 30 28
dBm
16 14
dB
26 24 22 20 1.93 1.94 1.95 1.96
GHz
12 10 8 1.93
25C -40C 85C
25C -40C 85C
1.97
1.98
1.99
1.94
1.95
1.96
GHz
1.97
1.98
1.99
Input/Output Return Loss, Isolation vs Frequency
0 -5 -10 -15 -20 -25 -30
S22
55 50 45
dBm
Output Third Order Intercept vs. Frequency (POUT per tone = 11dBm)
dB
S11
40 35 30
25C -40C 85C
-35 -40 1.93
S12
25
1.94
1.95
1.96
GHz
1.97
1.98
1.99
20 1.93
1.94
1.95
1.96
GHz
1.97
1.98
1.99
Output Third Order Intercept vs. Tone Power, 1.96 GHz
Device Current vs. Source Voltage
55 50
Device Current (mA)
45
dBm
40 35 30 25 20 8 13 18
POUT per tone (dBm)
25C -40C 85C
400 350 300 250 200 150 100 50 0 -50 0 1
25C -40C 85C
23
2
3
VS (V)
4
5
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 2
http://www.stanfordmicro.com
EDS-101428 Rev A
Preliminary Preliminary SPA-1218 1950 MHz 1 Watt Power Amp.
Vcc
0.047uF
10uF, Tantalum
270pF 100nH, LL1608-FS
1 8 7 6 5
22nH, LL1608-FS
Z=50, 23.6
22pF
390
2 3 4
68pF
1.8 pF
1930-1990 MHz Schematic
Vbias
Vcc
10uF Tantalum 0.047uF
100nH LL1608-FS
270pF
390W 22pF
22nH LL1608-FS
68pF
1.8pF
Vpc
ECB-101161 Rev. B SOIC-8 PA Eval Board
1930-1990 MHz Evaluation Board Layout
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 3
http://www.stanfordmicro.com
EDS-101428 Rev A
Preliminary Preliminary SPA-1218 1950 MHz 1 Watt Power Amp.
Pin # 1 Function VC C Description VCC is the supply voltage for the active bias network. Bypassing in the appropriate location as shown on application schematic is required for optimum RF performance. Vbias is the bias control pin for the active bias network. Device current is set by the current into this pin. Recommended configuration is shown in the Application Schematic. Bypassing in the appropriate location as shown on application schematic is required for optimum RF performance. RF input pin. This pin requires the use of an external DC blocking capacitor chosen for the frequency of operation. No connection
3 1
Device Schematic
2
V bi as
2
3
RF In
ACTIVE BIAS NETWORK
5-8
4 5
N/C
RF Out/Vcc RF output and bias pin. Bias should be supplied to this pin through an external RF choke. Because DC biasing is present on this pin, a DC blocking capacitor should be used in most applications (see application schematic). The supply side of the bias network should be well bypassed. An output matching network is necessary for optimum performance. RF Out/Vcc Same as Pin 5 RF Out/Vcc Same as Pin 5 RF Out/Vcc Same as Pin 5
6 7 8
Absolute Maximum Ratings Operation of this device above any one of these parameters may cause permanent damage. Bias Conditions should also satisfy the following expression: IDVD (max) < (TJ - TOP)/Rth,j-l
Parameter Supply C urrent (ID) D evi ce Voltage (VD) Power D i ssi pati on Operati ng Temperature (TOP) RF Input Power Storage Temperature Range Operati ng Juncti on Temperature (TJ) Value 750 6.0 4.0 -40 to +85 +500 -40 to +150 +150 U nit mA V W C mW C C
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 4
http://www.stanfordmicro.com
EDS-101428 Rev A
Preliminary Preliminary SPA-1218 1950 MHz 1 Watt Power Amp.
Caution: ESD sensitive
Appropriate precautions in handling, packaging and testing devices must be observed.
Part Number Ordering Information
Part Number SPA-1218 Devices Per Reel 500 Reel Siz e 7"
Package Outline Drawing
.035 [.889] .045 [1.143] 4 3 2 1 .194 [4.93] EXPOSED PAD
XXXX SPA 1218
8 7 6 TOP VIEW 5
.078 [1.969] .155 [3.937] .236 [5.994]
.061 [1.549]
BOTTOM VIEW
.050 [1.27]
.016 [.406] .061 [1.549] .008 [.203]
.058 [1.473]
.013 [.33] x 45
.008
.194 [4.928] .003 [.076] SIDE VIEW SEATING PLANE SEE DETAIL A
.155 [3.937]
END VIEW
Recommended Land Pattern
PARTING LINE
.15 [3.81]
.025 5 DETAIL A
.24 [6.22]
.16 [4.02] .33 [8.42]
Note: XXXX represents the lot code
.05 [1.27] .02 [.60]
.11 [2.71]
Note: Parts need to be baked prior to use as discussed in application note AN-029 (Special handling information for Exposed Pad TM SOIC-8 products) to ensure no moisture is trapped in the encapsulated package. In production, this baking procedure is not necessary if parts are used within 24 hours of opening the sealed shipping materials.
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 5
http://www.stanfordmicro.com
EDS-101428 Rev A

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