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| TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 D D D D D D D Two Complete PWM Control Circuits Outputs Drive MOSFETs Directly Oscillator Frequency . . . 50 kHz to 2 MHz 3.6-V to 20-V Supply-Voltage Range Low Supply Current . . . 3.5 mA Typ Adjustable Dead-Time Control, 0% to 100% 1.25-V Reference D, N OR PW PACKAGE (TOP VIEW) description CT RT DTC1 IN1 + IN1 - COMP1 GND OUT1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 REF SCP DTC2 IN2 + IN2 - COMP2 VCC OUT2 The TL1454 is a dual-channel pulse-width-modulation (PWM) control circuit, primarily intended for low-power, dc/dc converters. Applications include LCD displays, backlight inverters, notebook computers, and other products requiring small, high-frequency, dc/dc converters. Each PWM channel has its own error amplifier, PWM comparator, dead-time control comparator, and MOSFET driver. The voltage reference, oscillator, undervoltage lockout, and short-circuit protection are common to both channels. Channel 1 is configured to drive n-channel MOSFETs in step-up or flyback converters, and channel 2 is configured to drive p-channel MOSFETs in step-down or inverting converters. The operating frequency is set with an external resistor and an external capacitor, and dead time is continuously adjustable from 0 to 100% duty cycle with a resistive divider network. Soft start can be implemented by adding a capacitor to the dead-time control (DTC) network. The error-amplifier common-mode input range includes ground, which allows the TL1454 to be used in ground-sensing battery chargers as well as voltage converters. AVAILABLE OPTIONS PACKAGED DEVICES TA - 20C to 85C - 40C to 85C SMALL OUTLINE (D) TL1454CD TL1454ID PLASTIC DIP (N) TL1454CN TL1454IN TSSOP (PW) TL1454CPWLE -- CHIP FORM (Y) TL1454Y -- The D package is available taped and reeled. Add the suffix R to the device name (e.g., TL1454CDR). The PW package is available only left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TL1454CPWLE). PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1997, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 1 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 functional block diagram VCC 10 Voltage REF GND COMP1 IN1 + IN1 - 7 6 4 5 + _ Error Amplifier 1 COMP2 11 13 + IN2 + 12 _ IN2 - Error Amplifier 2 PWM Comparator 2 VCC 1.25 V 2.5 V To Internal Circuitry OSC PWM Comparator 1 RT CT 2 1 1.8 V 1.2 V VCC 16 REF 8 OUT1 UVLO and SCP Latch SCP Comparator 2 1V 0.65 V 0.65 V 9 OUT2 1V SCP Comparator 1 1.25 V 15 SCP 3 14 DTC1 DTC2 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TL1454Y chip information This chip, when properly assembled, displays characteristics similar to the TL1454C. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (15) (14) (13) (12) (11) (10) (9) (16) 86 (1) (8) (2) (3) (4) (5) (6) (7) 108 CT RT DTC1 IN1 + IN1- COMP1 GND OUT1 (1) (2) (3) (4) (5) (6) (7) (8) TL1454Y (16) (15) (14) (13) (12) (11) (10) (9) REF SCP DTC2 IN2+ IN2 - COMP2 VCC OUT2 CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 x 4 MINIMUM TJmax = 150C TOLERANCES ARE 10%. ALL DIMENSIONS ARE IN MILS. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 3 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 theory of operation reference voltage A linear regulator operating from VCC generates a 2.5-V supply for the internal circuits and the 1.25-V reference, which can source a maximum of 1 mA for external loads. A small ceramic capacitor (0.047 F to 0.1 F) between REF and ground is recommended to minimize noise pickup. error amplifier The error amplifier generates the error signal used by the PWM to adjust the power-switch duty cycle for the desired converter output voltage. The signal is generated by comparing a sample of the output voltage to the voltage reference and amplifying the difference. An external resistive divider connected between the converter output and ground, as shown in Figure 1, is generally required to obtain the output voltage sample. The amplifier output is brought out on COMP to allow the frequency response of the amplifier to be shaped with an external RC network to stabilize the feedback loop of the converter. DC loading on the COMP output is limited to 45 A (the maximum amplifier source current capability). Figure 1 illustrates the sense-divider network and error-amplifier connections for converters with positive output voltages. The divider network is connected to the noninverting amplifier input because the PWM has a phase inversion; the duty cycle decreases as the error-amplifier output increases. REF COMP Compensation Network R3 Converter Output VO R1 R2 IN - IN + _ To PWM + TL1454 Figure 1. Sense Divider/Error Amplifier Configuration for Converters with Positive Outputs The output voltage is given by: V O + Vref 1 ) R1 R2 where Vref = 1.25 V. The dc source resistance of the error-amplifier inputs should be 10 k or less and approximately matched to minimize output voltage errors caused by the input-bias current. A simple procedure for determining appropriate values for the resistors is to choose a convenient value for R3 (10 k or less) and calculate R1 and R2 using: R1 V + VR3-VO O ref R2 + RV3VO ref 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 error amplifier R1 and R2 should be tight-tolerance (1% or better) devices with low and/or matched temperature coefficients to minimize output voltage errors. A device with a 5% tolerance is suitable for R3. REF COMP R2 Compensation Network IN - IN + _ To PWM + R1 Converter V Output O R3 Figure 2. Sense Divider/Error Amplifier Configuration for Converters with Negative Outputs Figure 2 shows the divider network and error-amplifier configuration for negative output voltages. In general, the comments for positive output voltages also apply for negative outputs. The output voltage is given by: V + * R1RVref O 2 The design procedure for choosing the resistor value is to select a convenient value for R2 (instead of R3 in the procedure for positive outputs) and calculate R1 and R3 using: R1 + * RV2VO ref 2 + RR1RR ) 1 2 R3 Values in the 10-k to 20-k range work well for R2. R3 can be omitted and the noninverting amplifier connected to ground in applications where the output voltage tolerance is not critical. oscillator The oscillator frequency can be set between 50 kHz and 2 MHz with a resistor connected between RT and GND and a capacitor between CT and GND (see Figure 3). Figure 6 is used to determine RT and CT for the desired operating frequency. Both components should be tight-tolerance, temperature-stable devices to minimize frequency deviation. A 1% metal-film resistor is recommended for RT, and a 10%, or better, NPO ceramic capacitor is recommended for CT. TL1454 RT 2 RT CT 1 CT Figure 3. Oscillator Timing POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 5 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 dead-time control (DTC) and soft start The two PWM channels have independent dead-time control inputs so that the maximum power-switch duty cycles can be limited to less then 100%. The dead-time is set with a voltage applied to DTC; the voltage is typically obtained from a resistive divider connected between the reference and ground as shown in Figure 4. Soft start is implemented by adding a capacitor between REF and DTC. The voltage, VDT, required to limit the duty cycle to a maximum value is given by: V DT + VO(max) * D VO(max) * VO(min) * 0.65 where VO(max) and VO(min) are obtained from Figure 9, and D is the maximum duty cycle. Predicting the regulator startup or rise time is complicated because it depends on many variables, including: input voltage, output voltage, filter values, converter topology, and operating frequency. In general, the output will be in regulation within two time constants of the soft-start circuit. A five-to-ten millisecond time constant usually works well for low-power converters. The DTC input can be grounded in applications where achieving a 100% duty cycle is desirable, such as a buck converter with a very low input-to-output differential voltage. However, grounding DTC prevents the implementation of soft start, and the output voltage overshoot at power-on is likely to be very large. A better arrangement is to omit RDT1 (see Figure 4) and choose RDT2 = 47 k. This configuration ensures that the duty cycle can reach 100% and still allows the designer to implement soft start using CSS. 16 CSS RDT1 DTC RDT2 REF TL1454 Figure 4. Dead-Time Control and Soft Start PWM comparator Each of the PWM comparators has dual inverting inputs. One inverting input is connected to the output of the error amplifier; the other inverting input is connected to the DTC terminal. Under normal operating conditions, when either the error-amplifier output or the dead-time control voltage is higher than that for the PWM triangle wave, the output stage is set inactive (OUT1 low and OUT2 high), turning the external power stage off. undervoltage-lockout (UVLO) protection The undervoltage-lockout circuit turns the output circuit off and resets the SCP latch whenever the supply voltage drops too low (to approximately 2.9 V) for proper operation. A hysteresis voltage of 200 mV eliminates false triggering on noise and chattering. short-circuit protection (SCP) The TL1454 SCP function prevents damage to the power switches when the converter output is shorted to ground. In normal operation, SCP comparator 1 clamps SCP to approximately 185 mV. When one of the converter outputs is shorted, the error amplifier output (COMP) will be driven below 1 V to maximize duty cycle and force the converter output back up. When the error amplifier output drops below 1 V, SCP comparator 1 releases SCP, and capacitor, CSCP, which is connected between SCP and GND, begins charging. If the error-amplifier output rises above 1 V before CSCP is charged to 1 V, SCP comparator 1 discharges CSCP and normal operation resumes. If CSCP reaches 1 V, SCP comparator 2 turns on and sets the SCP latch, which turns off the output drives and resets the soft-start circuit. The latch remains set until the supply voltage is lowered to 2 V or less, or CSCP is discharged externally. 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 short-circuit protection (SCP) (continued) The SCP time-out period must be greater than the converter start-up time or the converter will not start. Because high-value capacitor tolerances tend to be 20% or more and IC resistor tolerances are loose as well, it is best to choose an SCP time-out period 10-to-15 times greater than the converter startup time. The value of CSCP may be determined using Figure 6, or it can be calculated using: C SCP SCP + T80.3 where CSCP is in F and TSCP is the time-out period in ms. output stage The output stage of the TL1454 is a totem-pole output with a maximum source/sink current rating of 40 mA and a voltage rating of 20 V. The output is controlled by a complementary output AND gate and is turned on (sourcing current for OUT1, sinking current for OUT2) when all the following conditions are met: 1) the oscillator triangle wave voltage is higher than both the DTC voltage and the error-amplifier output voltage, 2) the undervoltage-lockout circuit is inactive, and 3) the short-circuit protection circuit is inactive. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 V Error amplifier input voltage: IN1+, IN1 -, IN2 +, IN2 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 V Output voltage: OUT1, OUT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Continuous output current: OUT1, OUT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Peak output current: OUT1, OUT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 20C to 85C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 85C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network GND. DISSIPATION RATING TABLE PACKAGE D N PW TA 25C POWER RATING 950 mW 1250 mW 500 mW DERATING FACTOR ABOVE TA = 25C 7.6 mW/C 10.0 mW/C 4.0 mW/C TA = 70C POWER RATING 608 mW 800 mW 320 mW TA = 85C POWER RATING 494 mW 650 mW 260 mW POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 7 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 recommended operating conditions MIN Supply voltage, VCC Error amplifier common-mode input voltage Output voltage, VO Output current, IO COMP source current COMP sink current Reference output current COMP dc load resistance Timing capacitor, CT Timing resistor, RT Oscillator frequency Operating free-air temperature, TA free air temperature TL1454C TL1454I 100 10 5.1 50 - 20 - 40 4000 100 2000 85 85 3.6 - 0.2 MAX 20 1.45 20 40 - 45 100 1 UNIT V V V mA A A mA k pF k kHz C electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 500 kHz (unless otherwise noted) reference PARAMETER Vref f Output voltage, REF voltage Input regulation Output regulation Output voltage change with temperature IOS Short-circuit output current TEST CONDITIONS IO = 1 mA, IO = 1 mA VOC = 3.6 V to 20 V, IO = 0.1 mA to 1 mA TA = TA(min) to 25C, TA = 25C to 85C, Vref = 0 V TA = 25C IO = 1 mA IO = 1 mA IO = 1 mA -12.5 -12.5 TL1454 MIN 1.23 1.2 2 1 - 1.25 -2.5 30 TYP 1.25 MAX 1.28 1.31 6 7.5 12.5 12.5 mV mA UNIT V mV mV undervoltage lockout (UVLO) PARAMETER VIT + VIT - Vhys Positive-going threshold voltage Negative-going threshold voltage Hysteresis, VIT + - VIT - TA = 25C 100 TEST CONDITIONS TL1454 MIN TYP 2.9 2.7 200 MAX UNIT V V mV short-circuit protection (SCP) PARAMETER VIT Vstby VI(latched) VIT(COMP) Input threshold voltage Standby voltage Latched-mode input voltage Comparator threshold voltage Input source current TEST CONDITIONS TA = 25C No pullup COMP1, COMP2 -5 TL1454 MIN 0.95 140 TYP 1 185 60 1 - 15 - 20 MAX 1.05 230 120 UNIT V mV mV V A TA = 25C, VO(SCP) = 0 This symbol is not presently listed within EIA / JEDEC standards for semiconductor symbology. 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 500 kHz (unless otherwise noted) (continued) oscillator PARAMETER fosc Frequency Standard deviation of frequency Frequency change with voltage Frequency change with temperature Maximum ramp voltage Minimum ramp voltage VCC = 3.6 V to 20 V, TA = TA(min) to 25C TA = 25C to 85C TA = 25C TEST CONDITIONS CT = 120 pF, RT = 10 k TL1454 MIN TYP 500 50 5 -2 - 10 1.8 1.1 20 20 MAX UNIT kHz kHz kHz kHz V V dead-time control (DTC) PARAMETER VIT VI(latched) IIB Input threshold voltage Latched-mode input voltage Common-mode input bias current Latched-mode (source) current DTC1, IN1+ 1.2 V TA = 25C - 100 TEST CONDITIONS Duty cycle = 0% Duty cycle = 100% TL1454 MIN 1 0.4 TYP 1.1 0.5 1.2 4 MAX 1.2 0.6 UNIT V V A A error-amplifier PARAMETER VIO IIO IIB VICR AV CMRR VOM(max) VOM(min) IO + IO - Input offset voltage Input offset current Input bias current Input voltage range Open-loop voltage gain Unity-gain bandwidth Common-mode rejection ratio Positive output voltage swing Negative output voltage swing Output sink current Output source current VID = - 0.1 V, VID = 0.1 V, VO = 1.20 V VO = 1.80 V 0.1 - 45 60 2.3 VCC = 3.6 V to 20 V RFB = 200 k - 0.2 to 1.40 70 80 3 80 2.43 0.63 0.5 - 70 0.8 VO = 1.25 V, VIC = 1.25 V - 160 TEST CONDITIONS TL1454 MIN TYP MAX 6 100 - 500 UNIT mV nA nA V dB MHz dB V mA A output PARAMETER VOH VOL trv tfv High-level High level output voltage Low level output voltage Low-level Output voltage rise time Output voltage fall time TEST CONDITIONS IO = - 8 mA IO = - 40 mA IO = 8 mA IO = 40 mA CL = 2000 pF pF, TA = 25C TL1454 MIN VCC-2 VCC-2 TYP 4.5 4.4 0.1 1.8 220 220 0.4 2.5 MAX UNIT V V ns POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 9 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 500 kHz (unless otherwise noted) (continued) supply current PARAMETER ICC(stby) ICC(average) Standby supply current Average supply current TEST CONDITIONS RT open, CT = 1.5 V, No load, VO (COMP1, COMP2) = 1.25 V, RT = 10 k, CT = 120 pF, 50% duty cycle, Outputs open TL1454 MIN TYP 3.1 3.5 MAX 6 7 UNIT mA mA electrical characteristics, VCC = 6 V, fosc = 500 kHz, TA = 25C (unless otherwise noted) reference PARAMETER Vref Output voltage, REF Input regulation Output regulation Output voltage change with temperature IOS Short-circuit output current TEST CONDITIONS IO = 1 mA, VOC = 3.6 V to 20 V, IO = 0.1 mA to 1 mA IO = 1 mA IO = 1 mA Vref = 0 V TL1454Y MIN TYP 1.25 IO = 1 mA 2 1 - 1.25 -2.5 30 MAX UNIT V mV mV mV mA undervoltage lockout (UVLO) PARAMETER VIT + VIT - Vhys Positive-going threshold voltage Negative-going threshold voltage Hysteresis, VIT + - VIT - TEST CONDITIONS TL1454Y MIN TYP 2.9 2.7 200 MAX UNIT V V mV short-circuit protection (SCP) PARAMETER VIT Vstby VI(latched) VIT(COMP) Input threshold voltage Standby voltage Latched-mode input voltage Comparator threshold voltage Input source current No pullup COMP1, COMP2 TEST CONDITIONS TL1454Y MIN TYP 1 185 60 1 - 15 MAX UNIT V mV mV V A VO(SCP) = 0 This symbol is not presently listed within EIA / JEDEC standards for semiconductor symbology. oscillator PARAMETER fosc Frequency Standard deviation of frequency Frequency change with voltage Frequency change with temperature Maximum ramp voltage Minimum ramp voltage VCC = 3.6 V to 20 V TEST CONDITIONS CT = 120 pF, RT = 10 k TL1454Y MIN TYP 500 50 5 -2 - 10 1.8 1.1 MAX UNIT kHz kHz kHz kHz V V 10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 electrical characteristics, VCC = 6 V, fosc = 500 kHz, TA = 25C (unless otherwise noted) (continued) dead-time control (DTC) PARAMETER VIT VI(latched) Input threshold voltage Latched-mode input voltage Latched-mode (source) current TEST CONDITIONS Duty cycle = 0% Duty cycle = 100% TL1454Y MIN TYP 1.1 0.5 1.2 - 100 MAX UNIT V V A error-amplifier PARAMETER IIB AV CMRR VOM(max) VOM(min) IO + IO - Input bias current Open-loop voltage gain Unity-gain bandwidth Common-mode rejection ratio Positive output voltage swing Negative output voltage swing Output sink current Output source current VID = - 0.1 V, VID = 0.1 V, VO = 1.20 V VO = 1.80 V TEST CONDITIONS VO = 1.25 V, RFB = 200 k VIC = 1.25 V TL1454Y MIN TYP - 160 80 3 80 2.43 0.63 0.5 - 70 MAX UNIT nA dB MHz dB V mA A output PARAMETER VOH VOL trv tfv High-level High level output voltage Low-level Low level output voltage Output voltage rise time Output voltage fall time TEST CONDITIONS IO = - 8 mA IO = - 40 mA IO = 8 mA IO = 40 mA CL = 2000 pF TL1454Y MIN TYP 4.5 4.4 0.1 1.8 220 220 MAX UNIT V V ns supply current PARAMETER ICC(stby) ICC(average) Standby supply current Average supply current TEST CONDITIONS RT open, CT = 1.5 V, No load, VO (COMP1, COMP2) = 1.25 V, RT = 10 k, 50% duty cycle, CT = 120 pF, Outputs open TL1454Y MIN TYP 3.1 3.5 MAX UNIT mA mA POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 11 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 PARAMETER MEASUREMENT INFORMATION Oscillator COMP DTC SCP Reference OUT1 1.8 V 1.2 V 1V H Dead-Time 100% L H Dead-Time 100% L H L 2.5 V 1V SCP (tpe) VCC 2.9-V Typical Lockout threshold OUT2 SCP Comparator Output 0V 0V Figure 5. Timing Diagram 12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS OSCILLATOR FREQUENCY vs TIMING RESISTANCE 10 M VCC = 6 V TA = 25C f - Oscillator Frequency - Hz 1M CT = 10 pF CT = 120 pF t - Oscillation Period - s 10 2 OSCILLATOR PERIOD vs TIMING CAPACITANCE VCC = 6 V RT = 5.1 k TA = 25C 10 1 100 k CT = 300 pF CT = 1000 pF 10 0 10 k CT = 3900 pF 1k 1k 10 k RT - Timing Resistance - 100 k 10 - 1 10 0 10 1 10 2 10 3 10 4 10 5 CT - Timing Capacitance - pF Figure 6 OSCILLATOR FREQUENCY vs FREE-AIR TEMPERATURE 530 PWM Triangle Waveform Amplitude - V VCC = 6 V RT = 10 k CT = 120 pF 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 10 0 VCC = 6 V RT = 5.1 k TA = 25C 10 1 Figure 7 PWM TRIANGLE WAVEFORM AMPLITUDE vs TIMING CAPACITANCE VO(max) f osc - Oscillator Frequency - kHz 520 510 VO(min) 500 490 480 - 50 0 50 100 10 2 10 3 10 4 TA - Free-Air Temperature - C Timing Capacitance - pF Figure 8 Figure 9 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 13 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS DTC INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 1.4 VCC = 6 V RT = 5.1 k CT = 1000 pF t SCP - SCP Time-Out Period - s 2 VCC = 6 V TA = 25C 1.5 SCP TIME-OUT PERIOD vs SCP CAPACITANCE DTC Input Threshold Voltage - V 1.2 VIT (0% Duty Cycle) 1 1 0.8 0.5 0.6 VIT (100% Duty Cycle) 0.4 - 50 0 0 50 TA - Free-Air Temperature - C 100 0 5 10 15 20 25 SCP Capacitance - F Figure 10 SCP THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 1.04 VCC = 6 V VI(reset) - SCP Latch Reset Voltage - V 3.5 VCC = 6 V 3 Figure 11 SCP LATCH RESET VOLTAGE vs FREE-AIR TEMPERATURE VIT - SCP Threshold Voltage - V 1.02 1 2.5 0.98 2 0.96 1.5 0.94 - 50 0 50 100 1 - 50 - 25 0 25 50 75 100 TA - Free-Air Temperature - C TA - Free-Air Temperature - C Figure 12 Figure 13 14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS UVLO THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 3.5 VIT(H) VIT(L) - UVLO Threshold Voltage - V VIT(H) 3 VIL(L) 80 Duty Cycle - % 2.5 100 120 VCC = 6 V CT = 120 pF RT = 10 k TA = 25C DUTY CYCLE vs DTC INPUT VOLTAGE 60 2 40 1.5 20 1 - 50 - 25 0 25 50 75 100 0 0 0.25 0.5 0.75 1 1.25 1.5 VI(DTC) - DTC Input Voltage - V TA - Free-Air Temperature - C Figure 14 ERROR-AMPLIFIER MAXIMUM OUTPUT VOLTAGE vs SOURCE CURRENT VCC = 6 V VID = 0.1 V TA = 25C VOM - - Error-Amplifier Minimum Output Voltage - V 2.5 Figure 15 ERROR-AMPLIFIER MINIMUM OUTPUT VOLTAGE vs SINK CURRENT 2.5 VCC = 6 V VID = 0.1 V 2 VOM + - Error-Amplifier Maximum Output Voltage - V 2 1.5 1.5 1 1 0.5 0.5 0 0 40 80 120 Source Current - A 0 0 0.5 1 Sink Current - mA 1.5 Figure 16 Figure 17 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 15 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS ERROR AMPLIFIER MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE SWING vs FREQUENCY 2.5 VO(PP) - Error Amplifier Maximum Peak-to-Peak Output Voltage Swing - V VCC = 6 V TA = 25C VOM+ - Error-Ampplifier Minimum Output Voltage Swing - V ERROR-AMPLIFIER MINIMUM OUTPUT VOLTAGE SWING vs FREE-AIR TEMPERATURE 0.8 VCC = 6 V No Load Amplifier 1 2 0.7 1.5 0.6 1 0.5 0.5 0.4 10 k 100 k 1M 10 M 100 M f - Frequency - Hz Figure 18 ERROR AMPLIFIER OPEN-LOOP GAIN AND PHASE SHIFT vs FREQUENCY 80 Error Amplifier Open-Loop Gain - dB VCC = 6 V TA = 25C 60 - 36 Gain - 0 40 Phase Shift 20 - 108 0 - 144 - 20 100 1k 10 k 100 k 1M - 180 10 M f - Frequency - Hz Figure 20 16 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * Phase Shift AA AA 0 1k 0.3 - 50 - 25 0 25 50 75 TA - Free-Air Temperature - C 100 Figure 19 - 72 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS ERROR-AMPLIFIER POSITIVE OUTPUT VOLTAGE SWING vs FREE-AIR TEMPERATURE 2.5 VCC = 6 V No Load Amplifier 1 VOM+ - Error-Ampplifier Positive Output Voltage Swing - V 2.45 2.4 HIGH-LEVEL OUTPUT VOLTAGE vs OUTPUT CURRENT 6 VCC = 6 V TA = 25C VOH - High-Level Output Voltage - V 5 VOH - High-Level Output Voltage - V 5 5.5 4 3 2 1 0 20 40 60 IO - Output Current - mA 80 Figure 22 AA AA AA 2.35 - 50 - 25 0 25 50 75 TA - Free-Air Temperature - C 100 Figure 21 HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE VCC = 6 V IO = 8 mA 4.5 IO = 40 mA 4 3.5 3 - 50 - 25 0 25 50 75 TA - Free-Air Temperature - C 100 Figure 23 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 17 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 6 VOL - Low-Level Output Voltage - mV VCC = 6 V TA = 25C VOL - Low-Level Output Voltage - V 5 250 VCC = 6 V IO = 8 mA 200 LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 4 150 3 100 2 50 1 0 20 40 60 IOL - Low-Level Output Current - mA 80 0 - 50 - 25 0 25 50 75 TA - Free-Air Temperature - C 100 Figure 24 LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 3 VCC = 6 V IO = 40 mA I CC(a) - Average Supply Current - mA VOL - Low-Level Output Voltage - V 2.5 5 6 Figure 25 AVERAGE SUPPLY CURRENT vs FREE-AIR TEMPERATURE VCC = 6 V RT = 10 k CT = 1.5 V COMP1, COMP2 = 1.25 V No Load 2 4 1.5 3 1 2 0.5 - 50 - 25 0 25 50 75 TA - Free-Air Temperature - C 100 1 - 50 - 25 0 25 50 75 100 TA - Free-Air Temperature - C Figure 26 Figure 27 18 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS STANDBY SUPPLY CURRENT vs SUPPLY VOLTAGE 6 I CC(stby) - Standby Supply Current - mA VCC = 6 V RT = Open CT = 1.5 V COMP1, COMP2 = 1.25 V No Load TA = 25C 6 VCC = 6 V CT = 1.5 V RT = Open COMP1, COMP2 = 1.25 V No Load STANDBY SUPPLY CURRENT vs FREE-AIR TEMPERATURE I CC(stby) - Standby Supply Current - mA 5 5 4 4 3 3 2 2 1 0 5 10 15 20 25 VCC - Supply Voltage - V 1 - 50 0 50 100 TA - Free-Air Temperature - C Figure 28 REFERENCE VOLTAGE vs SUPPLY VOLTAGE 1.5 TA = 25C 1.26 IO = 1 mA TA = 25C Vref - Reference Voltage - V Figure 29 REFERENCE VOLTAGE vs SUPPLY VOLTAGE Vref - Reference Voltage - V 1 1.25 0.5 1.24 0 0 5 10 15 20 VCC - Supply Voltage - V 25 1.23 0 5 10 15 20 25 VCC - Supply Voltage - V Figure 30 Figure 31 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 19 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 TYPICAL CHARACTERISTICS REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 1.26 VCC = 6 V IO = - 1 mA Vref - Reference Voltage - V 1.25 1.24 1.23 - 50 - 25 0 25 50 75 TA - Free-Air Temperature - C 100 Figure 32 20 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 MECHANICAL DATA D (R-PDSO-G**) 14 PIN SHOWN PINS ** DIM 0.020 (0,51) 0.014 (0,35) 14 8 A MIN 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) 0.008 (0,20) NOM 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) 0.010 (0,25) M A MAX PLASTIC SMALL-OUTLINE PACKAGE 0.050 (1,27) 8 0.197 (5,00) 14 0.344 (8,75) 16 0.394 (10,00) 1 A 7 Gage Plane 0.010 (0,25) 0- 8 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) 4040047 / B 10/94 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Four center pins are connected to die mount pad Falls within JEDEC MS-012 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 21 TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 MECHANICAL DATA N (R-PDIP-T**) 16 PIN SHOWN PLASTIC DUAL-IN-LINE PACKAGE A 16 9 PINS ** DIM A MAX 0.260 (6,60) 0.240 (6,10) 14 0.775 (19,69) 0.745 (18,92) 16 0.775 (19,69) 0.745 (18,92) 18 0.920 (23.37) 0.850 (21.59) 20 0.975 (24,77) 0.940 (23,88) A MIN 1 8 0.070 (1,78) MAX 0.035 (0,89) MAX 0.020 (0,51) MIN 0.310 (7,87) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0.010 (0,25) NOM 0- 15 14 Pin Only 4040049 / C 7/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001) 22 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * TL1454, TL1454Y DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT SLVS086B - APRIL 1995 - REVISED NOVEMBER 1997 MECHANICAL DATA PW (R-PDSO-G**) 14 PIN SHOWN 0,32 0,17 14 8 PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,13 M 0,15 NOM 4,70 4,30 6,70 6,10 Gage Plane 0,25 1 A 7 0- 8 0,70 0,40 Seating Plane 1,20 MAX 0,10 MIN 0,10 PINS ** DIM A MAX 8 14 16 20 24 28 3,30 5,30 5,30 6,80 8,10 10,00 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 4040064 / B 10/94 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443 * * 23 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 1998, Texas Instruments Incorporated |
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