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 HY62KF08401C Series
512Kx8bit full CMOS SRAM
Document Title
512K x 8bit 2.7 ~ 3.6V Super low Power FCMOS Slow SRAM
Revision History
Revision No History Draft Date Remark
00
Initial Draft
Mar.21.2001
Final
01
Changed Isb1 values
Jun.07.2001
Final
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.01 / Jun.01 Hynix Semiconductor
HY62KF08401C Series
DESCRIPTION
The HY62KF08401C is a high speed, super low power and 4Mbit full CMOS SRAM organized as 512K words by 8bits. The HY62KF08401C uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly well-suited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V.
FEATURES
* Fully static operation and Tri-state output * TTL compatible inputs and outputs * Battery backup -. 1.2V(min) data retention * Standard pin configuration -. 32 - sTSOP - 8X13.4(Standard)
Product No. HY62KF08401C-I
Voltage (V) 2.7~3.6
Speed (ns) 55/70
Operation Current/Icc(mA) 5
Standby Current(uA) LL SL 15 6
Temperature (C) -40~85
Note 1. I : Industrial 2. Current value is max.
PIN CONNECTION
A11 A9 A8 A13 /WE A18 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3
A0
BLOCK DIAGRAM
ROW DECODER I/O1 SENSE AMP
COLUMN DECODER
ADD INPUT BUFFER
PRE DECODER
DATA I/O BUFFER
MEMORY ARRAY 512K x 8
WRITE DRIVER
BLOCK DECODER
A18
I/O8
32-sTSOP Forward
/CS /OE /WE
PIN DESCRIPTION
Pin Name /CS /WE /OE A0 ~ A18 Pin Function Chip Select Write Enable Output Enable Address Input Pin Name I/O1 ~ I/O8 Vcc Vss Pin Function Data Input/Output Power (2.7~3.6V) Ground
Rev.01 / Jun.01
2
HY62KF08401C Series
ORDERING INFORMATION
Part No. HY62KF08401C-DS(I) HY62KF08401C-SS(I) Note 1. I : Industrial Speed 55/70 55/70 Power LL-part SL-part Temp. I I Package sTSOP sTSOP
ABSOLUTE MAXIMUM RATINGS (1)
Symbol VIN, VOUT Vcc TA TSTG PD TSOLDER Parameter Input/Output Voltage Power Supply Operating Temperature Storage Temperature Power Dissipation Ball Soldering Temperature & Time Rating -0.3 to 3.6 -0.3 to 4.6 -40 to 85 -55 to 150 1.0 260 * 10 Unit V V C C W C*sec Remark
HY62KF08401C-I
Note 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS H L /WE X H L /OE X H L X MODE Deselected Output Disabled Read Write I/O OPERATION High-Z High-Z Dout Din Supply Current Standby Active Active
Note: 1. H=VIH, L=VIL, X=don't care (VIL or VIH)
Rev.01 / Jun.01
2
HY62KF08401C Series
RECOMMENDED DC OPERATING CONDITION
Symbol Vcc Vss VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 2.7 0 2.2 -0.31. Typ 3.0 or 3.3 0 Max. 3.6 0 Vcc+0.3 0.6 Unit V V V V
Note : 1. Undershoot : VIL = -1.5V for pulse width less than 30ns 2. Undershoot is sampled, not 100% tested.
DC ELECTRICAL CHARACTERISTICS
TA = -40C to 85C Sym Parameter ILI Input Leakage Current ILO Icc Output Leakage Current Operating Power Supply Current Test Condition Vss < VIN < Vcc Vss < VOUT < Vcc, /CS = VIH or /OE = VIH or /WE = VIL /CS = VIL, VIN = VIH or VIL, II/O = 0mA /CS = VIL, 2.7~3.6V VIN = VIH or VIL, Cycle Time = Min, 2.7~3.3V 100% Duty, II/O = 0mA /CS < 0.2V, VIN < 0.2V or VIN > Vcc-0.2V, Cycle Time = 1us, 100% Duty, II/O = 0mA /CS = VIH or VIN = VIH or VIL /CS > Vcc - 0.2V or LL VIN > Vcc - 0.2V or SL VIN < Vss + 0.2V IOL = 2.1mA IOH = -1.0mA Min -1 -1 Typ1. Max 1 1 5 45 40 Unit uA uA mA mA mA
ICC1
Average Operating Current
5 0.5 15 6 0.4 -
mA mA uA uA V V
ISB ISB1 VOL VOH
Standby Current (TTL Input) Standby Current (CMOS Input) Output Low Output High
0.2 2.4 0.2 -
Note 1. Typical values are at Vcc = 3.0V TA = 25C 2. Typical values are not 100% tested
CAPACITANCE
(Temp = 25C, f= 1.0MHz) Symbol Parameter CIN Input Capacitance (Add, /CS, /WE, /OE) COUT Output Capacitance (I/O) Note : These parameters are sampled and not 100% tested Condition VIN = 0V VI/O = 0V Max. 8 10 Unit pF pF
Rev.01 / Jun.01
3
HY62KF08401C Series
AC CHARACTERISTICS
TA = -40C to 85C, unless otherwise specified # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Symbol Parameter 55ns Min. Max. 55 10 5 0 0 10 55 50 50 0 45 0 0 25 0 5 55 55 30 30 30 20 70ns Min. Max. 70 10 5 0 0 10 70 60 60 0 50 0 0 30 0 5 70 70 35 30 30 20 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
READ CYCLE tRC Read Cycle Time tAA Address Access Time tACS Chip Select Access Time tOE Output Enable to Output Valid tCLZ Chip Select to Output in Low Z tOLZ Output Enable to Output in Low Z tCHZ Chip Deselection to Output in High Z tOHZ Out Disable to Output in High Z tOH Output Hold from Address Change WRITE CYCLE tWC Write Cycle Time tCW Chip Selection to End of Write tAW Address Valid to End of Write tAS Address Set-up Time tWP Write Pulse Width tWR Write Recovery Time tWHZ Write to Output in High Z tDW Data to Write Time Overlap tDH Data Hold from Write Time tOW Output Active from End of Write
AC TEST CONDITIONS
TA = -40C to 85C, unless otherwise specified Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, tOW Others Value 0.4V to 2.2V 5ns 1.5V CL = 5pF + 1TTL Load CL = 30pF + 1TTL Load
AC TEST LOADS
VTM=2.8V
1029 Ohm DOUT CL(1) 1728 Ohm
Note 1. Including jig and scope capacitance
Rev.01 / Jun.01
4
HY62KF08401C Series
TIMING DIAGRAM
READ CYCLE 1 (Note 1,4)
tRC ADDR tAA tACS /CS tCHZ(3) tOH
/OE tOLZ(3) Data Out High-Z tCLZ(3)
tOE
tOHZ(3) Data Valid
READ CYCLE 2 (Note 1,2,4)
tRC ADDR tAA tOH Data Out Previous Data Data Valid tOH
READ CYCLE 3(Note 1,2,4)
/CS
tACS tCLZ(3) Data Out Data Valid tCHZ(3)
Notes: 1. A read occurs during the overlap of a low /OE, a high /WE and a low /CS. 2. /OE = VIL 3. Transition is measured + 200mV from steady state voltage. This parameter is sampled and not 100% tested. 4. /CS in high for the standby, low for active
Rev.01 / Jun.01
5
HY62KF08401C Series
WRITE CYCLE 1(1,4,8) (/WE Controlled)
tWC ADDR tWR(2) tCW /CS tAW
tWP /WE tAS Data In High-Z tWHZ(3,8) Data Out tDW Data Valid tOW (5) (6) tDH
WRITE CYCLE 2 (Note 1,4,8) (/CS Controlled)
tWC ADDR tAS /CS tAW tCW tWR(2)
tWP /WE tDW Data In High-Z Data Valid tDH
Data Out
High-Z
Rev.01 / Jun.01
6
HY62KF08401C Series
Notes: 1. A write occurs during the overlap of a low /WE and a low /CS. 2. tWR is measured from the earlier of /CS or /WE going high to the end of write cycle. 3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the output must not be applied. 4. If the /CS low transition occurs simultaneously with the /WE low transition or after the /WE transition, outputs remain in a high impedance state. 5. Q(data out) is the same phase with the write data of this write cycle. 6. Q(data out) is the read data of the next address. 7. Transition is measured + 200mV from steady state. This parameter is sampled and not 100% tested. 8. /CS in high for the standby, low for active
DATA RETENTION ELECTRIC CHARACTERISTIC
TA = -40C to 85C Symbol Parameter VDR Vcc for Data Retention Test Condition /CS > Vcc - 0.2V, VIN > Vcc - 0.2V or VIN < Vss + 0.2V Vcc=1.5V, /CS > Vcc - 0.2V or VIN > Vcc - 0.2V or VIN < Vss + 0.2V Min 1.2 LL SL 0 tRC Typ1. 0.1 0.1 Max 3.6 10 3 Unit V uA uA ns ns
Iccdr
Data Retention Current Chip Deselect to Data Retention Time Operating Recovery Time
tCDR tR
See Data Retention Timing Diagram
Notes: 1. Typical values are under the condition of TA = 25C. 2. Typical value are sampled and not 100% tested
DATA RETENTION TIMING DIAGRAM
VCC 2.7V tCDR DATA RETENTION MODE tR
VIH VDR /CS >VCC-0.2V /CS VSS
Rev.01 / Jun.01
7
HY62KF08401C Series
PACKAGE INFORMATION
32pin 8x13.4mm Smaller Thin Small Outline Package Standard(S)
#1 #32 0.319(8.1) 0.311(7.9) UNIT : INCH(mm)
#16 0.468(11.9) 0.460(11.7) 0.536(13.6) 0.520(13.2)
#17
0.041(1.05) 0.037(0.95) 0.008(0.20) 0.002(0.05) 0.024(0.6) 0.016(0.4) 0.008(0.2) 0.004(0.1) 0.020(0.50) 0.011(0.27) 0.007(0.17)
Rev.01 / Jun.01
8
HY62KF08401C Series
MARKING INFORMATION
Package
H Y C y
Marking Example
6 w 2 c w K S p F s 0 s 8 t K O R 4 0
sTSOP
1 y
Index
* HY62KF08401C *c : Part Name : Power Consumption -D -S : Package Type -S : Speed - 55 - 70 *t : Temperature -I : 55ns : 70ns : Industrial ( -40 ~ 85 C )
: Low Low Power : Super Low Power
*S
: sTSOP
* ss
* yy * ww *p * KOR Note - Capital Letter - Small Letter
: Year ( ex : 00 = year 2000, 01 = year 2001 ) : work week ( ex : 12 = ww12 ) : Process Code : Origin Country
: Fixed Item : Non-fixed Item
Rev.01 / Jun.01
9


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