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HC-5504B
Data Sheet July 2004 FN2886.8
EIA/ITU PABX SLIC with 40mA Loop Feed
The Intersil SLIC incorporates many of the BORSHT functions on a single IC chip. This includes DC battery feed, a ring relay driver, supervisory and hybrid functions. This device is designed to maintain transmission performance in the presence of externally induced longitudinal currents. Using the unique Intersil dielectric isolation process, the SLIC can operate directly with a wide range of station battery voltages. The SLIC also provides selective denial of power. If the PBX system becomes overloaded during an emergency, the SLIC will provide system protection by denying power to selected subscriber loops. The Intersil SLIC is ideally suited for the design of new digital PBX systems by eliminating bulky hybrid transformers.
Features
* Pin for Pin Replacement for the HC-5504 * Capable of 5V or 12V (VB+) Operation * Monolithic Integrated Device * DI High Voltage Process * Compatible With Worldwide PBX Performance Requirements * Controlled Supply of Battery Feed Current for Short Loops (41mA) * Internal Ring Relay Driver * Allows Interfacing With Negative Superimposed Ringing Systems * Low Power Consumption During Standby * Switch Hook Ground Key and Ring Trip Detection Functions * Selective Denial of Power to Subscriber Loops
Ordering Information
PART NUMBER HC9P5504B-5 HC9P5504B-5Z (Note) HC9P5504B-5ZX96 (Note) TEMP. RANGE (C) 0 to 75 0 to 75 0 to 75 PACKAGE 24 Ld SOIC PKG. DWG. # M24.3
* Pb-free Available
Applications
* Solid State Line Interface Circuit for Analog and Digital PBX Systems * Direct Inward Dial (DID) Trunks * Voice Messaging PBXs * Related Literature - AN549, The HC-5502S/4X Telephone Subscriber Line Interface Circuits (SLIC) - AN571, Using Ring Sync with HC-5502A and HC-5504 SLICs
24 Ld SOIC (Pb-free) M24.3 24 Ld SOIC (Pb-free) M24.3 Tape and Reel
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Pinout
HC-5504B (SOIC) TOP VIEW
TIP RING RFS V B+ C3 DG RS RD TF 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 15 14 13 TX AG C4 RX +IN -IN OUT C2 RC PD GKD SHD
RF 10 V B11
BG 12
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
HC-5504B
Absolute Maximum Ratings (Note 1)
Maximum Continuous Supply Voltages (VB-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -60V to 0.5V (VB+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 15V (VB+ - VB-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75V Relay Drive Voltage (VRD). . . . . . . . . . . . . . . . . . . . . . . -0.5V to 15V
Thermal Information
Thermal Resistance (Typical, Note 2)
JA (C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Plastic Packages) . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300C (SOIC - Lead Tips Only)
Operating Conditions
Operating Temperature Range HC-5504B-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 75C Relay Driver Voltage (VRD) . . . . . . . . . . . . . . . . . . . . . . . . . 5 to 12V Positive Supply Voltage (VB+) . . . . . . . 4.75 to 5.25 or 10.8 to 13.2V Negative Supply Voltage (VB-) . . . . . . . . . . . . . . . . . . . . -42 to -58V High Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V Low Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V Loop Resistance (RL) . . . . . . . . . . . . . . . . . . . . . . . . . 200 to 1200
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 x 102 Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER On Hook Power Dissipation Off Hook Power Dissipation Off Hook IB+ Off Hook IB+ Off Hook IBOff Hook Loop Current Off Hook Loop Current Off Hook Loop Current Fault Currents TIP to Ground RING to Ground TIP to RING TIP and RING to Ground Ring Relay Drive VOL Ring Relay Driver Off Leakage Ring Trip Detection Period Switch Hook Detection Threshold
Unless Otherwise Specified, VB- = -48V, VB+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters TA = 25C. Min-Max Parameters are Over Operating Temperature Range CONDITIONS ILONG = 0 (Note 3), VB+ = 12V RL = 600, ILONG = 0 (Note 3), VB+ = 12V RL = 600, ILONG = 0 (Note 3), TA = -40C RL = 600, ILONG = 0 (Note 3), TA = 25C RL = 600, ILONG = 0 (Note 3) RL = 1200, ILONG = 0 (Note 3) RL = 1200, VB- = -42V, ILONG = 0 (Note 3) TA = 25C RL = 200, ILONG = 0 (Note 3) MIN 17.5 36 TYP 170 425 35 21 41 MAX 235 550 6.0 5.3 41 48 UNITS mW mW mA mA mA mA mA mA
IOL = 62mA VRD = 12V, RC = 1 = HIGH, TA = 25C RL = 600 SHD = VOL SHD = VOH 10 20 -
14 55 41 55 0.2 2 -
0.5 100 3 5 10
mA mA mA mA V A Ring Cycles mA mA mA mA
Ground Key Detection Threshold
GKD = VOL GKD = VOH
2
HC-5504B
Electrical Specifications
PARAMETER Loop Current During Power Denial Dial Pulse Distortion Receive Input Impedance Transmit Output Impedance 2-Wire Return Loss SRL LO ERL SRL HI Longitudinal Balance 2-Wire Off Hook 2-Wire On Hook 4-Wire Off Hook Low Frequency Longitudinal Balance R.E.A. Method (Note 3), RL = 600 0C TA 75C at 1kHz, 0dBm Input Level, Referenced 600 200Hz - 3400Hz Referenced to Absolute Loss at 1kHz and 0dBm Signal Level (Note 3) (Note 3) Absolute Delay 2-Wire to 4-Wire, 4 Wire to 2-Wire Trans Hybrid Loss Overload Level 2-Wire to 4-Wire, 4 Wire to 2-Wire Level Linearity 2-Wire to 4-Wire, 4 Wire to 2-Wire Balance Network Set Up for 600 Termination at 1kHz VB+ = +5V VB+ = 12V At 1kHz Referenced to 0dBm Level (Note 3) +3 to -40dBm -40 to -50dBm -50 to -55dBm Power Supply Rejection Ratio VB+ to 2-Wire VB+ to Transmit VB- to 2-Wire VB- to Transmit (Note 3) 30 - 60Hz, RL = 600 15 15 15 15 dB dB dB dB 0.05 0.1 0.3 dB dB dB (Note 3) 36 1.5 1.75 40 2 ms dB VPEAK VPEAK 1 -89 5 -85 dBrnC dBm0p 0.05 0.02 0.2 0.05 dB dB 1VRMS 200Hz - 3400Hz (Note 3) IEEE Method 0C TA 75C (Note 3) (Note 3) Referenced to 600 + 2.16F (Note 3) 15.5 24 31 dB dB dB RL = 200 Unless Otherwise Specified, VB- = -48V, VB+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters TA = 25C. Min-Max Parameters are Over Operating Temperature Range (Continued) CONDITIONS MIN 0 TYP 2 110 10 MAX 5 20 UNITS mA ms k
58 60 50 -
65 63 58 -
23 -67
dB dB dB dBrnC dBm0p
Insertion Loss 2-Wire to 4-Wire, 4 Wire to 2-Wire Frequency Response Idle Channel Noise 2-Wire to 4-Wire, 4 Wire to 2-Wire
3
HC-5504B
Electrical Specifications
PARAMETER VB+ to 2-Wire VB+ to Transmit VB- to 2-Wire VB- to Transmit Logic Input Current (RS, RC, PD) Logic Inputs Logic `0' VIL Logic `1' VIH Logic Outputs Logic `0' VOL Logic `1' VOH ILOAD 800A, VB+ = 12V, 5V ILOAD 80A, VB+ = 12V ILOAD 40A, VB+ = 5V 2.7 2.7 0.1 5.0 0.5 5.5 5.0 V V V 2.0 0.8 5.5 V V 0V VIN 5V Unless Otherwise Specified, VB- = -48V, VB+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters TA = 25C. Min-Max Parameters are Over Operating Temperature Range (Continued) CONDITIONS 200 - 16kHz, RL = 600 MIN 30 30 30 30 TYP MAX 100 UNITS dB dB dB dB A
Uncommitted Op Amp Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Bias Current Differential Input Resistance Output Voltage Swing (Note 3) RL = 10K, VB+ = 12V RL = 10K, VB+ = 5V Output Resistance Small Signal GBW NOTES: 3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification compliance. 4. ILONG = Longitudinal Current. AVCL = 1 (Note 3) (Note 3) CONDITIONS MIN TYP 5 10 20 1 6.2 3 10 1 MAX 6.6 UNITS mV nA nA M VPEAK VPEAK MHz
4
HC-5504B Pin Descriptions
24 PIN SOIC 1 SYMBOL TIP DESCRIPTION An analog input connected to the TIP (more positive) side of the subscriber loop through a 150 feed resistor and a ring relay contact. Functions with the Ring terminal to receive voice signals from the telephone and for loop monitoring purposes. An analog input connected to the RING (more negative) side of the subscriber loop through a 150 feed resistor and a ring relay contact. Functions with the Tip terminal to receive voice signals from the telephone and for loop monitoring purposes. Senses ring side of loop for ground key and ring trip detection. During ringing, the ring signal is inserted into the line at this node and RF is isolated from RFS via a relay. Positive Voltage Source - Most positive supply. VB+ is typically 12V or 5V. Capacitor #3 - An external capacitor to be connected between this terminal and analog ground. Required for proper operation of the loop current limiting function, and for filtering VB-. Typical value is 0.3F, 30V. Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and outputs on the SLIC microcircuit. Ring Synchronization Input - A TTL-compatible clock input. The clock should be arranged such that a positive pulse transition occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This ensures that the ring relay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to 5V. Relay Driver - A low active open collector logic output. When enabled, the external ring relay is energized. Tip Feed - A low impedance analog output connected to the TIP terminal through a 150 feed resistor. Functions with the RF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. Ring Feed - A low impedance analog output connected to the RING terminal through a 150 feed resistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. Negative Voltage Source - Most negative supply. VB- is typically -48V with an operational range of -42V to -58V. Frequently referred to as "battery". Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground terminal. Switch Hook Detection - A low active LS TTL - compatible logic output. This output is enabled for loop currents exceeding 10mA and disabled for loop currents less than 5mA. Ground Key Detection - A low active LS TTL - compatible logic output. This output is enabled if the DC current into the ring lead exceeds the DC current out of the tip lead by more than 20mA, and disabled if this current difference is less than 10mA. Power Denial - A low active TTL - Compatible logic input. When enabled, the switch hook detect (SHD) and ground key detect (GKD) are not necessarily valid, and the relay driver (RD) output is disabled. Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output goes low on the next high level of the ring sync (RS) input, as long as the SLIC is not in the power denial state (PD = 0) or the subscriber is not already off- hook (SHD = 0). Capacitor #2 - An external capacitor to be connected between this terminal and digital ground. Prevents false ground key indications from occurring during ring trip detection. Typical value is 0.15F, 10V. This capacitor is not used if ground key function is not required and (Pin 17) may be left open or connected to digital ground. The analog output of the spare operational amplifier. The output voltage swing is typically 5V. The inverting analog input of the spare operational amplifier. The non-inverting analog input of the spare operational amplifier.
2
RING
3
RFS
4 5
VB+ C3 DG (Note 5) RS
6
7
8 9
RD TF
10
RF
11
VBBG (Note 5) SHD
12
13
14
GKD
15
PD
16
RC
17
C2
18 19 20
OUT -IN +IN
5
HC-5504B Pin Descriptions
24 PIN SOIC 21 SYMBOL RX (Continued)
DESCRIPTION Receive Input, 4-Wire Side - A high impedance analog input which is internally biased. Capacitive coupling to this input is required. AC signals appearing at this input differentially drive the Tip feed and Ring feed terminals, which in turn drive tip and ring through 300 of feed resistance on each side of the line. Capacitor #4 - An external capacitor to be connected between this terminal and analog ground. This capacitor prevents false ground key indication and false ring trip detection from occurring when longitudinal currents are induced onto the subscriber loop from near by power lines and other noise sources. This capacitor is also required for the proper operation of ring trip detection. Typical value is 0.5F, to 1.0F, 20V. This capacitor should be nonpolarized. Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX) and receive input (RX) terminals. Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across Tip and Ring. Transhybrid balancing must be performed (using the SLIC microcircuit's spare op amp) beyond this output to completely implement two to four wire conversion. This output is unbalanced and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is essential. No internal connection.
22
C4
23
AG (Note 5) TX
24
NC
Functional Diagram
RING TRIP RING CONTROL LOOP MONITORING
RING SYNC RING COMMAND
RS RC RD
SHD SWITCH HOOK DETECTION GKD GROUND KEY DETECTION DIFF AMP
TIP
1/2 RING RELAY
TIP 150 150
+
-
TX
TRANSMIT OUTPUT
2 WIRE LOOP SECONDARY PROTECTION
TF VBBATTERY FEED BG +1 OUT
VBRFS 1/2 RING RELAY RING 150 RING VOLTAGE V B-
RF LOOP CURRENT LIMITER LINE DRIVERS + OP AMP
+IN
-
150 -1 RING PD SLIC MICROCIRCUIT
-IN RX
RECEIVE INPUT
POWER DENIAL
6
HC-5504B Schematic Diagram
SLIC FUNCTIONAL SCHEMATIC Pin Numbers for SOIC Package
21 RX
22 C4
11 VBAT
12 BAT GND
23 ANA GND VB+
6 DIG GND
4 VB+
20
19
18 OUT VB+
+
-
VOLTAGE AND CURRENT BIAS NETWORK
VB+ TF 9 VBAT
+ A-400 TIP FEED AMP IB4
R17 VB2 IB1 IB2 IB3 IB4 IB5 IB6 IB7 IB8 VBAT IB9 IB10 IB11
VB1 VB2 VB3 VB4 VB5 +5V
A-500 OP AMP
VBAT IB3
R12
RING TRIP DETECTOR 5V VB+ A-200 LONG'L I / V AMP + VBAT IB7 IB8 R20 + VBAT VB4 GND SHORTS CURRENT LIMITING IB1 R5 + VB+ A-100 TRANSV'L I/V AMP SWITCH HOOK DETECTOR VB+ SH + R6 VBAT/2 REFERENCE VB2 R14 R18 QD27 IB6 QD28 THERMAL LIMITING RFC RC 16 SHD 13 VB1 VBAT GK GKD 14 5V IB10 VB+
R7 TIP R8 1 RING FEED SENSE 3 R10 R9 R22 R11 VBAT V + VBAT R23 B QD3 QD36 VB+
-
-
+ VB3 STTL AND LOGIC INTERFACE
C2 17
R3 RING 2 R4 R1 R2 R16 R15
IB6
VBAT
-
RF 10 VBAT IB5 A-300 RING FEED AMP +
R21
LOAD CURRENT LIMITING I B2
-
VB5
VB5
PD 15
+
R19
VBAT
R13 VBAT
VBAT
C3 5
TX 24
RS 7
RD 8
7
HC-5504B Schematic Diagram
(Continued) LOGIC GATE SCHEMATIC
C2
GK
1
2
LOGIC BIAS DELAY 6 4 8 3
5 7 9 12
SH
16 10
13 11 15 TTL TO STTL TTL TO STTL TTL TO STTL TO R21 C SCHOTTKY LOGIC 14 RELAY DRIVER
A B
C B A
STTL TO TTL
STTL TO TTL
RS
RC
PD
RD
SHD
GKD
Overvoltage Protection and Longitudinal Current Protection
The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses. High voltage surge conditions are as specified in Table 1. The SLIC will withstand longitudinal currents up to a maximum or 30mARMS , 15mARMS per leg, without any performance degradation.
PARAMETER Longitudinal Surge Metallic Surge
TABLE 1. TEST CONDITION 10s Rise/ 1000s Fall 10s Rise/ 1000s Fall T/GND R/GND 50/60Hz Current T/GND R/GND 11 Cycles Limited to 10ARMS 700 (Plastic) 350 (Ceramic) VRMS VRMS 10s Rise/ 1000s Fall PERFORMANCE (MAX) 1000 (Plastic) 500 (Ceramic) 1000 (Plastic) 500 (Ceramic) 1000 (Plastic) 500 (Ceramic) UNITS VPEAK VPEAK VPEAK VPEAK VPEAK VPEAK
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
HC-5504B Applications Diagram
5V TO 12V 15 RS1 CS1 K1
SYSTEM CONTROLLER 13 14 7 16 BALANCE NETWORK 21 24 20 19 R3 18 R2 C6 R1 ZB C5 C7 PCM SWITCHING FILTER/ NETWORK CODEC
TIP
K1A
RB1
SUBSCRIBER LOOP PRIMARY PROTECTION K1B
1
POWER SWITCH GROUND RING RING SYNC CMD DENIAL HOOK KEY 8 DETECT DETECT RD RX 1 TIP TX RB2 9 SLIC TIP FEED +IN HC-5504B -IN OP AMP VB OUT
10 RING FEED RS2 CS2 3 RB4 2 RING RING FEED SENSE C3 NEG. BATT. 11 C8 BATT. GND. 12 DIG. GND. 6 ANA. GND. 23 C9 C4 VB+ 4 C4 + C3 C2 17 5 22 + C2
RING PTC
RB3
-48V Z1
VB +
150VPEAK (MAX) RING GENERATOR -48V
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
Typical Component Values
C2 = 0.15F, 10V. C3 = 0.3F, 30V. C4 = 0.5F to 1.0F, 10%, 20V (Should be nonpolarized). C5 = 0.5F, 20V. C6 = C7 = 0.5F (10% Match Required) (Note 7). C8 = 0.01F, 100V. C9 = 0.01F, 20V, 20%.
NOTES: 5. Secondary protection diode bridge recommended is a 2A, 200V type. 6. To obtain the specified transhybrid loss it is necessary for the three legs of the balance network, C6-R1 and R2 and C7-ZB-R3 , to match in impedance to within 0.3%. Thus, if C6 and C7 are 1F each, a 20% match is adequate. It should be noted that the transmit output to C6 sees a -22V step when the loop is closed. Too large a value for C6 may produce an excessively long transient at the op amp output to the PCM Filter/CODEC. A 0.5F and 100k gives a time constant of 50ms. The uncommitted op amp output is internally clamped to stay within 6.6V and is current limited. 7. All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 8. Application shows Ring Injected Ringing, Balanced or Tip injected configuration may be used. 9. Pin numbers given for SOIC package.
R1 = R2 = R3 = 100k (0.1% Match Required, 1% absolute value) ZB = 0 for 600 Terminations (Note 7). RB1 = RB2 = RB3 = RB4 = 150 (0.1% Match Required, 1% absolute value). RS1 = RS2 =1k, typically. CS1 = CS2 = 0.1F, 200V typically, depending on VRING and line length. Z1 = 150V to 200V transient protection. PTC used as ring generator ballast.
9


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