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| AP9936M Advanced Power Electronics Corp. DC-DC Application Dual N-channel Device Surface Mount Package G2 S2 D1 D1 D2 D2 N-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID 30V 50m 5A SO-8 S1 G1 Description D1 D2 The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. G1 S1 G2 S2 Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating 30 20 5 4 40 2 0.016 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-amb Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit /W Data and specifications subject to change without notice 20102202 AP9936M Electrical Characteristics@T j=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 30 1 - Typ. 0.037 Max. Units 50 80 3 1 25 100 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Static Drain-Source On-Resistance VGS=10V, ID=5A VGS=4.5V, ID=3.9A VDS=VGS, ID=250uA VDS=15V, ID=5A 6 6.1 1.4 3.3 6.7 6.4 22.1 2.1 240 145 55 Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=30V, VGS=0V VDS=24V ,VGS=0V VGS= 20V ID=5A VDS=15V VGS=5V VDS=15V ID=1.5A RG=3.3,VGS=10V RD=10 VGS=0V VDS=25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol IS VSD Parameter Continuous Source Current ( Body Diode ) Test Conditions VD=VG=0V , VS=1.2V Tj=25, IS=1.7A, VGS=0V Min. - Typ. - Max. Units 1.67 1.2 A V Forward On Voltage 2 Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 135/W when mounted on Min. copper pad. AP9936M 60 45 T C =25 o C 10V 8.0V T C =150 o C 10V 8.0V ID , Drain Current (A) 40 ID , Drain Current (A) 5.0V 30 6.0V 20 15 4.0V V GS =3.0V 4.0V V GS =3.0V 0 0 2 4 6 0 0 2 4 6 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 120 1.8 I D =5A T C =25 100 I D =5A V GS =10V 1.6 RDS(ON) (m ) 80 Normalized R DS(ON) 2 4 6 8 10 12 1.4 1.2 60 1 40 0.8 20 0.6 -50 0 50 100 150 V GS (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature AP9936M 8 2.5 2 6 ID , Drain Current (A) 1.5 4 PD (W) 1 0.5 0 2 0 25 50 75 100 125 150 0 50 100 150 T c , Case Temperature ( o C) T c , Case Temperature ( o C) Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature 100 1 Duty Factor = 0.5 100us Normalized Thermal Response (R thja) 10 0.2 0.1 0.1 1ms ID (A) 0.05 1 10ms 100ms 1s 0.02 0.01 PDM 0.01 Single Pulse t T 0.1 10s T C =25 o C Single Pulse 0.01 0.1 1 10 100 Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=135 oC/W DC 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance AP9936M 12 f=1.0MHz 1000 10 I D =5A V DS =15V VGS , Gate to Source Voltage (V) 8 Ciss C (pF) Coss 100 6 4 Crss 2 0 0 2 4 6 8 10 12 10 1 8 15 22 29 Q G , Total Gate Charge (nC) V DS (V) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 10 2.5 2 Tj=150 o C Tj=25 o C VGS(th) (V) IS(A) 1 1.5 1 0.1 0 0.4 0.8 1.2 1.6 0.5 -50 0 50 100 150 V SD (V) T j , Junction Temperature ( C ) o Fig 11. Forward Characteristic of Reverse Diode Fig 12. Gate Threshold Voltage v.s. Junction Temperature |
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