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LT5518 1.5GHz-2.4GHz High Linearity Direct Quadrature Modulator FEATURES

DESCRIPTIO

High Input Impedance Version of the LT5528 Direct Conversion to 1.5GHz - 2.4GHz High OIP3: 22.8dBm at 2GHz Low Output Noise Floor at 20MHz Offset: No RF: -158.2dBm/Hz POUT = 4dBm: -152.5dBm/Hz 4-Ch W-CDMA ACPR: -64dBc at 2.14GHz Integrated LO Buffer and LO Quadrature Phase Generator 50 AC-Coupled Single-Ended LO and RF Ports Low Carrier Leakage: -49dBm at 2GHz High Image Rejection: 40dB at 2GHz 16-Lead QFN 4mm x 4mm Package
APPLICATIO S

Infrastructure Tx for DCS, PCS and UMTS Bands Image Reject Up-Converters for DCS, PCS and UMTS Bands Low Noise Variable Phase-Shifter for 1.5GHz to 2.4GHz Local Oscillator Signals
The LT(R)5518 is a direct I/Q modulator designed for high performance wireless applications, including wireless infrastructure. It allows direct modulation of an RF signal using differential baseband I and Q signals. It supports PHS, GSM, EDGE, TD-SCDMA, CDMA, CDMA2000, W-CDMA and other systems. It may also be configured as an image reject up-converting mixer, by applying 90 phase-shifted signals to the I and Q inputs. The high impedance I/Q baseband inputs consist of voltage-to-current converters that in turn drive double-balanced mixers. The outputs of these mixers are summed and applied to an on-chip RF transformer, which converts the differential mixer signals to a 50 single-ended output. The balanced I and Q baseband input ports are intended for DC coupling from a source with a common mode voltage level of about 2.1V. The LO path consists of an LO buffer with single-ended input, and precision quadrature generators that produce the LO drive for the mixers. The supply voltage range is 4.5V to 5.25V.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
1.5GHz to 2.4GHz Direct Conversion Transmitter Application with LO Feedthrough and Image Calibration Loop
VCC 8, 13 14 I-DAC 16 V-I I-CHANNEL EN 1 Q-CHANNEL V-I CAL BASEBAND GENERATOR 0 90 7 Q-DAC 5 BALUN 11 LT5518 5V 100nF x2 RF = 1.5GHz TO 2.4GHz PA LO FEEDTHROUGH CAL OUT IMAGE CAL OUT
W-CDMA ACPR, AltCPR and Noise vs RF Output Power at 2140MHz for 1 and 4 Channels
-55 4-CH ACPR -60 ACPR, ALTCPR (dBc) -65 1-CH ACPR -70 -75 -80 1-CH ALTCPR 4-CH NOISE -150 -155 1-CH NOISE -160 -165 4-CH ALTCPR -140 -145 -135 NOISE FLOOR AT 30MHz OFFSET (dBm/Hz)
2, 4, 6, 9, 10, 12, 15, 17
3 VCO/SYNTHESIZER
ADC
5518 TA01a
DOWNLINK TEST MODEL 64 DPCH -85 -34 -30 -26 -22 -18 -14 -10 RF OUTPUT POWER PER CARRIER (dBm)
5518 TA01b
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LT5518 ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW BBMI BBPI GND VCC
BBMQ
BBPQ
Supply Voltage .........................................................5.5V Common Mode Level of BBPI, BBMI and BBPQ, BBMQ .......................................................2.5V Operating Ambient Temperature (Note 2) .............................................. -40C to 85C Storage Temperature Range.................. -65C to 125C Voltage on Any Pin Not to Exceed...................... -500mV to VCC + 500mV
ORDER PART NUMBER
12 GND
16 15 14 13 EN 1 GND 2 LO 3 GND 4 5 6 GND 7 8 VCC 17
LT5518EUF
11 RF 10 GND 9 GND
UF PART MARKING 5518
TJMAX = 125C, JA = 37C/W EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO THE PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL RF Output (RF) fRF S22, ON S22, OFF NFloor PARAMETER RF Frequency Range RF Frequency Range RF Output Return Loss RF Output Return Loss RF Output Noise Floor
VCC = 5V, EN = High, TA = 25C, fLO = 2GHz, fRF = 2.002GHz, PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 2.06VDC, Baseband Input Frequency = 2MHz, I and Q 90 shifted (upper sideband selection). PRF, OUT = -10dBm, unless otherwise noted. (Note 3)
CONDITIONS -3dB Bandwidth -1dB Bandwidth EN = High (Note 6) EN = Low (Note 6) No Input Signal (Note 8) POUT = 4dBm (Note 9) POUT = 4dBm (Note 10) POUT/PIN, I&Q 20 * log(VOUT, 50/VIN, DIFF, I or Q) 1VP-P, DIFF CW Signal, I and Q (Note 17) (Note 7) (Notes 13, 14) (Notes 13, 15) (Note 16) EN = High, PLO = 0dBm (Note 16) EN = Low, PLO = 0dBm (Note 16) MIN TYP 1.5 to 2.4 1.7 to 2.2 -14 -12 -158.2 -152.5 -151.1 10.6 -4 0 -28 8.5 49 22.8 -40 -49 -58 1.5 to 2.4 0 -18 -5 14 23.8 -9 MAX UNITS GHz GHz dB dB dBm/Hz dBm/Hz dBm/Hz dB dB dBm dB dBm dBm dBm dBc dBm dBm GHz dBm dB dB dB dB dBm
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GP GV POUT G3LO vs LO OP1dB OIP2 OIP3 IR LOFT LO Input (LO) fLO PLO S11, ON S11, OFF NFLO GLO IIP3LO
Conversion Power Gain Conversion Voltage Gain Absolute Output Power 3 * LO Conversion Gain Difference Output 1dB Compression Output 2nd Order Intercept Output 3rd Order Intercept Image Rejection Carrier Leakage (LO Feedthrough) LO Frequency Range LO Input Power LO Input Return Loss LO Input Return Loss LO Input Referred Noise Figure LO to RF Small Signal Gain LO Input Linearity
-10 EN = High (Note 6) EN = Low (Note 6) (Note 5) at 2GHz (Note 5) at 2GHz (Note 5) at 2GHz
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LT5518 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Baseband Inputs (BBPI, BBMI, BBPQ, BBMQ) Baseband Bandwidth BWBB VCMBB DC Common Mode Voltage RIN, DIFF Differential Input Resistance RIN, CM Common Mode Input Resistance ICM, COMP Common Mode Compliance Current Range PLO2BB Carrier Feedthrough on BB IP1dB Input 1dB Compression Point GI/Q I/Q Absolute Gain Imbalance I/Q I/Q Absolute Phase Imbalance Power Supply (VCC) VCC Supply Voltage ICC, ON Supply Current ICC, OFF Supply Current, Sleep Mode tON Turn-On Time tOFF Turn-Off Time Enable (EN), Low = Off, High = On Enable Input High Voltage Input High Current Sleep Input Low Voltage
VCC = 5V, EN = High, TA = 25C, fLO = 2GHz, fRF = 2.002GHz, PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 2.06VDC, Baseband Input Frequency = 2MHz, I and Q 90 shifted (upper sideband selection). PRF, OUT = -10dBm, unless otherwise noted. (Note 3)
CONDITIONS -3dB Bandwidth (Note 4) Between BBPI and BBMI (or BBPQ and BBMQ) BBPX and BBMX Shorted Together BBPX and BBMX Shorted Together (Note 18) POUT = 0 (Note 4) Differential Peak-to-Peak (Note 7) MIN TYP 400 2.06 2.9 105 -730 to 480 -40 2.7 0.06 1 4.5 EN = High EN = 0V EN = Low to High (Note 11) EN = High to Low (Note 12) EN = High EN = 5V EN = Low 1.0 240 0.5 5 128 0.05 0.2 1.3 5.25 145 50 MAX UNITS MHz V k A dBm VP-P, DIFF dB deg V mA A s s V A V
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Specifications over the -40C to 85C temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Tests are performed as shown in the configuration of Figure 8. Note 4: On each of the four baseband inputs BBPI, BBMI, BBPQ and BBMQ. Note 5: V(BBPI) - V(BBMI) = 1VDC, V(BBPQ) - V(BBMQ) = 1VDC. Note 6: Maximum value within -1dB bandwidth. Note 7: An external coupling capacitor is used in the RF output line. Note 8: At 20MHz offset from the LO signal frequency. Note 9: At 20MHz offset from the CW signal frequency. Note 10: At 5MHz offset from the CW signal frequency. Note 11: RF power is within 10% of final value. Note 12: RF power is at least 30dB lower than in the ON state.
Note 13: Baseband is driven by 2MHz and 2.1MHz tones. Drive level is set in such a way that the two resulting RF output tones are -10dBm each. Note 14: IM2 measured at LO frequency + 4.1MHz. Note 15: IM3 measured at LO frequency + 1.9MHz and LO frequency + 2.2MHz. Note 16: Amplitude average of the characterization data set without image or LO feedthrough nulling (unadjusted). Note 17: The difference in conversion gain between the spurious signal at f = 3 * LO - BB versus the conversion gain at the desired signal at f = LO + BB for BB = 2MHz and LO = 2GHz. Note 18: Common mode current range where the common mode (CM) feedback loop biases the part properly. The common mode current is the sum of the current flowing into the BBPI (or BBPQ) pin and the current flowing into the BBMI (or BBMQ) pin.
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VCC = 5V, EN = High, TA = 25C, fLO = 2.14GHz, PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 2.06VDC, Baseband Input Frequency fBB = 2MHz, I and Q 90 shifted without image or LO feedthrough nulling. fRF = fBB + fLO (upper sideband selection). PRF, OUT = -10dBm (-10dBm/tone for 2-tone measurements), unless otherwise noted. (Note 3) Voltage Gain and Output 1dB RF Output Power vs LO Frequency Compression vs LO Frequency at 1VP-P Differential Baseband Drive and Temperature Supply Current vs Supply Voltage
140 TA = 85C VOLTAGE GAIN (dB), OP1dB (dBm) 10 OP1dB 5 0 GAIN -5 -10 -15 1.3 130 TA = 25C RF OUTPUT POWER (dBm) 5 15 4.5V 5.5V 5V
TYPICAL PERFOR A CE CHARACTERISTICS
SUPPLY CURRENT (mA)
120 TA = -40C 110
100 4.5
5.0 SUPPLY VOLTAGE (V)
Voltage Gain and Output 1dB Compression vs LO Frequency and Supply Voltage
15 VOLTAGE GAIN (dB), OP1dB (dBm) 10 5 OIP3 (dBm) 0 -5 - 10 - 15 1.3 GAIN 4.5V 5.5V 5V
OP1dB
18 16
-154 -156 -158 -160 -162
OIP3 (dBm)
1.5
2.3 1.7 1.9 2.1 LO FREQUENCY (GHz)
LO Feedthrough to RF Output vs LO Frequency
- 40 -25 -30 - 45 P(2 * LO) (dBm) -35 -40 -45 -50 LO FT (dBm)
P(3 * LO) (dBm)
- 50
- 55
- 60
5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 1.3 1.5 2.3 1.7 1.9 2.1 LO FREQUENCY (GHz) 2.5 2.7
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-5
-10
5.5
-15 1.3
5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 1.5 1.7 2.3 LO FREQUENCY (GHz) 1.9 2.1 2.5 2.7
1.5
1.7
1.9 2.1 2.3 LO FREQUENCY (GHz)
2.5
2.7
5518 G02
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26 24 22 20
Output IP3 and Noise Floor vs LO Frequency and Temperature
OIP3
-146 TA = -40C TA = 85C -148 TA = 25C -150 NOISE FLOOR (dBm/Hz) -152
26 24 22 20 18 16
Output IP3 and Noise Floor vs LO Frequency and Supply Voltage
OIP3 4.5V 5.5V 5V fBB, 1 = 2MHz fBB, 2 = 2.1MHz
-146 -148 -150 NOISE FLOOR (dBm/Hz) -152 -154 -156 -158 -160 -162
fBB, 1 = 2MHz fBB, 2 = 2.1MHz
14 NOISE FLOOR 12 10 8
14 NOISE FLOOR 12 10 8 6 1.3 1.5
2.5
2.7
6 1.3 1.5
NO BASEBAND SIGNAL -164 fLO = 2.14GHz (FIXED) FOR NOISE -166 2.5 2.7 2.3 1.7 1.9 2.1 LO/NOISE FREQUENCY (GHz)
5518 G05
NO BASEBAND SIGNAL -164 fLO = 2.14GHz (FIXED) FOR NOISE -166 2.5 2.7 2.3 1.7 1.9 2.1 LO/NOISE FREQUENCY (GHz)
5518 G06
5518 G04
2 * LO Leakage to RF Output vs 2 * LO Frequency
5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C -30 -35 -40 -45 -50 -55 -60 -65 3.0 5.0 4.6 3.4 3.8 4.2 2 * LO FREQUENCY (GHz) 5.4
3 * LO Leakage to RF Output vs 3 * LO Frequency
-55 2.6
-70 3.9
5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 4.5 5.1 5.7 6.3 6.9 7.5 8.1 3 * LO FREQUENCY (GHz)
5518 G09
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VCC = 5V, EN = High, TA = 25C, fLO = 2.14GHz, PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 2.06VDC, Baseband Input Frequency fBB = 2MHz, I and Q 90 shifted without image or LO feedthrough nulling. fRF = fBB + fLO (upper sideband selection). PRF, OUT = -10dBm (-10dBm/tone for 2-tone measurements), unless otherwise noted. (Note 3) Image Rejection vs LO Frequency
-25 -30 IMAGE REJECTION (dBc) -35 -40 -45 -50 -55 1.3 5V, TA = - 40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 1.5 1.7 2.3 LO FREQUENCY (GHz) 1.9 2.1 2.5 2.7 ABSOLUTE I/Q GAIN IMBALANCE (dB) 02
TYPICAL PERFOR A CE CHARACTERISTICS
ABSOLUTE I/Q PHASE IMBALANCE (DEG)
Voltage Gain vs LO Power
-2 -4 -6 VOLTAGE GAIN (dB) OIP3 (dBm) -8 -10 -12 -14 -16 5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 8
5518 G13
16 14 12 10 8 6 5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 8
5518 G14
HD2, HD3 (dBc)
-18 0 4 -20 -16 -12 - 8 -4 LO INPUT POWER (dBm)
RF CW Output Power, HD2 and HD3 vs Baseband Voltage and Supply Voltage
- 10 - 20 HD2, HD3 (dBc) - 30 - 40 - 50 HD2 10 0 HD3 4.5V 5.5V 5V -10 -20 -30 -25 -30 LO FT (dBm), IR (dBc) -35 -40 -45
RF
LO FT (dBm), IR (dBc)
HD2 = MAX POWER AT fLO + 2 * fBB OR fLO - 2 * fBB -40 - 60 HD3 = MAX POWER AT fLO + 3 * fBB OR fLO - 3 * fBB - 70 -50 5 0 2 3 4 1 I AND Q BASEBAND VOLTAGE (VP-P, DIFF)
5518 G16
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5518 G10
Absolute I/Q Gain Imbalance vs LO Frequency
5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 5
Absolute I/Q Phase Imbalance vs LO Frequency
5V, TA = - 40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C
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0.1
2
1
0 1.3
1.5
1.7
2.3 LO FREQUENCY (GHz)
1.9
2.1
2.5
2.7
0 1.3
1.5
1.7
1.9 2.1 2.3 LO FREQUENCY (GHz)
2.5
2.7
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Output IP3 vs LO Power
24 22 20 18 -20 -30 -40 -10
RF CW Output Power, HD2 and HD3 vs Baseband Voltage and Temperature
10 0 HD3 TA = - 40C - 10 TA = 85C TA = 25C - 20 HD2 -50 - 30 HD2 = MAX POWER AT fLO + 2 * fBB OR fLO - 2 * fBB - 40 -60 HD3 = MAX POWER AT fLO + 3 * fBB OR fLO - 3 * fBB -70 - 50 0 2 3 4 5 1 I AND Q BASEBAND VOLTAGE (VP-P, DIFF)
5518 G15
RF CW OUTPUT POWER (dBm)
RF
4 0 -20 -16 -12 -8 -4 4 LO INPUT POWER (dBm)
LO Feedthrough to RF Output and Image Rejection vs Baseband Voltage and Temperature
TA = -40C TA = 85C TA = 25C -25 LO FT -30 -35 -40 -45
LO Feedthrough to RF Output and Image Rejection vs Baseband Voltage and Supply Voltage
4.5V 5.5V 5V LO FT
RF CW OUTPUT POWER (dBm)
IR -50 -55 -50 -55
IR
0
5 3 4 2 1 I AND Q BASEBAND VOLTAGE (VP-P, DIFF)
5518 G17
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5 2 3 4 1 I AND Q BASEBAND VOLTAGE (VP-P, DIFF)
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LT5518 TYPICAL PERFOR A CE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25C, fLO = 2.14GHz, PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 2.06VDC, Baseband Input Frequency fBB = 2MHz, I and Q 90 shifted without image or LO feedthrough nulling. fRF = fBB + fLO (upper sideband selection). PRF, OUT = -10dBm (-10dBm/tone for 2-tone measurements), unless otherwise noted. (Note 3) Output IP2 vs LO Frequency
65 60 55 OIP2 (dBm) S11 (dB) -20 RF PORT, EN = HIGH, NO LO RF PORT, EN = HIGH, PLO = 0dBm -40 LO PORT, EN = HIGH 50 45 40 35 1.3 fBB,1 = 2MHz fBB,2 = 2.1MHz fIM2 = fBB,1+ fBB,2 + fLO 0 LO PORT, EN = LOW -10
5V, TA = -40C 5V, TA = 25C 5V, TA = 85C 4.5V, TA = 25C 5.5V, TA = 25C 1.5 2.3 1.7 1.9 2.1 LO FREQUENCY (GHz) 2.5 2.7
PI FU CTIO S
EN (Pin 1): Enable Input. When the enable pin voltage is higher than 1V, the IC is turned on. When the input voltage is less than 0.5V, the IC is turned off. GND (Pins 2, 4, 6, 9, 10, 12, 15): Ground. Pins 6, 9, 15 and 17 (exposed pad) are connected to each other internally. Pins 2 and 4 are connected to each other internally and function as the ground return for the LO signal. Pins 10 and 12 are connected to each other internally and function as the ground return for the on-chip RF balun. For best RF performance, pins 2, 4, 6, 9, 10, 12, 15 and the Exposed Pad (Pin 17) should be connected to the printed circuit board ground plane. LO (Pin 3): LO Input. The LO input is an AC-coupled singleended input with approximately 50 input impedance at RF frequencies. Externally applied DC voltage should be within the range -0.5V to VCC + 0.5V in order to avoid turning on ESD protection diodes. BBPQ, BBMQ (Pins 7, 5): Baseband Inputs for the Q-Channel, with 2.9k Differential Input Impedance. Internally biased at about 2.06V. Applied common mode voltage must stay below 2.5V. VCC (Pins 8, 13): Power Supply. Pins 8 and 13 are connected to each other internally. It is recommended to use 0.1F capacitors for decoupling to ground on each of these pins. RF (Pin 11): RF Output. The RF output is an AC-coupled single-ended output with approximately 50 output impedance at RF frequencies. Externally applied DC voltage should be within the range -0.5V to VCC + 0.5V in order to avoid turning on ESD protection diodes. BBPI, BBMI (Pins 14, 16): Baseband Inputs for the I-Channel, with 2.9k Differential Input Impedance. Internally biased at about 2.06V. Applied common mode voltage must stay below 2.5V. Exposed Pad (Pin 17): Ground. This pin must be soldered to the printed circuit board ground plane.
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LO and RF Port Return Loss vs RF Frequency
-30
RF PORT, EN = LOW
-50 1.3
1.5
1.7 1.9 2.1 2.3 RF FREQUENCY (GHz)
2.5
2.7
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LT5518 BLOCK DIAGRA W
VCC 8 BBPI 14 BBMI 16 V-I 11 RF 0 90 BBPQ 7 BBMQ 5 V-I BALUN 1 EN 13 LT5518 2 4 GND 6 9 3 LO 10 12 15 17
5518 BD
GND
APPLICATIO S I FOR ATIO
The LT5518 consists of I and Q input differential voltageto-current converters, I and Q up-conversion mixers, an RF output balun, an LO quadrature phase generator and LO buffers. External I and Q baseband signals are applied to the differential baseband input pins, BBPI, BBMI, and BBPQ, BBMQ. These voltage signals are converted to currents and translated to RF frequency by means of double-balanced up-converting mixers. The mixer outputs are combined
RF VCC = 5V C BALUN
200 BBPI 1.8pF 1.3k CM 1.8pF 200 BBMI
5518 F01
Figure 1. Simplified Circuit Schematic of the LT5518 (Only I-Half is Drawn)
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in an RF output balun, which also transforms the output impedance to 50. The center frequency of the resulting RF signal is equal to the LO signal frequency. The LO input drives a phase shifter which splits the LO signal into in-phase and quadrature LO signals. These LO signals are then applied to on-chip buffers which drive the upconversion mixers. Both the LO input and RF output are single-ended, 50-matched and AC coupled.
LT5518 FROM Q LOMI LOPI VREF = 500mV 1.3k GND
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LT5518 APPLICATIO S I FOR ATIO
Baseband Interface The baseband inputs (BBPI, BBMI), (BBPQ, BBMQ) present a differential input impedance of about 2.9k. At each of the four baseband inputs, a lowpass filter using 200 and 1.8pF to ground is incorporated (see Figure 1), which limits the baseband bandwidth to approximately 250MHz (-1dB point). The common mode voltage is about 2.06V and is slightly temperature dependent. At TA = -40oC, the common mode voltage is about 2.19V and at TA = 85oC it is about 1.92V. If the I/Q signals are DC-coupled to the LT5518, it is important that the applied common mode voltage level of the I and Q inputs is about 2.06V in order to properly bias the LT5518. Some I/Q test generators allow setting the common mode voltage independently. In this case, the common mode voltage of those generators must be set to 1.03V to match the LT5518 internal bias, because for DC signals, there is no -6dB source-load voltage division (see Figure 2).
50 1.03VDC 50 2.06VDC 1.5k
+ -
2.06VDC GENERATOR
50
+ -
2.06VDC GENERATOR
LT5518
5518 F02
Figure 2. DC Voltage Levels for a Generator Programmed at 1.03VDC for a 50 Load and for the LT5518 as a Load
The LT5518 should be driven differentially; otherwise, the even-order distortion products will degrade the overall linearity severely. Typically, a DAC will be the signal source for the LT5518. A reconstruction filter should be placed between the DAC output and the LT5518's baseband inputs. DC coupling between the DAC outputs and the LT5518 baseband inputs is recommended. Active level shifters may be required to adapt the common mode level of the DAC outputs to the common mode input voltage of the LT5518. It is also possible to achieve a DC level shift with passive components, depending on the application. For example, if flat frequency response to DC is not required, then the interface circuit of Figure 3 may be used. This figure shows a commonly used 0mA - 20mA DAC output followed by a passive 5th order lowpass filter. The DC-coupled interface allows adjustment of the
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DAC's differential output current to minimize the LO to RF feedthrough. Resistors R3A, R3B, R4A and R4B translate the DAC's output common mode level from about 0.5VDC to the LT5518's input at about 2.06VDC. For these resistors, 1% accuracy is recommended. For different ambient temperatures, the LT5518 input common mode level varies with a temperature coefficient of about -2.7mV/C. The internal common mode feedback loop will correct these level changes in order to bias the LT5518 at the correct operating point. Resistors R3 and R4 are chosen high enough that the LT5518 common mode compliance current value will not be exceeded at the inputs of the LT5518 as a result of temperature shifts. Capacitors C4A and C4B minimize the input signal attenuation caused by the network R3A, R3B, R4A and R4B. This results in a gain difference between low frequency and high frequency baseband signals. The high frequency baseband -3dB corner point is approximately given by: f-3dB = 1/[2 * C4A * (R3A||R4A||(RIN, DIFF/2)] In this example, f-3dB = 58kHz. This corner point should be set significantly lower than the minimum baseband signal frequency by choosing large enough capacitors C4A and C4B. For signal frequencies significantly lower than f-3dB, the gain is reduced by approximately GDC = 20 * log [R3A||(RIN, DIFF/2)]/[R3A||(RIN, DIFF/2) + R4A] In this example, GDC = -11dB. Inserting the network of R3A, R3B, R4A, R4B, C4A and C4B has the following consequences: * Reduced LO feedthrough adjustment range. LO to RF feedthrough can be reduced by adjusting the differential DC offset voltage applied to the I and/or Q inputs. Because of the DC gain reduction, the range of adjustment is reduced. The resolution of the offset adjustment is improved by the same gain reduction factor. * DC notch for uneven number of channels. The interface drawn in Figure 3 might not be practical for an uneven number of channels, since the gain at DC is lower and will appear in the center of (one of) the channel(s). In that case, a DC-coupled level shifting circuit is required, or the LT5528 might be a better solution.
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2.06VDC
+ -
LT5518 APPLICATIO S I FOR ATIO
* Introduction of a (low frequency) time constant during startup. For TDMA-like systems the time constant introduced by C4A and C4B can cause some delay during start-up. The associated time constant is approximately given by TD = RIN, CM * (C4A + C4B). In this example it will result in a delay of about TD = 105 * 6.6n = 693ns. The maximum sinusoidal single sideband RF output power is about 5.5dBm for a full 0mA to 20mA DAC swing. This maximum RF output level is usually limited by the compliance voltage range of the DAC (VCOMPL) which is assumed here to be 1.25V. When the DAC output voltage swing is larger than this compliance voltage, the baseband signal will distort and linearity requirements usually will not be met. The following situations can cause the DAC's compliance voltage limit to be exceeded: 1. Too high DAC load impedance. If the DC impedance to ground is higher than VCOMPL/IMAX = 1.25/0.02 = 62.5, the compliance voltage is exceeded for a full DAC swing. In Figure 3, two 100 resistors in parallel are used, resulting in a DC impedance to ground of 50. 2. Too much DC offset. In some DACs, an additional DC offset current can be set. For example, if the maximum offset current is set to IMAX/8 = 2.5mA, then the maximum DC DAC load impedance to ground is reduced to VCOMPL/IMAX * (1 + 1/8) = 1.25/0.0225 = 55. 3. DC shift caused by R3A, R3B, R4A and R4B if used. The DC shift network consisting of R3A, R3B, R4A and R4B
5V
L1A 0mA TO 20mA DAC 0mA TO 20mA R1A 100 C1 R1B 100 C2
L2A
0.53VDC R2A R4A 100 3.01k R3A 5.63k
C3 R2B 100 R4B 3.01k 0.53VDC R3B 5.63k BBMI 2.1VDC 1.8pF 200 1.3k
L1B
L2B
GND C4B 3.3nF GND
Figure 3. LT5518 5th Order Filtered Baseband Interface with Common DAC (Only I-Channel is Shown)
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will increase the voltage on the DAC output by dumping an extra current into resistors R1A, R1B, R2A and R2B. This current is about (VCC - VDAC)/(R3A + R4A) = (5 - 0.5)/(3.01k + 5.63k) = 0.52mA. Maximum impedance to ground will then be VCOMPL/(IMAX + ILS) = 1.25/0.02052 = 60.9. 4. Reflection of out-of-band baseband signal power. DAC output signal components higher than the cut-off frequency of the lowpass filter will not see R2A and R2B as load resistors and therefore will see only R1A, R1B and the filter components as a load. Therefore, it is important to start the lowpass filter with a capacitor (C1), in order to shunt the DAC higher frequency components and thereby, limit the required extra voltage headroom. The LT5518's output 1dB compression point is about 8.5dBm, and with the interface network described above, a common DAC cannot drive the part into compression. However, it is possible to increase the driving capability by using a negative supply voltage. For example, if a -1V supply is available, resistors R1A, R1B, R2A and R2B can be made 200 each and connected with one side to the -1V supply instead of ground. Typically, the voltage compliance range of the DAC is -1V to 1.25V, so the DAC's output voltage will stay within this range. Almost 6dB extra voltage swing is available, thus enabling the DAC to drive the LT5518 beyond its 1dB compression point. Resistors R3A, R3B, R4A, R4B and the lowpass filter components must be adjusted for this case.
LT5518 C BALUN FROM Q LOMI C4A 3.3nF 200 VREF = 500mV 1.8pF 1.3k CM LOPI RF = 5.5dBm, MAX VCC BBPI 2.1VDC
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LT5518 APPLICATIO S I FOR ATIO
Some DACs use an output common mode voltage of 3.3V. In that case, the interface circuit drawn in Figure 4 may be used. The performance is very similar to the performance of the DAC interface drawn in Figure 3, since the source and load impedances of the lowpass ladder filter are both 200 differential and the current drive is the same. There are some small differences: * The baseband drive capability cannot be improved using an extra supply voltage, since the compliance range of the DACs in Figure 4 is typically 3.3V - 0.5V to 3.3V + 0.5V, so its range has already been fully used. * GDC and f-3dB are a little different, since R3A (and R3B) is 4.99k instead of 5.6k to accommodate the proper DC level shift. LO Section The internal LO input amplifier performs single-ended to differential conversion of the LO input signal. Figure 5 shows the equivalent circuit schematic of the LO input. The internal, differential LO signal is split into in-phase and quadrature (90 phase shifted) signals that drive LO buffer sections. These buffers drive the double balanced I and Q mixers. The phase relationship between the LO input and the internal in-phase LO and quadrature LO signals is fixed, and is independent of start-up conditions. The phase shifters are designed to deliver accurate quadrature signals for an LO frequency near 2GHz. For frequencies
5V
3.3V 0mA TO 20mA L1A L2A 3.3VDC
DAC
C1
C2
C3
L1B 0mA TO 20mA
L2B 3.3VDC
Figure 4. LT5518 5th Order Filtered Baseband Interface with 3.3VCM DAC (Only I-Channel is Shown).
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VCC 20pF LO INPUT ZIN 57
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Figure 5. Equivalent Circuit Schematic of the LO Input
significantly below 1.8GHz or above 2.4GHz, the quadrature accuracy will diminish, causing the image rejection to degrade. The LO pin input impedance is about 50, and the recommended LO input power is 0dBm. For lower LO input power, the gain, OIP2, OIP3 and dynamic range will degrade, especially below -5dBm and at TA = 85C. For high LO input power (e.g. 5dBm), the LO feedthrough will increase, without improvement in linearity or gain. Harmonics present on the LO signal can degrade the image rejection, because they introduce a small excess phase shift in the internal phase splitter. For the second (at 4GHz) and third harmonics (at 6GHz) at -20dBc level, the introduced signal at the image frequency is about -55dBc or lower, corresponding to an excess phase shift much less than 1 degree. For the second and third harmonics at -10dBc, still the introduced signal at the image frequency is about -46dBc. Higher harmonics than the third will have less impact. The LO return loss typically will be better than 14dB over the 1.7GHz to 2.4GHz range. Table 1 shows the LO port input impedance vs frequency.
LT5518 C BALUN FROM Q LOMI
RF = 5.5dBm, MAX VCC
C4A 3.3nF 200 VREF = 500mV 1.8pF 1.3k CM R3B 4.99k BBMI 2.1VDC 1.8pF 200 1.3k
LOPI
BBPI R4A 3.01k GND R4B 3.01k R3A 4.99k 2.1VDC
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C4B 3.3nF
GND
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LT5518 APPLICATIO S I FOR ATIO
Frequency MHz 1000 1400 1600 1800 2000 2200 2400 2600 Input Impedance 44.5 + j18.2 60.3 + j6.8 62.8 - j0.6 62.4 - j9.0 56.7 - j15.6 50.9 - j16.5 46.6 - j15.2 42.9 - j13.9 Mag 0.197 0.112 0.113 0.136 0.157 0.161 0.159 0.165
Table 1. LO Port Input Impedance vs Frequency for EN = High
S11 Angle 95 30 -2.4 -32 -58 -77 -94 -109
The input impedance of the LO port is different if the part is in shut-down mode. The LO input impedance for EN = Low is given in Table 2.
Table 2. LO Port Input Impedance vs Frequency for EN = Low
Frequency MHz 1000 1400 1600 1800 2000 2200 2400 2600 Input Impedance 42.1 + j43.7 121 + j34.9 134 - j31.6 91.3 - j68.5 56.4 - j66.3 37.7 - j54.9 27.9 - j43.6 22.1 - j33.9 S11 Mag 0.439 0.454 0.483 0.510 0.532 0.544 0.550 0.553 Angle 75 15 -11 -33 -53 -70 -87 -104
RF Section After up-conversion, the RF outputs of the I and Q mixers are combined. An on-chip balun performs internal differential to single-ended output conversion, while transforming the output signal impedance to 50. Table 3 shows the RF port output impedance vs frequency.
Table 3. RF Port Output Impedance vs Frequency for EN = High and PLO = 0dBm
Frequency MHz 1000 1400 1600 1800 2000 2200 2400 2600 Input Impedance 21.3 + j9.7 29.8 + j20.3 39.1 + j23.5 50.8 + j18.4 52.1 + j5.4 43.2 - j0.1 36.0 + j2.0 32.1 + j5.6 S22 Mag 0.421 0.348 0.280 0.180 0.057 0.073 0.164 0.228 Angle 153 121 100 77.1 65.5 -179 171 159
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The RF output S22 with no LO power applied is given in Table 4.
Table 4. RF Port Output Impedance vs Frequency for EN = High and No LO Power Applied
Frequency MHz 1000 1400 1600 1800 2000 2200 2400 2600 Input Impedance 21.7 + j9.9 32.3 + j19.5 42.2 + j18.5 46.8 + j9.6 41.8 + j3.7 36.1 + j4.3 32.8 + j7.4 31.2 + j10.5 S22 Mag 0.416 0.312 0.214 0.104 0.098 0.170 0.226 0.264 Angle 153 119 102 103 154 160 152 144
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For EN = Low the S22 is given in Table 5.
Table 5. RF Port Output Impedance vs Frequency for EN = Low
Frequency MHz 1000 1400 1600 1800 2000 2200 2400 2600 Input Impedance 20.9+j9.6 28.5 + j20.2 36.7 + j24.5 48.7 + j23.1 55.7 + j11.0 48.9 + j0.6 39.8 - j0.02 34.2 + j3.2 S22 Mag 0.428 0.365 0.311 0.229 0.116 0.013 0.115 0.193 Angle 154 123 103 80.2 56.7 158.9 -179 167
To improve S22 for lower frequencies, a shunt capacitor can be added to the RF output. At higher frequencies, a shunt inductor can improve the S22. Figure 6 shows the equivalent circuit schematic of the RF output.
VCC 20pF RF OUTPUT 52.5 21pF 3nH
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Figure 6. Equivalent Circuit Schematic of the RF Output
Note that an ESD diode is connected internally from the RF output to ground. For strong output RF signal levels (higher than 3dBm) this ESD diode can degrade the linearity performance if the 50 termination impedance is connected directly to ground. To prevent this, a
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LT5518 APPLICATIO S I FOR ATIO
coupling capacitor can be inserted in the RF output line. This is strongly recommended during a 1dB compression measurement. Enable Interface Figure 7 shows a simplified schematic of the EN pin interface. The voltage necessary to turn on the LT5518 is 1.0V. To disable (shutdown) the chip, the Enable voltage must be below 0.5V. If the EN pin is not connected, the chip is disabled. This EN = Low condition is guaranteed by the 75k on-chip pull-down resistor. It is important that the voltage at the EN pin does not exceed VCC by more than 0.5V. If this should occur, the full chip supply current could be sourced through the EN pin ESD protection diodes. Damage to the chip may result.
VCC
EN 75k 25k
VCC EN E1 J4 LO IN
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Figure 7. EN Pin Interface
J5
Evaluation and Demo Boards Figure 8 shows the schematic of the evaluation board that was used for the measurements summarized in the Electrical Characteristics tables and the Typical Performance Characteristic plots. Figure 9 shows the demo board schematic. Resistors R3, R4, R10 and R11 may be replaced by shorting wires if a flat frequency response to DC is required. A good ground connection is required for the exposed pad of the LT5518 package. If this is not done properly, the RF performance will degrade. The exposed pad also provides heat sinking for the part and minimizes the possibility of the chip overheating. R7 (optional) limits the Enable pin current in the event that the Enable pin is pulled high while the VCC inputs are low. In Figures 10, 11 and 12 the silk screen and the demo board PCB layouts are shown. If improved LO and Image suppression is required, an LO feedthrough calibration and an Image suppression calibration can be performed.
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BBIM BBQM
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J1 BBIM
J2 BBIP VCC 16 1 2 3 4 EN GND LO GND LT5518 15 14 13 GND RF GND GND 12 11 10 9 17 C2 100nF J3 RF OUT
R1 100 VCC EN J4 LO IN
BBMI GND BBPI VCC
GND BBMQ GND BBPQ VCC 5 J5 BBQM GND BOARD NUMBER: DC729A 6 7 8
C1 100nF
J6 BBQP
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Figure 8. Evaluation Board Circuit Schematic
J1 R5 52.3 R3 3.01k R4 3.01k R6 52.3 R2 5.62k VCC E2 J2 BBIP C1 3.3nF C2 3.3nF
BOARD NUMBER: DC831A 16 1 2 3 4 EN GND LO GND
R1 5.62k 15 14
R7 100
13 GND RF 12 11 10 9 17
BBMI GND BBPI VCC
C3 100nF J3 RF OUT
LT5518
GND GND
GND BBMQ GND BBPQ VCC R10 3.01k R12 52.3 5 6 7 8
C4 100nF R8 5.62k
R9 5.62k
C5 3.3nF GND E3
R11 3.01k R13 52.3
J6 BBQP
GND E4
C6 3.3nF
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Figure 9. Demo Board Circuit Schematic
Figure 10. Component Side Silk Screen of Demo Board
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Figure 12. Bottom Side Layout of Demo Board
VCC 8, 13 14 I-DAC 16 V-I I-CHANNEL EN 1 Q-CHANNEL V-I CAL BASEBAND GENERATOR 2, 4, 6, 9, 10, 12, 15, 17 3 VCO/SYNTHESIZER 0 90 7 Q-DAC 5 BALUN 11 LT5518 5V 100nF x2 RF = 1.5GHz TO 2.4GHz PA LO FEEDTHROUGH CAL OUT IMAGE CAL OUT
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Figure 11. Component Side Layout of Demo Board
ADC
Figure 13. 1.5GHz to 2.4GHz Direct Conversion Transmitter Application with LO Feedthrough and Image Calibration Loop
Application Measurements The LT5518 is recommended for base-station applications using various modulation formats. Figure 13 shows a typical application. The CAL box in Figure 13 allows for LO feedthrough and Image suppression calibration. Figure 14 shows the ACPR performance for W-CDMA using one or four channel modulation. Figures 15, 16 and 17 illustrate the 1, 2 and 4-channel W-CDMA measurement. To calculate ACPR, a correction is made for the spectrum analyzer noise floor. If the output power is high, the ACPR will be limited by the linearity performance of the part. If the output power is
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low, the ACPR will be limited by the noise performance of the part. In the middle, an optimum ACPR is obtained. Because of the LT5518's very high dynamic range, the test equipment can limit the accuracy of the ACPR measurement. Consult the factory for advice on ACPR measurement, if needed. The ACPR performance is sensitive to the amplitude match of the BBIP and BBIM (or BBQP and BBQM) input voltage. This is because a difference in AC voltage amplitude will give rise to a difference in amplitude between the even-order harmonic products generated in the internal V-I converter. As a result, they will not cancel out entirely. Therefore, it
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LT5518 APPLICATIO S I FOR ATIO
is important to keep the amplitudes at the BBIP and BBIM inputs (or BBQP and BBQM) as equal as possible. When the temperature is changed after calibration, the LO feedthrough and the Image Rejection performance will change. This is illustrated in Figure 18. The LO feedthrough
-55 4-CH ACPR -60 ACPR, ALTCPR (dBc) -65 1-CH ACPR -70 -75 -80 1-CH ALTCPR 4-CH NOISE -150 -155 1-CH NOISE -160 -165 4-CH ALTCPR -140 -145 -135 NOISE FLOOR AT 30MHz OFFSET (dBm/Hz)
POWER IN 30kHz BW (dBm)
DOWNLINK TEST MODEL 64 DPCH -85 -34 -30 -26 -22 -18 -14 -10 RF OUTPUT POWER PER CARRIER (dBm)
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Figure 14. W-CDMA ACPR, ALTCPR and Noise vs RF Output Power at 2140MHz for 1 and 4 Channels
-30 -40 POWER IN 30kHz BW (dBm) -50 -60 -70 -80 UNCORRECTED SPECTRUM -90 DOWNLINK TEST MODEL 64 DPCH POWER IN 30kHz BW (dBm) -40
UNCORRECTED SPECTRUM -50 -60 -70 -80 -90
LO FT (dBm), IR (dB)
-100 -110 -120 2125
CORRECTED SPECTRUM
-100 -110 -120 SYSTEM NOISE FLOOR
SYSTEM NOISE FLOOR 2130 2135 2140 2145 2150 RF FREQUENCY (MHz) 2155
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-130 2115
Figure 16. 2-Channel W-CDMA Spectrum
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and Image Rejection can also change as function of the baseband drive level, as is depicted in Figure 19. The RF output power, IM2 and IM3 vs two-tone baseband drive level are given in Figure 20.
-30 -40 -50 -60 -70 -80 -90 -100 -110 -120 2127.5 SYSTEM NOISE FLOOR 2132.5 2137.5 2142.5 2147.5 2152.5 RF FREQUENCY (MHz)
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DOWNLINK TEST MODEL 64 DPCH
UNCORRECTED SPECTRUM
CORRECTED SPECTRUM
Figure 15. 1-Channel W-CDMA Spectrum
-40 DOWNLINK TEST MODEL 64 DPCH -45 -50 -55 -60 -65 -70 -75 -80 -85 2165
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CALIBRATED WITH PRF = -30dBm IMAGE REJECTION
CORRECTED SPECTRUM
LO FEEDTHROUGH
2125
2135 2145 2155 RF FREQUENCY (MHz)
-90 -40
-20
0 20 40 TEMPERATURE (C)
60
80
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Figure 17. 4-Channel W-CDMA Spectrum
Figure 18. LO Feedthrough and Image Rejection vs Temperature after Calibration at 25C
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LT5518 APPLICATIO S I FOR ATIO
20 10 0 PRF, LO FT (dBm), IR (dBc) -10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 - 90 0 fBBI = 2MHz, 0 fBBQ = 2MHz, 90 PLO = 0dBm f =f +f TA = -40C RF BB LO fLO = 2.14GHz TA = 85C VCC = 5V TA = 25C EN = HIGH 1 3 4 5 2 I AND Q BASEBAND VOLTAGE (VP-P, DIFF) 5518 F19 IR LO FT HD2, HD3 (dBc) PRF
Figure 19. Image Rejection and LO Feedthrough vs Baseband Drive Voltage After Calibration at 25C and VBBI = 0.2VP-P, DIFF
PACKAGE DESCRIPTIO
UF Package 16-Lead Plastic QFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1692)
0.72 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
4.35 0.05 2.15 0.05 2.90 0.05 (4 SIDES)
0.30 0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW--EXPOSED PAD 4.00 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) 2.15 0.10 (4-SIDES) 0.75 0.05 R = 0.115 TYP PIN 1 NOTCH R = 0.20 TYP OR 0.35 x 45 CHAMFER
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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10 0 -10 -20 fBBI = 2MHz, 2.1MHz, 0 fBBQ = 2MHz, 2.1MHz, 90 PLO = 0dBm -50 fRF = fBB + fLO fLO = 2.14GHz -60 IM2 = POWER AT fLO + 4.1MHz -70 TA = -40C IM3 = MAX POWER AT TA = 85C fLO + 1.9MHz or fLO + 2.2MHz -80 TA = 25C VCC = 5V EN = HIGH -90 0.1 1 10 5518 F20 I AND Q BASEBAND VOLTAGE (VP-P, DIFF, EACH TONE) -40 -30 IM2 RF IM3
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Figure 20. RF Two-Tone Power, IM2 and IM3 at 2140MHz vs Baseband Voltage
PACKAGE OUTLINE
15
16 0.55 0.20 1 2
(UF16) QFN 10-04
0.200 REF 0.00 - 0.05
0.30 0.05 0.65 BSC
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LT5518 RELATED PARTS
PART NUMBER Infrastructure LT5511 LT5512 LT5514 LT5515 LT5516 LT5517 LT5519 LT5520 LT5521 LT5522 LT5524 LT5525 LT5526 LT5528 DESCRIPTION High Linearity Up-Converting Mixer DC-3GHz High Signal Level Down-Converting Mixer Ultralow Distortion, IF Amplifier/ADC Driver with Digitally Controlled Gain 1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 40MHz to 900MHz Quadrature Demodulator 0.7GHz to 1.4GHz High Linearity Up-Converting Mixer 1.3GHz to 2.3GHz High Linearity Up-Converting Mixer 10MHz to 3700MHz High Linearity Up-Converting Mixer 600MHz to 2.7GHz High Signal Level Down-Converting Mixer Low Power, Low Distortion ADC Driver with Digitally Programmable Gain High Linearity, Low Power Downconverting Mixer High Linearity, Low Power Downconverting Mixer 1.5GHz - 2.4GHz High Linearity Direct Quadrature Modulator COMMENTS RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer DC to 3GHz, 17dBm IIP3, Integrated LO Buffer 850MHz Bandwidth, 47dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range 20dBm IIP3, Integrated LO Quadrature Generator 21.5dBm IIP3, Integrated LO Quadrature Generator 21dBm IIP3, Integrated LO Quadrature Generator 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50 Matching, Single-Ended LO and RF Ports Operation 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50 Matching, Single-Ended LO and RF Ports Operation 24.2dBm IIP3 at 1.95GHz, NF = 12.5dB, 3.15V to 5.25V Supply, Single-Ended LO Port Operation 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50 Single-Ended RF and LO Ports 450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control Single-Ended 50 RF and LO Ports, 17.6dBm IIP3 at 1900MHz, ICC = 28mA 3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF, NF = 11dB, ICC = 28mA 4.5V to 5.25V Supply, 22dBm OIP3 at 2GHz, NFloor = 159dBm/Hz, 50 Single-Ended BB, RF and LO Ports 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.25V Supply 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply 44dB Dynamic Range, Temperature Compensated, SC70 Package 36dB Dynamic Range, Low Power Consumption, SC70 Package Precision VOUT Offset Control, Shutdown, Adjustable Gain Precision VOUT Offset Control, Shutdown, Adjustable Offset Precision VOUT Offset Control, Adjustable Gain and Offset 1dB Output Variation Overtemperature, 38ns Response Time 17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V Supply, -7dB to 56dB Linear Power Gain 500MHz BW S/H, 71.8dB SNR 500MHz BW S/H, 75.5dB SNR
RF Power Detectors LT5504 800MHz to 2.7GHz RF Measuring Receiver RF Power Detectors with >40dB Dynamic Range LTC5507 100kHz to 1000MHz RF Power Detector LTC5508 300MHz to 7GHz RF Power Detector LTC5509 300MHz to 3GHz RF Power Detector LTC5530 300MHz to 7GHz Precision RF Power Detector LTC5531 300MHz to 7GHz Precision RF Power Detector LTC5532 300MHz to 7GHz Precision RF Power Detector LT5534 50MHz to 3GHz RF Power Detector with 60dB Dynamic Range Low Voltage RF Building Block LT5546 500MHz Quadrature Demodulator with VGA and 17MHz Baseband Bandwidth Wide Bandwidth ADCs LT1749 12-Bit, 80Msps LT1750 14-Bit, 80Msps LTC(R)5505
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16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT/TP 0205 1K * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

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