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Datasheet, Version 2.0, Novem ber 2001
CoolSETTM-F2
ICE2B165/265/365
P o w e r M a n a g em e n t & S u p p l y
P
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ar
Off-Line SMPS Current Mode C o n t ro l l e r w i t h i n t e g ra t e d 6 5 0 V CoolMOSTM
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stop thinking.
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CoolSETTM-F2 Revision History: Previous Version: Page 2001-11-21 First One Datasheet
Subjects (major changes since last revision)
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com CoolMOSTM, CoolSETTM are trademarks of Infineon Technologies AG.
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Edition 2001-11-21 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 Munchen
(c) Infineon Technologies AG 1999.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
CoolSETTM-F2
Preliminary Specification Off-Line SMPS Current Mode Controller with integrated 650V CoolMOSTM
Product Highlights
* * * * Best of Class in DIP8 Package No Heatsink required Lowest Standby Power Dissipation Enhanced Protection Functions all with Auto Restart Mode Description
The second generation COOLSETTM-F2 provides several special enhancements to satisfy the needs for low power standby and protection features. In standby mode frequency reduction is used to lower the power consumption and support a stable output voltage in this mode. The frequency reduction is limited to 20 kHz to avoid audible noise. In case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in Auto Restart Mode which is controlled by the internal protection unit. By means of the internal precise peak current limitation the dimension of the transformer and the secondary diode can be lower which leads to more cost efficiency. 650V Avalanche Rugged CoolMOSTM Only few external Components required Input Undervoltage Lockout 67kHz Switching Frequency Max Duty Cycle 72% Low Power Standby Mode to support "Blue Angle" Norm Thermal Shut Down with Auto Restart Overload and Open Loop Protection Overvoltage Protection during Auto Restart Adjustable Peak Current Limitation via External Resistor Overall Tolerance of Current Limiting < 5% Internal Leading Edge Blanking User defined Soft Start Soft Switching for Low EMI
ICE2B165/265/365
P-DIP-8-6
Features
* * * * * * * * * * * * * *
Typical Application
+
85 ... 270 VAC
RStart-up CVCC
Snubber
Converter DC Output
-
VCC
Low Power StandBy Power Management
Drain Feedback
CoolMOSTM
SoftS
Soft-Start Control
PWM Controller Current Mode Precise Low Tolerance Peak Current Limitation
CSoft Start
Isense RSense
FB
Protection Unit
PWM-Controller
GND
Feedback
CoolSETTM-F2
Type ICE2B165
ICE2B265 ICE2B365
1) 2)
Ordering Code
Q67040-S4489-A001 Q67040-S4478-A001 Q67040-S4490-A001
Package
P-DIP-8-6 P-DIP-8-6 P-DIP-8-6
UDS
650V
FOSC
67kHz
RDSon1)
3.0 0.9 0.45
230VAC 15%2)
31W 52W 73W
85-265 VAC2)
18W 32W 45W
650V
650V
67kHz
67kHz
typ @ T=25C Maximum practical continous power in an open frame design at 75C ambient with copper area on PCB = 6cm, Tj=125C
Datasheet Preliminary Data
3
November 2001
Preliminary Specification
Table of Contents
1 1.1 1.2 2 3 3.1 3.2 3.2.1 3.2.2 3.3 3.4 3.4.1 3.4.2 3.5 3.5.1 3.5.2 3.6 3.7 3.8 3.8.1 3.8.2 3.8.3 4 4.1 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 4.3.6 5 6
CoolSETTM-F2 ICE2B165/265/365
Page
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Overload & Open loop with normal load . . . . . . . . . . . . . . . . . . . . . . . . .12 Overvoltage due to open loop with no load . . . . . . . . . . . . . . . . . . . . . . .13 Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 CoolMOSTM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Datasheet Preliminary Data
4
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Pin Configuration and Functionality
1
1.1
Pin Configuration and Functionality
Pin Configuration 1.2 Pin Functionality
SoftS (Soft Start & Auto Restart Control) This pin combines the function of Soft Start in case of Start Up and Auto Restart Mode and the controlling of the Auto Restart Mode in case of an error detection. FB (Feedback) The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. Isense (Current Sense) The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOSTM. When Isense reaches the internal threshold of the Current Limit Comparator, the Driver output is disabled. By this means the Over Current Detection is realized. Furthermore the current information is provided for the PWM-Comparator to realize the Current Mode. Drain (Drain of integrated CoolMOSTM) Pin Drain is the connection to the Drain of the internal CoolMOSTM.
Pin 1 2 3 4 5 6 7 8
1)
Symbol SoftS FB Isense Drain Drain N.C. VCC GND
Function Soft-Start Feedback Controller Current Sense Input, CoolMOSTM Source Output 650V1) CoolMOSTM Drain 650V1) CoolMOSTM Drain Not connected Controller Supply Voltage Controller Ground
at Tj = 110C
Package P-DIP-8-6
SoftS
1
8
GND
VCC (Power supply) This pin is the positiv supply of the IC. The operating range is between 8.5V and 21V. To provide overvoltage protection the driver gets disabled when the voltage becomes higher than 16.5V during Start Up Phase. GND (Ground) This pin is the ground of the primary side of the SMPS.
FB
2
7
VCC
Isense
3
6
N.C
Drain (see Note)
Figure 1
4
5
Drain
Pin Configuration (top view)
Note:
To provide a larger creepage distance on the PCB the Drain Pin 4 should not be connected.
Datasheet Preliminary Data
5
November 2001
2
Figure 2
CLine Snubber + Converter DC Output VOUT CVCC
Datasheet Preliminary Data
Drain
Power Management Undervoltage Lockout
13.5V 8.5V 0.72
85 ... 270 VAC
RStart-up
VCC
Internal Bias
C1 Power-Down Reset Oscillator
Duty Cycle max Clock 20-67kHz
Representative Blockdiagram
Voltage Reference G1 Power-Up Reset Soft Start PWM-Latch
S Q
16.5V
6.5V
4.0V
C2
6.5V 5.3V 4.8V 4.0V
RSoft-Start Soft-Start Comparator
SoftS
CoolMOSTM
5.6V G3 G4
R Q S Q R Q
CSoft-Start G2 PWM Comparator 0.3V C5 fosc 67kHz 20kHz UFB x3.65 PWM OP Improved Current Mode Current Limiting Propagation-Delay Compensation
0.8V
C4 Gate Driver
5.3V
T1 Error-Latch
6.5V
Spike Blanking 5s
Representative Blockdiagram
Preliminary Specification
6
Current-Limit Comparator Vcsth Leading Edge Blanking 200ns 10k D1 Standby Unit
4.8V
RFB
C3
FB
RSense
Thermal Shutdown
Tj >140C
Isense
Protection Unit
Optocoupler
CoolSETTM-F2
GND
CoolSETTM-F2 ICE2B165/265/365
Representative Blockdiagram
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
3
3.1
Functional Description
Power Management
M ain L in e (1 00 V -3 80 V )
3.2
Improved Current Mode
S o ft-S ta rt C o m p a ra to r P W M -L a tch
R Q
R S tart-U p
P rim ary W in ding
C VC C
VCC Pow er M anagem ent U n de rvolta g e L o ckou t 1 3 .5V 8 .5 V P o w er-D ow n R e set V o lta g e R efe ren ce P o w er-U p R e se t 6.5 V 5.3 V 4.8 V 4.0 V In te rn a l B ias
FB
D rive r P W M C o m p a ra to r
S 0 .8V Q
PW M OP x3 .6 5 Im proved C urrent M ode Ise n se
R
Q P W M -L atch
6 .5 V S Q
Figure 4
E rro r-L a tch S o ft-S ta rt C om p ara tor
Current Mode
R Soft-Sta rt
S o ftS
Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal.
C S oft-Start
T1
E rror-D ete ctio n
A m p lified C u rren t S ig n al
Figure 3 Power Management
The Undervoltage Lockout monitors the external supply voltage VVCC. In case the IC is inactive the current consumption is max. 55A. When the SMPS is plugged to the main line the current through RStart-up charges the external Capacitor CVCC. When VVCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After it the internal bandgap generates a reference voltage VREF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by reseting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero.
FB
0 .8 V D rive r t
T on t
Figure 5 Pulse Width Modulation In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by reseting the PWM-Latch (see Figure 5).
Datasheet Preliminary Data
7
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
The primary current is sensed by the external series resistor RSense inserted in the source of the integrated CoolMOSTM. By means of Current Mode the regulation of the secondary voltage is insensitive on line variations. Line variation causes varition of the increasing current slope which controls the duty cycle. The external RSense allows an individual adjustment of the maximum source current of the integrated CoolMOSTM.
V OSC
m a x. D u ty C yc le
V olta ge R a m p
S oft-S tart C o m p ara to r P W M C o m pa ra to r FB P W M -La tch O s cilla to r V O SC 1 0 k x3 .6 5 T2 C1 V oltage Ram p
Figure 6 Improved Current Mode
0 .8 V FB 0 .3 V
t
0.3V C5 G a te D rive r 0.8V R1 2 0p F
G a te D rive r
t
t
Figure 7 Light Load Conditions
V1
PW M OP
3.2.1
PWM-OP
To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1(see Figure 6, Figure 7). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start. In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the C5 Comparator the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continously till 0% by decreasing VFB below that threshold.
The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin ISense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.
3.2.2
PWM-Comparator
The PWM-Comparator compares the sensed current signal of the integrated CoolMOSTM with the feedback signal VFB (see Figure 8). VFB is created by an external optocoupler or external transistor in combination with the internal pullup resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOSTM exceeds the signal VFB the PWM-Comparator switches off the Gate Driver.
Datasheet Preliminary Data
8
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
6 .5 V R FB FB S o ft-S ta rt C o m p ara to r P W M -L atch
P W M C o m p a rato r
0 .8 V
O p to co u p le r
PW M OP Ise n se x3 .65 Im proved Current M ode
pullup resistor RSoft-Start. The Soft-Start-Comparator compares the voltage at pin SoftS at the negative input with the ramp signal of the PWM-OP at the positive input. When Soft-Start voltage VSoftS is less than Feedback voltage VFB the Soft-Start-Comparator limits the pulse width by reseting the PWM-Latch (see Figure 9). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. By means of the above mentioned CSoft-Start the Soft-Start can be defined by the user. The Soft-Start is finished when VSoftS exceeds 5.3V. At that time the Protection Unit is activated by Comparator C4 and senses the FB by Comparator C3 wether the voltage is below 4.8V which means that the voltage on the secondary side of the SMPS is settled. The internal Zener Diode at SoftS with breaktrough voltage of 5.6V is to prevent the internal circuit from saturation (see Figure 10).
6 .5 V 5 .6 V
P o w e r-U p R e s e t E rro r-L a tc h
R Q
R S o ft-S ta rt S o ftS 6 .5 V 5 .3 V C4 G2
S
Q
Figure 8
PWM Controlling
3.3
Soft-Start
FB
4 .8 V R FB
C3 C lo c k
R
Q
G a te D riv e r
S Q
V S oftS
5 .6 V 5 .3 V
P W M -L a tc h
Figure 10
Activation of Protection Unit
T S oft-S tart G a te D rive r
The Start-Up time TStart-Up within the converter output voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 11).
t
C Soft - Start =
T Soft - Start R Soft - Start x 1, 69
By means of Soft-Start there is an effective minimization of current and voltage stresses on the integrated CoolMOSTM, the clamp circuit and the output overshoot and prevents saturation of the transformer during Start-Up.
t
Figure 9 Soft-Start Phase
The Soft-Start is realized by the internal pullup resistor RSoft-Start and the external Capacitor CSoft-Start (see Figure 2). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal
Datasheet Preliminary Data
9
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
V S o ftS 5 .3 V
f OSC
kHz
67
T S oft-S ta rt V FB 4 .8 V t
20
1,0
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
2
V
V FB
Figure 12 Frequency Dependence
3.5
V OUT V O UT T S ta rt-U p t
Figure 11 Start Up Phase
Current Limiting
t
3.4
Oscillator and Frequency Reduction Oscillator
There is a cycle by cycle current limiting realised by the Current-Limit Comparator to provide an overcurrent detection. The source current of the integrated CoolMOSTM is sensed via an external sense resistor RSense . By means of RSense the source current is transformed to a sense voltage VSense. When the voltage VSense exceeds the internal threshold voltage Vcsth the Current-Limit-Comparator immediately turns off the gate drive. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immedeate shut down of the CoolMOSTM in case of overcurrent.
3.4.1
3.5.1
Leading Edge Blanking
The oscillator generates a frequency fswitch = 67kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of Dmax=0.72.
V S en s e V c s th t L E B = 22 0 ns
3.4.2
Frequency Reduction
The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 12. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 20 kHz to avoid audible noise in any case.
t
Figure 13 Leading Edge Blanking Each time when CoolMOSTM is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of tLEB = 220ns. During that time the output of the Current-Limit Comparator cannot switch off the gate drive.
Datasheet Preliminary Data
10
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
3.5.2
Propagation Delay Compensation
In case of overcurrent detection by ILimit the shut down of CoolMOSTM is delayed due to the propagation delay of the circuit. This delay causes an overshoot of the peak current Ipeak which depends on the ratio of dI/dt of the peak current (see Figure 14). .
S ig n a l2 I S e ns e I p ea k 2 I p ea k 1 I L im it I O v ers h oo t2
S ig n a l1 t P ro pa ga tion D e la y
The propagation delay compensation is done by means of a dynamic threshold voltage Vcsth (see Figure 15). In case of a steeper slope the switch off of the driver is earlier to compensate the delay. E.g. Ipeak = 0.5A with RSense = 2 . Without propagation delay compensation the current sense threshold is set to a static voltage level Vcsth=1V. A current ramp of dI/dt = 0.4A/s, that means dVSense/dt = 0.8V/s, and a propagation delay time of i.e. tPropagation Delay =180ns leads then to a Ipeak overshoot of 12%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 16).
with compensation without compensation
I O v e rs ho ot1
V
1,3 1,25 1,2
VSense
1,15 1,1 1,05 1 0,95 0,9 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2
t
Figure 14 Current Limiting The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compensation is integrated to bound the overshoot dependent on dI/dt of the rising primary current. That means the propagation delay time between exceeding the current sense threshold Vcsth and the switch off of CoolMOSTM is compensated over temperature within a range of at least.
dVSense dt
V s
Figure 16
Overcurrent Shutdown
0 R Sense x
dI
peak
dt
1
dV Sense dt
3.6
PWM-Latch
So current limiting is now capable in a very accurate way (see Figure 16).
VOSC
max. Duty Cycle
The oscillator clock output applies a set pulse to the PWM-Latch when initiating CoolMOSTM conduction. After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of reseting the driver is shut down immediately.
3.7
off time
Driver
VSense Vcsth
Propagation Delay
t
Signal1
Figure 15
Signal2 t
The driver-stage drives the gate of the CoolMOSTM and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the CoolMOSTM threshold. This is achieved by a slope control of the rising edge at the driver's output (see Figure 17). Thus the leading switch on spike is minimized. When CoolMOSTM is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. At voltages below the undervoltage lockout threshold VVCCoff the gate drive is active low.
Dynamic Voltage Threshold Vcsth
Datasheet Preliminary Data
11
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
V G a te
ca . t = 1 3 0 n s
FB 4 .8 V
O verload & O pen loop/norm al load
5 s B la n king
F a ilu re D e te ctio n
5V
t
t
Figure 17 Gate Rising Slope
S o ftS 5 .3 V S o ft-S ta rt P h a se
3.8
Protection Unit (Auto Restart Mode)
T B u rs t1 T R e s tart t
An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5s and the CoolMOSTM is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode.
D rive r
3.8.1
Overload & Open loop with normal load
t VC C 1 3 .5 V 8 .5 V
Figure 18 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure19). The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage VFB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inactivates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VVCC increases till VCCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor RStart-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pullup resistor RSoft-Start . During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload.
t
Figure 18
Auto Restart Mode
6.5 V P o w e r U p R e se t S o ftS R S oft-S tart
C S oft-S tart 5 .3 V T1 4 .8V
C4 G2
E rro r-L a tch
C3 FB
R FB
6 .5 V
Figure 19
FB-Detection
Datasheet Preliminary Data
12
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Functional Description
But the Soft-Start Phase must be finished within the Start Up Phase to force the voltage at pin FB below the failure detection threshold of 4.8V.
detection due to varying of VCC concerning the regulation of the converter output. When the voltage VSoftS is above 4.0V the overvoltage detection by C1 is deactivated.
3.8.2
Overvoltage due to open loop with no load
VCC
O pen loop & no load conditio n
FB 4 .8V F ailure D ete ction 5 s B la n kin g
6 .5 V 1 6 .5 V R S o ft-S ta rt 4 .0 V S o ftS
t
C1
E rro r L a tch G1
C2
S o ftS 5 .3V 4 .0V
S o ft-S ta rt P ha se
C S o ft-S ta rt T1 P o w e r U p R e se t
O v erv olta g e D e te ction P ha se
Figure 21
D rive r T B urs t2 T R es ta rt t
Overvoltage Detection
3.8.3
Thermal Shut Down
Thermal Shut Down is latched by the Error-Latch when junction temperature Tj of the pwm controller is exceeding an internal threshold of 140C. In that case the IC switches in Auto Restart Mode.
O ve rvo ltag e D ete ctio n VCC 1 6.5 V 1 3.5 V 8.5 V t
t
Figure 20
Auto Restart Mode
Figure 20 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 21).The overvoltage detection is provided by Comparator C1 only in the first time during the Soft-Start Phase till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case TBurst2 is shorter than TSoft-Start . By means of C2 the normal operation mode is prevented from overvoltage
Note:
All the values which are mentioned in the functional description are typical. Please refer to Electrical Characteristics for min/max limit values.
Datasheet Preliminary Data
13
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Electrical Characteristics
4
4.1
Note:
Electrical Characteristics
Absolute Maximum Ratings
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit.
Parameter
Symbol
Limit Values min. max. 650 0.1 0.4 0.5 1 2 3 22 6.5 6.5 3 150 150 90 2
Unit
Remarks
Drain Source Voltage ICE2B165 Avalanche energy, repetitive tAR limited by ICE2B265 max. Tj=150C1) ICE2B365 ICE2B165 Avalanche current, repetitive tAR limited by ICE2B265 max. Tj=150C1) ICE2B365 VCC Supply Voltage FB Voltage SoftS Voltage ISense Junction Temperature Storage Temperature Thermal Resistance Junction-Ambient ESD Capability2)
1)
VDS EAR1 EAR2 EAR3 IAR1 IAR2 IAR3 VCC VFB VSoftS ISense Tj TS RthJA VESD
-0.3 -0.3 -0.3 -0.3 -40 -50 -
V mJ mJ mJ A A A V V V V C C K/W kV
Tj=110C
Controller & CoolMOSTM
P-DIP-8-6 Human Body Model
Repetetive avalanche causes additional power losses that can be calculated as PAV=EAR*f Equivalent to discharging a 100pF capacitor through a 1.5 k series resistor
2)
4.2
Note:
Operating Range
Within the operating range the IC operates as described in the functional description.
Parameter
Symbol
Limit Values min. max. 21 130 150
Unit
Remarks
VCC Supply Voltage Junction Temperature of Controller Junction Temperature of CoolMOSTM
VCC TJCon TJCoolMOS
VCCoff -25 -25
V C C limited due to thermal shut down of controller
Datasheet Preliminary Data
14
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Electrical Characteristics
4.3
Note:
Characteristics
The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range TJ from - 25 C to 125 C.Typical values represent the median values, which are related to 25C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.
4.3.1
Supply Section
Parameter
Symbol min.
Limit Values typ. 27 5.0 5.5 max. 55 6.6 7.0
Unit
Test Condition
Start Up Current Supply Current with Inactiv Gate Supply Current with Activ Gate ICE2B165
IVCC1 IVCC2 IVCC3
-
A mA mA
VCC=VCCon -0.1V VSoftS = 0 IFB = 0 VSoftS = 5V IFB = 0 VSoftS = 5V IFB = 0 VSoftS = 5V IFB = 0
ICE2B265
IVCC3
-
6.1
7.3
mA
ICE2B365
IVCC3
-
7.1
8.3
mA
VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis
VCCon VCCoff VCCHY
13 4.5
13.5 8.5 5
14 5.5
V V V
4.3.2
Internal Voltage Reference
Parameter
Symbol min.
Limit Values typ. 6.50 max. 6.63
Unit
Test Condition
Trimmed Reference Voltage
VREF
6.37
V
measured at pin FB
4.3.3
Control Section
Parameter
Symbol min.
Limit Values typ. 67 20 3.35 0.72 3.65 max. 72 3.53 0.77 3.85
Unit
Test Condition
Oscillator Frequency Reduced Osc. Frequency Frequency Ratio fosc1/fosc2 Max Duty Cycle Min Duty Cycle PWM-OP Gain
fOSC1 fOSC2
62 3.18
kHz kHz
VFB = 4V VFB = 1V
Dmax Dmin AV
0.67 0 3.45
VFB < 0.3V
Datasheet Preliminary Data
15
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Electrical Characteristics
Max. Level of Voltage Ramp
VMax-Ramp
0.3 3.0 42
0.80 3.7 50
4.6 4.9 62
V V V k k
VFB Operating Range Min Level VFBmin VFB Operating Range Max level VFBmax Feedback Resistance Soft-Start Resistance RFB RSoft-Start
4.3.4
Protection Unit
Parameter
Symbol min.
Limit Values typ. 4.8 5.3 4.0 16.5 140 5 max. 4.95 5.46 4.12 17.2 150 -
Unit
Test Condition
Over Load & Open Loop Detection Limit Activation Limit of Overload & Open Loop Detection Deactivation Limit of Overvoltage Detection Overvoltage Detection Limit Latched Thermal Shutdown Spike Blanking
VFB2 VSoftS1 VSoftS2 VVCC1 TjSD tSpike
4.65 5.15 3.88 16 130 -
V V V V C s
VSoftS > 5.5V VFB > 5V VFB > 5V VCC > 17.5V VSoftS < 3.8V VFB > 5V guaranteed by design
4.3.5
Current Limiting
Parameter
Symbol min.
Limit Values typ. 1.00 max. 1.05
Unit
Test Condition
Peak Current Limitation (incl. Propagation Delay Time) (see Figure 7) Leading Edge Blanking
Vcsth
0.95
V
dVsense / dt = 0.6V/s
tLEB
-
220
-
ns
4.3.6
CoolMOSTM Section
Parameter
Symbol min.
Limit Values typ. max. -
Unit
Test Condition
Drain Source Breakdown Voltage V(BR)DSS
600 650
V V
Tj=25C Tj=110C
Datasheet Preliminary Data
16
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Electrical Characteristics
Drain Source On-Resistance
ICE2B165 ICE2B265 ICE2B365
RDSon1 RDSon2 RDSon3 Co(er)1 Co(er)2 Co(er)3 IDSS trise tfall
-
3 6.6 0.9 1.9 0.45 0.95 7 21 30 0.5 30 30
1) 1)
3.3 7.3 1.08 2.28 0.54 1.14 -
pF pF
Tj=25C Tj=125C Tj=25C Tj=125C Tj=25C Tj=125C VDS =0V to 480V VDS =0V to 480V VDS =0V to 480V VVCC=0V
ICE2B165 Effective output capacitance, energy ICE2B265 related ICE2B365 Zero Gate Voltage Drain Current Rise Time Fall Time
1)
A ns ns
Measured in a Typical Flyback Converter Application
Datasheet Preliminary Data
17
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Typical Performance Characteristics
5
40 38
Typical Performance Characteristics
13,58
VCC Turn-On Threshold V CCon [V]
13,56 13,54 13,52 13,50 13,48 13,46 13,44 13,42 -25 -15
PI-004-190101
Start Up Current I VCC1 [A]
36 34
PI-001-190101
32 30 28 26 24 22 -25 -15
-5
5
15
25
35
45
55
65
75
85
95
105 115 125
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 22
6,0
Start Up Current IVCC1 vs. Tj
Figure 25
8,67
VCC Turn-On Threshold VVCCon vs. Tj
VCC Turn-Off Threshold V VCCoff [V]
8,64 8,61 8,58
PI-005-190101
Supply Current IVCC2 [mA]
5,7
5,4
PI-003-190101
8,55 8,52 8,49 8,46 8,43 8,40 -25 -15
5,1
4,8
4,5 -25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 23
Static Supply Current IVCC2 vs. Tj
Figure 26
VCC Turn-On/Off Hysteresis V CCHY [V]
5,10 5,07 5,04 5,01
VCC Turn-Off Threshold VVCCoff vs. Tj
9,0 8,6
ICE2B365
Supply Current I VCC3 [mA]
8,2 7,8
PI-002-190101
7,0 6,6 6,2 5,8 5,4 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2B165 ICE2B265
4,95 4,92 4,89 4,86 4,83 -25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 24
Supply Current IVCC3 vs. Tj
Figure 27
VCC Turn-On/Off HysteresisVVCCHY vs. Tj
Datasheet Preliminary Data
18
November 2001
PI-006-190101
7,4
4,98
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Typical Performance Characteristics
6,55
3,45 3,43
Trimmed Reference Voltage V REF [V]
6,54 6,53 6,52 6,51 6,50 6,49 6,48 6,47 6,46 6,45 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-007-190101
Frequency Ratio f OSC1/fOSC2
3,41 3,39 3,37 3,35 3,33 3,31 3,29 3,27 3,25 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-010a-190101
Junction Temperature [C]
Junction Temperature [C]
Figure 28
70,0
Trimmed Reference VREF vs. Tj
Figure 31
0,730 0,728 0,726
Frequency Ratio fOSC1 / fOSC2 vs. Tj
Oscillator Frequency f OSC1 [kHz]
69,5 69,0 68,5 68,0 67,5
PI-008a-190101
Max. Duty Cycle
0,724 0,722 0,720 0,718 0,716 0,714 0,712
PI-011-190101
67,0 66,5 66,0 65,5 65,0 64,5 64,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
0,710 -25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 29
21,0
Oscillator Frequency fOSC1 vs. Tj
Figure 32
3,70 3,69 3,68
Max. Duty Cycle vs. Tj
Reduced Osc. Frequency f OSC2 [kHz]
20,8 20,6
20,2
PI-009a-190101
PWM-OP Gain AV
20,4
3,67 3,66 3,65 3,64 3,63 3,62 3,61
PI-012-190101
20,0 19,8 19,6 19,4 19,2 19,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
3,60 -25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 30
Reduced Osc. Frequency fOSC2 vs. Tj
Figure 33
PWM-OP Gain AV vs. Tj
Datasheet Preliminary Data
19
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Typical Performance Characteristics
4,00
5,31
Feedback Resistance R FB [kOhm]
3,95 3,90 3,85 3,80
PI-013-190101
Detection Limit V
Soft-Start1
[V]
3,75 3,70 3,65 3,60 3,55 3,50 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
5,30
5,29 -25 -15 -5
5
15 25 35 45 55 65 75 85 95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 34
58
Feedback Resistance RFB vs. Tj
Figure 37
Detection Limit VSoft-Start1 vs. Tj
Soft-Start Resistance R Soft-Start [kOhm]
4,01
52
PI-014-190101
Detection Limit V
4,00
48 46 44 42 40 -25 -15
-5
5
15
25
35
45
55
65
75
85
95
105 115 125
3,99 -25 -15 -5
5
15 25 35 45 55 65 75 85 95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 35
4,85 4,84
Soft-Start Resistance RSoft-Start vs. Tj
Figure 38
16,80 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 -25 -15
Detection Limit VSoft-Start2 vs. Tj
Detection Limit V FB2 [V]
4,83 4,82 4,81
PI-015-190101
Overvoltage Detection Limit V VCC1 [V]
PI-017-190101
50
Soft-Start2
54
[V]
56
PI-016-190101
4,80 4,79 4,78 4,77 4,76 4,75 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 36
Detection Limit VFB2 vs. Tj
Figure 39
Overvoltage Detection Limit VVCC1 vs. Tj
Datasheet Preliminary Data
20
November 2001
PI-018-190101
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Typical Performance Characteristics
1,010
800
Peak Current Limitation V csth [V]
Breakdown Voltage V(BR)DSS [V]
1,008 1,006 1,004 1,002
PI-019-190101
750 700 650 600 550 500 450 400 -25 -15
ICE2B165 ICE2B265 ICE2B365
PI-025-190101
1,000 0,998 0,996 0,994 0,992 0,990 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Junction Temperature [C]
Figure 40
280
Peak Current Limitation Vcsth vs. Tj
Figure 43
Breakdown Voltage VBR(DSS) vs. Tj
Leading Edge Blanking t LEB [ns]
270 260 250 240 230 220 210 200 190 180 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-020-190101
Junction Temperature [C]
Figure 41
Leading Edge Blanking VVCC1 vs. Tj
3,3
On-Resistance R dson [Ohm]
3,0 2,7 2,4 2,1 1,8 1,5 1,2 0,9 0,6 0,3 0,0 -25 -15 -5 5 15 25 35
ICE2B165
ICE2B265
ICE2B365
45
55
65
75
85
95 105 115 125
Junction Temperature [C]
Figure 42
Drain Source On-Resistance RDSon vs. Tj
Datasheet Preliminary Data
PI-022-190101
21
November 2001
Preliminary Specification
CoolSETTM-F2 ICE2B165/265/365
Outline Dimension
6
Outline Dimension
P-DIP-8-6 (Plastic Dual In-line Package)
Figure 44
Dimensions in mm
Datasheet Preliminary Data
22
November 2001
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Qualitat hat fur uns eine umfassende Bedeutung. Wir wollen allen Ihren Anspruchen in der bestmoglichen Weise gerecht werden. Es geht uns also nicht nur um die Produktqualitat - unsere Anstrengungen gelten gleichermaen der Lieferqualitat und Logistik, dem Service und Support sowie allen sonstigen Beratungs- und Betreuungsleistungen. Dazu gehort eine bestimmte Geisteshaltung unserer Mitarbeiter. Total Quality im Denken und Handeln gegenuber Kollegen, Lieferanten und Ihnen, unserem Kunden. Unsere Leitlinie ist jede Aufgabe mit Null Fehlern" zu losen - in offener Sichtweise auch uber den eigenen Arbeitsplatz hinaus - und uns standig zu verbessern. Unternehmensweit orientieren wir uns dabei auch an top" (Time Optimized Processes), um Ihnen durch groere Schnelligkeit den entscheidenden Wettbewerbsvorsprung zu verschaffen. Geben Sie uns die Chance, hohe Leistung durch umfassende Qualitat zu beweisen. Wir werden Sie uberzeugen. Quality takes on an allencompassing significance at Semiconductor Group. For us it means living up to each and every one of your demands in the best possible way. So we are not only concerned with product quality. We direct our efforts equally at quality of supply and logistics, service and support, as well as all the other ways in which we advise and attend to you. Part of this is the very special attitude of our staff. Total Quality in thought and deed, towards co-workers, suppliers and you, our customer. Our guideline is "do everything with zero defects", in an open manner that is demonstrated beyond your immediate workplace, and to constantly improve. Throughout the corporation we also think in terms of Time Optimized Processes (top), greater speed on our part to give you that decisive competitive edge. Give us the chance to prove the best of performance through the best of quality - you will be convinced.
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