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TDA1675A
VERTICAL DEFLECTION CIRCUIT
. . . . . . . . .
SYNCHRONISATION CIRCUIT ESD PROTECTED PRECISION OSCILLATOR AND RAMP GENERATOR POWER OUTPUT AMPLIFIER WITH HIGH CURRENT CAPABILITY FLYBACK GENERATOR VOLTAGE REGULATOR PRECISION BLANKING PULSE GENERATOR THERMAL SHUT DOWN PROTECTION CRT SCREEN PROTECTION CIRCUIT WHICH BLANKS THE BEAM CURRENT IN THE EVENT OF LOSS OF VERTICAL DEFLECTION CURRENT
MULTIWATT 15 (Plastic Package) ORDER CODE : TDA1675A
DESCRIPTION The TDA1675A is a monolithic integrated circuit in 15-lead Multiwatt(R) package. It is a full performance and very efficient vertical deflection circuit intended for direct drive of the yoke of 110o colour TV picture tubes. It offers a wide range of applications also in portable CTVs, B&W TVs, monitors and displays. PIN CONNECTIONS (top view)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
FLYBACK SUPPLY BLANKING OUTPUT AMPLIFIER INPUT (-) AMPLIFIER INPUT (+) RAMP OUTPUT RAMP GENERATOR GROUND HEIGHT ADJUSTMENT OSCILLATOR SYNC. INPUT OSCILLATOR OSCILLATOR AMPLIFIER SUPPLY AMPLIFIER OUTPUT
1675A-01.EPS
Tab connected to Pin 8
September 1993
1/11
TDA1675A
BLOCK DIAGRAM
+ +V S
BLANKING OUT
13
14
2
+ C
f
BLANK GENERATOR AND CRT PROTECTION 6
VOLTAGE REGULATOR
FLYBACK GENERATOR
15
11
Ro 4
Co 3
OSCILLATOR RAMP GENERATOR
R3
+
CLOCK PULSE
POWER AMP. -
1
Ly Ry Iy
YOKE
R1
R2 12
Re
7
SYNC.
SYNC.
BUFFER STAGE
THERMAL PROTECTION
Ra
7
9
10
8
Rb
Rc
+
+
Ca
Cc
LIN
1675A-02.EPS
HEIGHT
Rd
Cb
Rf
ABSOLUTE MAXIMUM RATINGS
Symbol VS V1, V2 V5 V11, V12 V13 IO IO IO I15 I15 Ptot Tstg, Tj Supply Voltage at Pin 14 Flyback Peak Voltage Sync. Input Voltage Power Amplifier Input Voltage Voltage at Pin 13 Output Current (non repetitive) at t = 2ms Output Peak Current at f = 50Hz t > 10s Output Peak Current at f = 50Hz t 10 s Pin 15 Peak-to-peak Flyback Current at f = 50Hz, tfly 1.5ms Pin 15 D.C. Current at V1 < V14 Maximum Power Dissipation at Tcase 60oC Storage and Junction Temperature Parameter Value 35 65 20 VS - 10 VS 3 2 3.5 3 100 30 - 40, + 150 A A A A W
o
1675A-01.TBL 1675A-02.TBL
Unit V V V V
mA C
THERMAL DATA
Symbol RTH(j-c) RTH(j-a) Parameter
Thermal Resistance Junction-case Thermal Resistance Junction-ambient
Value Max. Max. 3 40
Unit
o o
C/W C/W
2/11
TDA1675A
DC ELECTRICAL CHARACTERISTICS (VS = 35V, Tamb = 25oC, unless otherwise specified)
Symbol I2 - I9 - I9 I 9 I9 I14 V1 V1L V1H V4 V7 V 7 VS V11 V13 V15 Parameter Pin 2 quiescent current Ramp generator bias current Ramp generator current Ramp generator non linearity Pin 14 quiescent current Quiescent output voltage Output saturation voltage to ground Output saturation voltage to supply Oscillator virtual ground Regulated voltage at pin 7 Regulated voltage drift with supply voltage Amplifier input (+) reference voltage Blanking output saturation voltage Pin 15 saturation voltage to ground Test conditions I1 = 0 V9 = 0 V9 = 0 ; - I7 = 20A V9 = 0 to 15V, - I7 = 20A Min. Typ. 16 0.02 20 0.2 25 17.8 7.5 1 1.6 0.45 6.6 1 4.1 I13 = 10 mA I15 = 20 mA 4.4 0.35 1 Max. 36 1 21.5 1 45 19.5 8.1 1.4 2.2 7 2 4.7 0.5 1.5 Unit mA A A % mA V V V V V V mV V V V V Fig. 1b 1b 1b 1b 1b 1a 1c 1d 1b 1b 1b
1675A-03.TBL 1675A-06.EPS 1675A-04.EPS
18.5
VS = 35V, Ra = 2.2k, Rb = 1k VS = 15V, Ra = 390, Rb = 1k I1 = 1.2A, - I1 = 1.2A - I7 = 20A VS = 15 to 35V
16.4 6.9
6.3
1b 1a 1a
Figure 1 : DC Test Circuit. Figure 1a
I 15 VS V13
13 7
Figure 1b
V15
VS
V11
11 4
I 13
I2+ I1 2
14
I 14
A
2
14
15
B 1V
V4
1 3
I1
1
75k
8V Ra 4 1V 9 -I 9 0.1F 5 11 8 10
12
5
12
V1 Rb
10
7
9 -I 9
8
1675A-03.EPS
V7
-I 7
V9
Figure 1c
VS 2
4
Figure 1d
VS 14 +I 1 1 12 11 5 0.1F 10 8 V1L
1675A-05.EPS
2
4
14
V1H 1 12 8V 11 5 0.1F 10 8 -I 1 1V
1V
8V
47k
22k
3/11
TDA1675A
AC ELECTRICAL CHARACTERISTICS (Refer to A.C. test circuit of fig. 2, Tamb = 25oC, VS = 24V, f = 50Hz, unless otherwise specified)
Symbol IS I5 V1 V3 V10TH(L) tFLY tBLANK fo f Tj VON Parameter Supply Current Sync Input Current Required to Sync Flyback Voltage Peak-to-peak Oscillator Sawtooth Voltage Start Scan Level of the Input Ramp Flyback Time Blanking Pulse Duration Free Running Frequency Synchronization Range Junction Temperature for Thermal Shut-down Peak-to-peak Output Noise Iy = 2App fo = 50Hz, Tj = 75 C fo = 60Hz, Tj = 75oC Ro = 7.5k, Co = 330nF, Tj = 75oC Ro = 6.2k, Co = 330nF, Tj = 75oC I5 = 100A, Tj = 75oC
o
Test conditions IY = 2APP
Min. 100
Typ. 295 50 3.6 3.4 1.85 0.6
Max.
Unit mA A V V V V ms
Iy = 2App I5 = 0 I5 = 100A
1.33 42 14
1.4 1.17 43.5 52.5 16 145
1.47 46
ms ms Hz Hz Hz C
1675A-04.TBL 1675A-07.EPS
o
35
mVPP
Figure 2 : AC Test Circuit
1N4001 220F t f Iy V1 GND
13 14
+V S
1000F
t blank
2.4k BLANKING OUT
0.1F
2
15
1/fo 1
2.2
100A SYNC. IN t sync. 6
7.5k 4.7k
5
YOKE 10mH
270 5.9
TDA 1675A
S1 (R o ) 4 3
7 9 11 10 8 12
0.22F
IY
0.33F
0.1F
15k
1k
t blank 1/fo
Co
120
4.7k (FREQ.)
A B
2.4k
2200F R f Iy
0.82
560k
V3 SERVICE SWITCH
180k
0.1F 56k
47F 100k LINEARITY GND 1/fo V10 V10thL
Rf
1/fo
S2
220k HEIGHT
0.1F
4/11
TDA1675A
Figure 3 : Application Circuit for Small Scree 90o CTV Set (Ry = 15 ; Ly = 30 mH ; Iy = 0.82 APP)
1N4001 220F - 35V +V S R3 10k BLANKING OUT
13 14
C2 35V 470F
C3 0.1F
D1
C4
2
15
SYNC. PULSE IN
0.1F 5 C1 R1 4.7k 6 1 R9 2.2
YOKE
Ro
TDA 1675A
12
C7
0.22F 2.4k
R11 330
7.5k 1%
4
C
o
330nF 5%
3
7
9
11
10
8
0.1F R2 15k SERVICE SWITCH R4 150k
*
R5 390k 100k
*
C5 0.1F 56k C6 0.1F RT2
R7 910 2%
R8 120 C8
*
R10 2% C9 1000F 25V
47F 10V
LINEARITY
HEIGHT
* The value depends on the characteristics of the CRT. The value shown is indicative only.
TYPICAL PERFORMANCE
Symbol VS IS tFLY tBLKG fO * PTOT * RTH(heatsink) Minimum supply voltage Supply current Flyback time Banking time Free running frequency Power dissipation Thermal resistance of the heatsink o o for Tamb = 60oC and Tj max = 110 oC for Tamb = 60 C and Tj max = 120 C Parameter Value 25 140 0.7 1.4 43.5 2.4 13 16 Unit V mA ms ms Hz W
o C/W o
1675A-05.TBL
C/W
* Worst case condition.
5/11
1675A-08.EPS
S1
* R6
100k
5%
R12 2.2
RT1
TDA1675A
Figure 4 : Application Circuit for 110o CTV Set (Ry = 9.6 ; Ly = 24.6 mH ; Iy = 1.2 APP)
1N4001 220F - 25V +V S R3 10k BLANKING OUT
13 14
C2 35V 470F
C3 0.1F
D1
C4
2
15
SYNC. PULSE IN
0.1F 5 C1 R1 4.7k 6 1 R9 2.2
YOKE
Ro
TDA 1675A
12
C7
0.22F 2.4k
R11 330
7.5k 1%
4
C
o
330nF 5%
3
7
9
11
10
8
0.1F R2 15k SERVICE SWITCH R4 180k
*
*
C5 0.1F 56k RT2
R7 1.2k 2%
R8 120 C8
*
R10 2% C9 1500F 16V
47F 10V
R5 470k 220k
LINEARITY
1675A-09.EPS
S1
RT1 HEIGHT
* R6 C6 0.1F
100k
5%
R12 1.2
* The value depends on the characteristics of the CRT. The value shown is indicative only.
TYPICAL PERFORMANCE
Symbol VS IS tFLY tBLKG fO * PTOT * RTH(heatsink) Minimum supply voltage Supply current Flyback time Banking time Free running frequency Power dissipation Thermal resistance of the heatsink for Tamb = 60oC and Tj max = 110oC for Tamb = 60oC and Tj max = 120oC Parameter Value 22.5 185 1 1.4 43.5 2.7 11.5 14.5 Unit V mA ms ms Hz W
o C/W o
1675A-06.TBL
C/W
* Worst case condition.
6/11
TDA1675A
Figure 5 : Application Circuit for 110o CTV Set (Ry = 5.9 ; Ly = 10 mH ; Iy = 1.95 APP)
1N4001 220F - 25V +V S R3 10k BLANKING OUT
13 14
C2 35V 1000F
C3 0.1F
D1
C4
2
15
SYNC. PULSE IN
0.1F 5 C1 R1 4.7k 6 1 R9 2.2
YOKE
Ro
TDA 1675A
12
C7
0.22F 2.4k
R11 330
7.5k 1%
4
C
o
330nF 5%
3
7
9
11
10
8
0.1F R2 15k SERVICE SWITCH R4 180k
*
*
C5 0.1F 56k C6 0.1F RT2
R7 1k 2%
R8 120 C8
*
R10 2% C9 2200F 16V
47F 10V
R5 560k 220k
LINEARITY
RT1 HEIGHT
* The value depends on the characteristics of the CRT. The value shown is indicative only.
TYPICAL PERFORMANCE
Symbol VS IS tFLY tBLKG fO * PTOT * RTH(heatsink) Minimum supply voltage Supply current Flyback time Banking time Free running frequency Power dissipation Thermal resistance of the heatsink for Tamb = 60oC and Tj max = 110oC for Tamb = 60oC and Tj max = 120oC Parameter Value 24 285 0.6 1.4 43.5 4.3 6.5 8.5 Unit V mA ms ms Hz W
o C/W o
1675A-07.TBL
C/W
* Worst case condition.
7/11
1675A-10.EPS
S1
* R6
100k
5%
R12 0.82
TDA1675A
Figure 6 : PC Board and Components Layout for the Application Circuits of Figures 3, 4 and 5 (1 : 1 scale)
Ro
S1
R2
TDA 1675A
C3 R4 R3
Co
RT1
C4 R5
C11
R9 C6
R1
D1
RT2
C7 C1
C5
R6 R7 R8 C8
C2
R10
C9
R12
R11
1675A-11.EPS
YOKE GND SYNC. Iy IN TEST
VS
BLANK GND OUT
APPLICATION INFORMATION (Refer to the block diagram) Oscillator and sync gate (Clock generation) The oscillator is obtained by means of an integrator driven by a two threshold circuit that switches Ro high or low so allowing the charge or the discharge of Co under constant current conditions. The Sync input pulse at the Sync gate lowers the level of the upper threshold and than it controls the period duration. A clock pulse is generated. Pin 4 is the inverting input of the amplifier used as integrator.
8/11
Pin 6
Pin 3 Pin 5
is the output of the switch driven by the internal clock pulse generated by the threshold circuits. is the output of the amplifier. is the input for sync pulses (positive)
Ramp generator and buffer stage A current mirror, the current intensity of which can be externally adjusted, charges one capacitor producing a linear voltage ramp. The internal clock pulse stops the increasing ramp by a very fast discharge of the capacitor a new voltage ramp is immediately allowed.
TDA1675A
The required value of the capacitance is obtained by means of the series of two capacitors Ca and Cb, which allow the linearity control by applying a feedback between the output of the buffer and the tapping from Ca and Cb. Pin 7 The resistance between pin 7 and ground defines the current mirror current and than the height of the scanning. Pin 9 is the output of the current mirror that charges the series of Ca and Cb. This pin is also the input of the buffer stage. Pin 10 is the output of the buffer stage and it is internally coupled to the inverting input of the power amplifier through R1. Power amplifier This amplifier is a voltage-to-current power converter, the transconductance of which is externally defined by means of a negative current feedback. The output stage of the power amplifier is supplied by the main supply during the trace period, and by the flyback generator circuit during the most of the duration of the flyback time. The internal clock turns off the lower power output stage to start the flyback. The power output stage is thermally protected by sensing the junction temperature and then by putting off the current sources of the power stage. Pin 12 is the inverting input of the amplifier. An external network, Ra and Rb, defines the DClevel across Cy so allowing a correct centering of the output voltage. The series network Rc and Cc, in conjunction with Ra and Rb, applies at the feedback input I2 a small part of the parabola, available across Cy, and AC feedback voltage, taken across Rf. The external components Rc, Ra and Rd, produce the linearity correction on the output scanning currentIy and their values must be optimized for each type of CRT. Pin 11 is the non-inverting input. At this pin the non-inverting input reference voltage supplied by the voltage regulator can be measured. A capacitor must be connected to increase the performances from the noise point of view. Pin 1 is the output of the power amplifier and it drives the yoke by a negative slope current ramply. Re and the Boucherot cell are used to stabilize the power amplifier. The supply of the power output stage is forced at this pin. During the trace time the supply voltage is obtained from the main supply voltage VS by a diode, while during the retrace time this pin is supplied from the flyback generator.
Pin 2
Flyback generator This circuit supplies both the power amplifier output stage and the yoke during the most of the duration of the flyback time (retrace). The internal clock opens the loop of the amplifier and lets pin 1 floating so allowing the rising of the flyback. Crossing the main supply voltage at pin 14, the flyback pulse front end drives the flyback generator in such a way allowing its output to reach and overcome the main supply voltage, starting from a low condition forced during the trace period. An integrated diode stops the rising of this output increase and the voltage jump is transferred by means of capacitor Cf at the supply voltage pin of the power stage (pin 2). When the current across the yoke changes its direction, the output of the flyback generator falls down to the main supply voltage and it is stopped by means of the saturated output darlington at a high level. At this time the flyback generator starts to supply the power output amplifier output stage by a diode inside the device. The flyback generator supplies the yoke too. Later, the increasing flyback current reaches the peak value and then the flyback time is completed: the trace period restarts. The output of the power amplifier (pin 1) falls under the main supply voltage and the output of the flyback generator is driven for a low state so allowing the flyback capacitor Cf to restore the energy lost during the retrace. Pin 15 is the output of the flyback generator that, when driven, jumps from low to high condition. An external capacitor Cf transfers the jump to pin 2 (see pin 2). Blanking generator and CRT protection This circuit is a pulse shaper and its output goes high during the blanking period or for CRT protection. The input is internally driven by the clock pulse that defines the width of the blanking time
9/11
TDA1675A
when a flyback pulse has been generated. If the flyback pulse is absent (short cirucit or open cirucit of the yoke), the blanking output remains high so allowing the CRT protection. Pin 13 is an open collector output where the blanking pulse is available. Voltage regulator The main supply voltage VS, is lowered and regulated internally to allow the required reference voltages for all the above described blocks. Pin 14 is the main supply voltage input VS (positive). Pin 8 is the GND pin or the negative input of VS Figure 7 :
V 1L
Figure 8 :
Output Saturation Voltage to Supply versus Output Peak Current
2
V1H (V)
VS = 35V 1.5
1 I Y (App) 0.5 0 0.5 1 1.5 2
1675A-13.EPS 1675A-15.IMG 1675A-14.EPS
Output Saturation Voltage to Ground vs. Peak Output Current
(V)
Figure 9 :
Maximum allowable Power Dissipation vs. Ambient Temperature
1.5 VS = 35V
32 24
Ptot (W)
R
R
E IT FIN IN
th
=4
th
1 16 0.5 8 I Y (App) 0 0.5 1 1.5 2
1675A-12.EPS
R
C /W
=
th
= 8
2 C/ W
K SIN AT HE
C /W
T amb (C) 0 -50 0 50 100 150
MOUNTING INSTRUCTIONS The power dissipated in the circuit must be removed by adding an external heatsink. Thanks to the MULTIWATT (R) package attaching the heatsink is very simple, a screw or a compression Figure 10 : Mounting Examples
spring (clip) being sufficient. Between the heatsink and the package, it is better to insert a layer of silicon grease, to optimize the thermal contact; no electrical isolation is needed between the two surfaces.
10/11
TDA1675A
PACKAGE MECHANICAL DATA : 15 PINS - PLASTIC MULTIWATT
Dimensions A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia. 1
Min.
Millimeters Typ.
Max. 5 2.65 1.6 0.55 0.75 1.4 17.91 20.2 22.6 22.5 18.1 17.75 10.9 2.9 4.6 5.3 2.6 2.6 3.85
Min.
Inches Typ.
Max. 0.197 0.104 0.063 0.022 0.030 0.055 0.705 0.795 0.890 0.886 0.713 0.699 0.429 0.114 0.181 0.209 0.102 0.102 0.152
1 0.49 0.66 1.14 17.57 19.6 22.1 22 17.65 17.25 10.3 2.65 4.2 4.5 1.9 1.9 3.65 0.019 0.026 0.045 0.692 0.772 0.870 0.866 0.695 0.679 0.406 0.104 0.165 0.177 0.075 0.075 0.144
0.039
1.27 17.78
0.050 0.700
17.5 10.7 4.3 5.08
0.689 0.421 0.169 0.200
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
11/11
MUL15V.TBL
PMMUL15V.EPS

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