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PD - 93912A
IRFPS3810
HEXFET(R) Power MOSFET
l l l l l l
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated
D
VDSS = 100V
G S
RDS(on) = 0.009 ID = 170A
Description
The HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
Super-247TM
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
170 120 670 580 3.8 30 1350 100 58 2.3 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.26 --- 40
Units
C/W
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1/21/02
IRFPS3810
V(BR)DSS
V(BR)DSS/TJ
APPROVED
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 100 --- --- 3.0 52 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.009 VGS = 10V, ID = 100A 5.0 V VDS = 10V, ID = 250A --- S VDS = 50V, ID = 100A 25 VDS = 100V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 30V nA -100 VGS = -30V 390 ID = 100A 74 nC VDS = 80V 250 VGS = 10V --- VDD = 50V --- ID = 100A ns --- RG = 1.03 --- VGS = 10V D Between lead, 5.0 --- 6mm (0.25in.) nH G from package 13 --- and center of die contact S 6790 --- VGS = 0V 2470 --- pF VDS = 25V 990 --- = 1.0MHz, See Fig. 5 10740 --- VGS = 0V, VDS = 1.0V, = 1.0MHz 1180 --- VGS = 0V, VDS = 80V, = 1.0MHz 2210 --- VGS = 0V, VDS = 0V to 80V Typ. --- 0.11 --- --- --- --- --- --- --- 260 49 160 24 270 45 140
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 170 showing the A G integral reverse --- --- 670 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 100A, VGS = 0V --- 220 330 ns TJ = 25C, IF = 100A --- 1640 2460 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25C, L = 0.27mH
R G = 25, IAS = 100A. (See Figure 12)
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 105A.
ISD 100A, di/dt 350A/s, VDD V(BR)DSS,
2
TJ 175C
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APPROVED
IRFPS3810
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
1000
100
10
1
5.0V
0.1
10
5.0V
0.01 0.1
50s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
50s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 170A
I D , Drain-to-Source Current (A)
2.5
TJ = 175 C
100
2.0
1.5
TJ = 25 C
10
1.0
0.5
1 5 6 7 8 9
V DS = 50V 50s PULSE WIDTH 10 11 12 13
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFPS3810
15000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd , C gs ds SHORTED Crss = C gd Coss = Cds + Cgd
APPROVED
20
ID = 100A VDS = 80V VDS = 50V VDS = 20V
VGS , Gate-to-Source Voltage (V)
16
C, Capacitance(pF)
10000
12
Ciss
8
5000
Coss Crss
4
0 1 10 100
0 0 100 200
FOR TEST CIRCUIT SEE FIGURE 13
300 400
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000
TJ = 175 C
100
100
100sec 1msec
TJ = 25 C
10 Tc = 25C Tj = 175C Single Pulse 1 10 10msec
10 0.2
V GS = 0 V
0.8 1.4 2.0 2.6
1
100
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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APPROVED
IRFPS3810
V DS VGS RD
200
LIMITED BY PACKAGE
160
ID , Drain Current (A)
RG VGS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
120
80
Fig 10a. Switching Time Test Circuit
40
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFPS3810
15V
APPROVED
EAS , Single Pulse Avalanche Energy (mJ)
3000
2500
VDS
L
DRIVER
ID 41A 71A BOTTOM 100A TOP
2000
RG
20V
D.U.T
IAS tp
+ V - DD
A
1500
0.01
Fig 12a. Unclamped Inductive Test Circuit
1000
500
V(BR)DSS tp
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
12V .2F
50K .3F
QGS VG
QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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APPROVED
IRFPS3810
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFPS3810
Super-247TM Package Outline
APPROVED
0.13 [.005] 16.10 [.632] 15.10 [.595] 5.50 [.216] 4.50 [.178] 2.15 [.084] 1.45 [.058]
0.25 [.010]
BA
2X R 3.00 [.118] 2.00 [.079]
A
13.90 [.547] 13.30 [.524]
1.30 [.051] 0.70 [.028] 20.80 [.818] 19.80 [.780] 4 16.10 [.633] 15.50 [.611] 4
C 1 2 3
B O 1.60 [.063] MAX. E E
14.80 [.582] 13.80 [.544]
4.25 [.167] 3.85 [.152]
5.45 [.215] 2X
3X
1.60 [.062] 1.45 [.058] BA
3X
1.30 [.051] 1.10 [.044]
0.25 [.010]
S ECT ION E-E NOT ES : 1. DIMENSIONING AND T OLERANCING PER ASME Y14.5M-1994. 2. DIMENSIONS ARE S HOWN IN MILLIMET ERS [INCHES] 3. CONT ROLLING DIMENSION: MILLIMET ER 4. OUT LINE CONFORMS T O JEDEC OUT LINE T O-274AA
2.35 [.092] 1.65 [.065]
LEAD ASS IGNMENT S MOS FET 1 - GAT E 2 - DRAIN 3 - S OURCE 4 - DRAIN IGBT 1 - GAT E 2 - COLLECT OR 3 - EMIT T ER 4 - COLLECT OR
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.1/02
8
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