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| CXA1842S 3-Mode Surround and Vocal Cancellation Description The CXA1842S is a bipolar IC which combines 3mode surround, bass boosting and vocal cancellation function into a single chip. Features * 3-mode surround (surround A, surround B, simulated stereo) * Vocal cancellation function * Bass boosting function Applications CD Radio-cassette tape recorders, equipment with Karaoke functions Structure Bipolar silicon monolithic IC 22 pin SDIP (Plastic) Absolute Maximum Ratings (Ta=25C) * Supply voltage VCC 14 * Operating temperature Topr -20 to +75 * Storage temperature Tstg -65 to +150 * Allowable power dissipation PD 880 Recommended Operating Conditions Supply voltage VCC 5 to 12 V C C mW V Block Diagram and Pin Configuration LPF L1 Lch OUT 12 S4 REF S6 VCA S5 S4 REF 11 LPF L2 LPF L3 DET L DET R Lch IN PSN1 PSN2 GND 22 21 20 19 18 17 16 15 14 13 DET DET S2 S.S VCA S6 REF Vcc S3 VCA DET -6 S5 S1 SW CONT R2 R1 1 Rch IN 2 LPF R1 3 LPF R2 4 LPF R3 5 DET V.C 6 V.C 7 B.B 8 SW1 9 SW2 10 Vcc Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- Rch OUT REF E93702-TE CXA1842S Pin Description Pin No. Symbol Pin Voltage Equivalent Circuit (VCC=10V, Ta=25C) Description Channel L input pin Channel R VCC 1 Rch IN 5.0V 1 129 22 56K AGND 22 Lch IN GND Time constants for L.P.F. 32K 2 21 LPF R1 LPF L1 2 64K 80K AGND 3 20 LPF R2 LPF L2 21 5.0V 3 20 4 19 LPF R3 LPF L3 4 19 VCC 5 DET V.C Level detector pin. To be connected with a capacitor 5 17 DET R 0.5V 129 17 5K 18 100K 500 200 200 18 DET L --2-- CXA1842S Pin No. Symbol Pin Voltage Equivalent Circuit VCC Description SW is turned ON when this pin is connected to GND 6 7 8 9 V.C B.B -- SW 1 SW 2 6 129 AGND VCC 7 8 9 VCC 48K 10 Reference voltage (1/2 VCC) 10 REF 5.0V 48K AGND GND VCC Channel R output pin Channel L 11 Rch OUT 5.0V 11 129 297 12 Lch OUT 297 12 13 14 Vcc GND 10V 0 Power supply GND pin The pin to be connected with a capacitor for time constants of phase shift VCC 15 PSN 2 5.0V 15 16 16 PSN 1 --3-- CXA1842S Electrical Characteristics No. 1 2 3 4 5 6 7 8 9 Item No signal current Lch gain Rch gain Channel balance Lch total harmonic distortion Rch total harmonic distortion Lch noise level Rch noise level Channel separation Conditions Vin=GND Vin=2Vrms, f=1kHz Lch gain - Rch gain Vin=2Vrms, f=1kHz Vin=GND Vin=2Vrms, f=1kHz SW conditions S1 S2 S3 S4 S5 S6 O O O O O ------------ O O O O O O O O (VCC=10V, Ta=25C) Min. Typ. Max. Unit 1.6 -3 -3 -3 -- -- -- -- 55 3.35 0 0 0 0.07 0.07 - 90 - 90 63 5.1 mA 3 dB 3 dB 3 dB 0.1 % 0.1 % - 80 dBm - 80 dBm -- dB S7 O -- O O O O...indicates "ON". Electrical Characteristics Measurement Circuit C2 2200p C11 0.01 0.1 C6 10 C15 10 C10 10 C4 C8 C9 10V 0.022 20 19 22 21 18 17 16 15 14 V1 10 10 12 13 DET L DET R Lch IN PSN1 LPF L1 PSN2 LPF L2 GND LPF L3 Vcc S5 Lch OUT 10k S7 S6 R4 C12 LPF R2 SW1 1 C3 C1 10 2 0.1 3 C5 4 C7 5 10 S3 6 S4 B.B 7 S1 8 S2 9 C13 10 Rch OUT LPF R1 Rch IN DET V.C VIN V LPF R3 SW2 V.C REF 11 C14 0.022 10 --4-- 10k R3 10 CXA1842S Application Circuit GND C2 C12 10 Vcc C15 10 2200p C10 10 22 0.022 20 19 21 18 17 16 C11 15 0.01 14 0.1 C6 10 10 C4 C8 C9 13 12 Lch IN GND Rch IN CXA1842S Lch OUT GND Rch OUT 1 C3 C1 10 2 0.1 3 C5 4 C7 5 SW3 10 6 SW4 7 SW1 8 SW2 9 C13 10 11 C14 10 0.022 Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. Mode Switch Correspondence No. 1 2 3 4 5 MODE Simulated Stereo Surround A Surround B Pass Vocal cancel SW1 ON ON OFF OFF -- SW2 ON OFF ON OFF -- SW3 ON ON ON ON OFF --...don't care Bass boosting ON when SW4=ON (Invalid during vocal cancellation) VTH for SW ... VTH (H) = VCC to 3 V, VTH (L) = 2 V to GND --5-- 10 CXA1842S Description of Functions (1) Simulated Stereo The sum of the L and R signals is input to the Simulated Stereo* (hereafter S.S) block, and a simulated stereo signal is generated. (2) Surround A (matrix surround) The difference of the L and R signals is raised in level by the VCA (maximum 18 dB (typ.)), and is added to the raw signal. (3) Surround B The difference of the L and R signals is raised in level by the VCA (maximum 18 dB (typ.)), is input to the S.S block, and is then added to the raw signal. (4) Pass The L and R signals are output without modification. (5) Vocal Cancellation The difference of the L and R signals is input to the S.S block after first passing through the AGC circuit, and is then output to L and R. In contrast with conventional products, the vocal cancel signal (L-R signal) is raised in level by the VCA (max. 12 dB typ.), and low frequency part is enhanced, to prevent reduction in the acoustic pressure level when vocal cancellation is ON. * Simulated Stereo circuit: Phases in the audio band are divided into two separate orthogonal channels and treated as L+R and L-R signals, and are added and subtracted to produce simulated L and R signals. All-pass network. --6-- CXA1842S Surround Frequency response Sur B Lin Rout +20 Sste Rout Sur B Rin Rout 20 Vocal cancellation Frequency response Vin=-40 dBm Surround (dB) Vocal cancellation +10 Vin=-10 dBm 0 0 Sste Lout -10 -20 -20 100 1K 10K -40 Frequency (Hz) 10 100 1K 10K Frequency (Hz) Bass boosting Frequency response 10 Surround f=50Hz Vin=-50 dBm 0 Input/Output Characteristic Bass boosting production (dB) Output level (dBm) 20 -10 Sur A f=1kHz -20 Vin=-30 dBm 10 Vin=-20 dBm -30 -40 Sur A BB ON 2 1 THD (%) 0 -60 -50 -40 -30 -20 -10 0 10 Input level (dBm) 100 1K 10K Frequency (Hz) Supply voltage vs. Current consumption Current consumption (mA) 4 3 2 1 5 6 7 8 9 10 11 12 Supply voltage (VCC) --7-- CXA1842S Package Outline Unit : mm 22PIN SDIP (PLASTIC) + 0.1 0.05 0.25 - + 0.4 19.2 - 0.1 22 12 + 0.3 6.4 - 0.1 1 1.778 11 0.5 0.1 + 0.15 0.9 - 0.1 + 0.15 3.25 - 0.2 0.51 MIN + 0.4 3.9 - 0.1 PACKAGE STRUCTURE MOLDING COMPOUND SONY CODE EIAJ CODE JEDEC CODE SDIP-22P-01 SDIP022-P-0300 LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.95g --8-- 7.62 0 to 15 |
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