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 SINGLE SUPPLY 1:9 PECL-TO-TTL
ClockWorksTM SY10H641 SY100H641
FEATURES
s s s s s s s s s s Input frequencies up to 135MHz PECL-to-TTL version of popular ECLinPS E111 Guaranteed low skew specification Latched input Differential internal design VBB output VECL for single-ended operation
DESCRIPTION
The SY10/100H641 are single supply, low skew translating 1:9 clock drivers. Devices in the MicrelSynergy H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The devices feature a 24mA TTL output stage with AC performance specified into a 50pF load capacitance. A latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. The 10H version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels.
Single +5V supply Reset/enable Extra TTL and ECL power/ground pins Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx) s Available in 28-pin PLCC package
BLOCK DIAGRAM
TTL Outputs Q0
PIN CONFIGURATION
GT Q6 VT Q7 VT Q8 GT
25 24 23 22 21 20 19
GT Q5
26 27 28 1 2 3 4 5 6 7 8 9 10 11
18 17 16
VBB D D VE LEN GE EN
Q1
VT Q4 VT Q3 GT
TOP VIEW PLCC
15 14 13 12
Q2
GT Q2
VT Q1
VT Q0
D D VBB
D
Q
Q4
PIN NAMES
Q5 Pin GT Q6 VT VE GE Q7 D, D VBB Q0 - Q8 Q8 EN LEN Function TTL Ground (0V) TTL VCC (+5.0V) ECL VCC (+5.0V) ECL Ground (0V) Signal Input (PECL) VBB Reference Output (PECL) Signal Outputs (TTL) Enable Input (PECL) Latch Enable Input (PECL)
Rev.: D Amendment: /0
LEN EN
1
GT
Issue Date: March, 1999
PECL Input
Q3
Micrel
ClockWorksTM SY10H641 SY100H641
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VE (ECL) VT (TTL) VI (ECL) VOUT (TTL) IOUT (ECL) Rating Power Supply Voltage Input Voltage Disabled 3-State Output Output Current - Continuous - Surge Storage Temperature Operating Temperature Value -0.5 to +7.0 -0.5 to +7.0 0.0 to VEE 0.0 to VCCT Unit V V V mA 50 100 -65 to +150 0 to +85 C C
TRUTH TABLE
D L H X X LEN L L H X EN L L L H Q L H Q0 L
Tstore TA
NOTE: 1. Do not exceed.
VCC AND CLOAD
Ranges to meet duty cycle requirement: 0C TA 85C. Output duty cycle measured relative to 1.5V.
Symbol PW1 Parameter Ranges of VCC and CL to meet min. pulse width (HIGH or LOW) at fOUT 40MHz Ranges of VCC and CL to meet min. pulse width (HIGH or LOW) at fOUT 50MHz VCC CL PW VCC CL PW Min. 4.75 10 11 4.875 15 9.0 Typ. 5.0 -- -- 5.0 -- -- Max. 5.25 50 -- 5.125 27 -- Unit V pF ns V pF ns Condition All Outputs
PW2
All Outputs
DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V 5%
TA = 0C Symbol IEE ICCH ICCL Parameter Power Supply Current ECL TTL Min. -- -- -- Max. 30 30 35 TA = +25C Min. -- -- -- Max. 30 30 35 TA = +85C Min. -- -- -- Max. 30 30 35 Unit mA Condition VE Pin Total all VT pins
TTL DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V 5%
TA = 0C Symbol VOH VOL IOS Parameter Output HIGH Voltage Output LOW Voltage Output Short Circuit Current Min. 2.0 -- -100 Max. -- 0.5 -225 TA = +25C Min. 2.0 -- -100 Max. -- 0.5 -225 TA = +85C Min. 2.0 -- -100 Max. -- 0.5 -225 Unit V V mA Condition IOH = -15mA IOL = 24mA VOUT = 0V
2
Micrel
ClockWorksTM SY10H641 SY100H641
10H ECL DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V 5%
TA = 0C Symbol IIH IIL VIH VIL VBB Parameter Input HIGH Current Input LOW Current Input HIGH Voltage(1) Voltage(1) Input LOW Voltage(1) Output Reference Min. -- 0.5 3.830 3.050 3.620 Max. 225 -- 4.160 3.520 3.730 TA = +25C Min. -- 0.5 3.870 3.050 3.650 Max. 175 -- 4.190 3.520 3.750 TA = +85C Min. -- 0.5 3.940 3.050 3.690 Max. 175 -- 4.280 3.555 3.810 Unit A A V V V Condition -- -- VE = 5.0V VE = 5.0V VE = 5.0V
NOTE: 1. VIH, VIL and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = +5.0V.
100H ECL DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V 5%
TA = 0C Symbol IIH IIL VIH VIL VBB Parameter Input HIGH Current Input LOW Current Input HIGH Voltage(1) Input LOW Voltage(1) Output Reference Voltage(1) Min. -- 0.5 3.835 3.190 3.620 Max. 225 -- 4.120 3.525 3.740 TA = +25C Min. -- 0.5 3.835 3.190 3.620 Max. 175 -- 4.120 3.525 3.740 TA = +85C Min. -- 0.5 3.835 3.190 3.620 Max. 175 -- 4.120 3.525 3.740 Unit A A V V V Condition -- -- VE = 5.0V VE = 5.0V VE = 5.0V
NOTE: 1. VIH, VIL and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = +5.0V.
AC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V 5%
TA = 0C Symbol tPLH tPHL tskpp tskew++ tskew- - tPLH tPHL tPLH tPHL tr tf fMAX -- -- tS tH Parameter Propagation Delay D to Output Part-to-Part Skew(1,4) Within-Device Within-Device Skew(2,4) Skew(3,4) Min. 5.0 -- -- -- 4.9 5.0 -- -- 135 1.5 1.25 Max. 6.0 1.0 0.5 0.5 6.9 7.0 1.7 1.6 -- -- -- TA = +25C Min. 4.8 -- -- -- 4.9 4.9 -- -- 135 1.5 1.25 Max. 5.8 1.0 0.5 0.5 6.9 6.9 1.7 1.6 -- -- -- TA = +85C Min. 5.3 -- -- -- 5.0 5.0 -- -- 135 1.5 1.25 Max. 6.3 1.0 0.5 0.5 7.0 7.0 1.7 1.6 -- -- -- Unit ns ns ns ns ns ns ns MHz ns ns ns ns Condition CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF -- -- -- --
Propagation Delay LEN to Output Propagation Delay EN to Output Output Rise/Fall Time 0.8V to 2.0V Maximum Input Frequency(5,6) Pulse Width Recovery Time Set-up Time Hold Time
0.5 (typ.) 0.5 (typ.)
0.5 (typ.) 0.5 (typ.)
0.5 (typ.) 0.5 (typ.)
NOTES: 1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common power supply voltage. 2. Within-Device Skew considering HIGH-to-HIGH transitions at common power supply voltage.
3. Within-Device Skew considering LOW-to-LOW transitions at common power supply voltage. 4. All skew parameters are guaranteed but not tested. 5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing. 6. The fMAX value is specified as the minimum guaranteed maximum frequency. Actual operational maximum frequency may be greater.
3
Micrel
ClockWorksTM SY10H641 SY100H641
TTL SWITCHING CIRCUIT
Use 0.1F capacitors for decoupling. VEE VCC & V CCO
PECL 50 Coax Pulse Generator In Device Under Test Out
TTL
450
50 Coax
50 Coax
Use oscilloscope internal 50 load for termination
CH A Oscilloscope
CH B
ECL/TTL PROPAGATION DELAY -- SINGLE ENDED
50% VIN Tpd++ 1.5V VOUT Tpd- -
ECL/TTL WAVEFORMS: RISE AND FALL TIMES
2.0V VOUT Trise Tfall 0.8V
PRODUCT ORDERING CODE LOGIC DIAGRAM
Ordering Code SY10H641JC SY10H641JCTR SY100H641JC SY100H641JCTR Package Type J28-1 J28-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial Commercial
4
Micrel
ClockWorksTM SY10H641 SY100H641
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
FAX
+ 1 (408) 980-9191
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated
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