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LMU18
DEVICES INCORPORATED
16 x 16-bit Parallel Multiplier
LMU18
DEVICES INCORPORATED
16 x 16-bit Parallel Multiplier
DESCRIPTION
The LMU18 is a high-speed, low power 16-bit parallel multiplier. The LMU18 is an 84-pin device which provides simultaneous access to all outputs. The LMU18 produces the 32-bit product of two 16-bit numbers. Data present at the A inputs, along with the TCA control bit, is loaded into the A register on the rising edge of CLK. B data and the TCB control bit are similarly loaded. Loading of the A and B registers is controlled by the ENA and ENB controls. When HIGH, these controls prevent application of the clock to the respective register. The TCA and TCB controls specify the operands as two's complement when HIGH, or unsigned magnitude when LOW. RND is loaded on the rising edge of CLK, providing either ENA or ENB are LOW. RND, when HIGH, adds `1' to the most significant bit position of the least significant half of the product. Subsequent truncation of the 16 least significant bits produces a result correctly rounded to 16-bit precision. At the output, the Right Shift control (RS) selects either of two output formats. RS LOW produces a 31-bit product with a copy of the sign bit inserted in the MSB postion of the least significant half. RS HIGH gives a full 32-bit product. Two 16-bit output registers are provided to hold the most and least significant halves of the result (MSP and LSP) as defined by RS. These registers are loaded on the rising edge of CLK, subject to the ENR control. When ENR is HIGH, clocking of the result registers is prevented. For asynchronous output these registers may be made transparent by setting the feed through control (FT) HIGH and ENR LOW. The two halves of the product may be routed to a single 16-bit three-state output port (MSP) via a multiplexer. MSPSEL LOW causes the MSP outputs to be driven by the most significant half of the result. MSPSEL HIGH routes the least significant half of the result to the MSP pins. The MSB of the result is available in both true and complemented form to aid implementation of higher precision multipliers.
FEATURES
u 35 ns Worst-Case Multiply Time u Low Power CMOS Technology u Full 32-bit Output Port -- No Multiplexing Required u Two's Complement, Unsigned, or Mixed Operands u Three-State Outputs u 84-pin PLCC, J-Lead
LMU18 BLOCK DIAGRAM
TCA CLK ENA ENB A15-0 16 A REGISTER TCB B15-0 16 B REGISTER
RND
REGISTER
32 RS FORMAT ADJUST
16 FT ENR RESULT
16
REGISTER
MSPSEL
OEM 16 R31 R31-16 16 R15-0
OEL
Multipliers
1
08/16/2000-LDS.18-O
LMU18
DEVICES INCORPORATED
16 x 16-bit Parallel Multiplier
FIGURE 1A.
INPUT FORMATS
AIN BIN Fractional Two's Complement (TCA, TCB = 1) 15 14 13 -20 2-1 2-2
(Sign)
210 2-13 2-14 2-15
15 14 13 -20 2-1 2-2
(Sign)
210 2-13 2-14 2-15
Integer Two's Complement (TCA, TCB = 1) 15 14 13 -215 214 213
(Sign)
210 22 21 20
15 14 13 -215 214 213
(Sign)
210 22 21 20
Unsigned Fractional (TCA, TCB = 0) 15 14 13 2-1 2-2 2-3 210 2-14 2-15 2-16 15 14 13 2-1 2-2 2-3 210 2-14 2-15 2-16
Unsigned Integer (TCA, TCB = 0) 15 14 13 215 214 213 210 22 21 20 15 14 13 215 214 213 210 22 21 20
FIGURE 1B.
OUTPUT FORMATS
MSP Fractional Two's Complement (RS = 0) 31 30 29 -20 2-1 2-2
(Sign)
LSP
18 17 16 2-13 2-14 2-15
15 14 13 -20 2-16 2-17
(Sign)
210 2-28 2-29 2-30
Fractional Two's Complement (RS = 1) 31 30 29 -21 20 2-1
(Sign)
18 17 16 2-12 2-13 2-14
15 14 13 2-15 2-16 2-17
210 2-28 2-29 2-30
Integer Two's Complement (RS = 1) 31 30 29 -231 230 229
(Sign)
18 17 16 218 217 216
15 14 13 215 214 213
210 22 21 20
Unsigned Fractional (RS = 1) 31 30 29 2-1 2-2 2-3 18 17 16 2-14 2-15 2-16 15 14 13 2-17 2-18 2-19 210 2-30 2-31 2-32
Unsigned Integer (RS = 1) 31 30 29 231 230 229 18 17 16 218 217 216 15 14 13 215 214 213 210 22 21 20
Multipliers
2
08/16/2000-LDS.18-O
LMU18
DEVICES INCORPORATED
16 x 16-bit Parallel Multiplier
MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8)
Storage temperature ........................................................................................................... -65C to +150C Operating ambient temperature ........................................................................................... -55C to +125C VCC supply voltage with respect to ground ............................................................................ -0.5 V to +7.0 V Input signal with respect to ground ........................................................................................ -3.0 V to +7.0 V Signal applied to high impedance output ............................................................................... -3.0 V to +7.0 V Output current into low outputs ............................................................................................................. 25 mA Latchup current ............................................................................................................................... > 400 mA
OPERATING CONDITIONS To meet specified electrical and switching characteristics
Mode Active Operation, Commercial Active Operation, Military Temperature Range (Ambient) 0C to +70C -55C to +125C Supply Voltage 4.75 V VCC 5.25 V 4.50 V VCC 5.50 V
ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4)
Symbol VOH VOL VIH VIL IIX IOZ ICC1 ICC2 Parameter Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Current Output Leakage Current VCC Current, Dynamic VCC Current, Quiescent
(Note 3)
Test Condition VCC = Min., IOH = -2.0 mA VCC = Min., IOL = 8.0 mA
Min 2.4
Typ
Max
Unit V
0.5 2.0 0.0 VCC 0.8 20 20 25 45 1.5
V V V A A mA mA
Ground VIN VCC (Note 12) Ground VOUT VCC (Note 12)
(Notes 5, 6) (Note 7)
Multipliers
3
08/16/2000-LDS.18-O
432109876543210987654321 432109876543210987654321 432109876543210987654321
*DISCONTINUED SPEED GRADE
tDIS tENA tSEL tD tH tS tPW tMUC tMC Symbol tDIS tENA tSEL tD tH tS tPW tMUC tMC Symbol
R31-0
321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321
Min 15 20 5
DEVICES INCORPORATED
COMMERCIAL OPERATING RANGE (0C to +70C) Notes 9, 10 (ns)
SWITCHING CHARACTERISTICS
16 x 16-bit Parallel Multiplier
LMU18-
210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 10987654321 210987654321 210987654321 2
Min 11 9 1
21098765432 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 1 210987654321
Min 15 15 5
SWITCHING WAVEFORMS
MILITARY OPERATING RANGE (-55C to +125C) Notes 9, 10 (ns)
Parameter
Parameter
Three-State Output Disable Delay (Note 11)
Three-State Output Enable Delay (Note 11)
Output Select Delay
Output Delay
Input Hold Time
Input Setup Time
Clock Pulse Width
Unclocked Multiply Time
Clocked Multiply Time
Three-State Output Disable Delay (Note 11)
Three-State Output Enable Delay (Note 11)
Output Select Delay
Output Delay
Input Hold Time
Input Setup Time
Clock Pulse Width
Unclocked Multiply Time
Clocked Multiply Time
ENA, ENB
MSPSEL
CLOCK
INPUT
OEM OEL
ENR
tS
tH
tDIS
tPW
HIGH IMPEDANCE
tMC
4
tPW tMUC tENA tS
75*
65*
Max
Max
25
24
30
35
75
95
24
25
25
30
65
85
tH
tPW
Min
Min
15
15
15
15
5
5
tSEL
tD
55*
45
Max
Max
LMU18-
20
20
20
20
30
35
25
30
55
45
85
65
Min
Min
12
15
12
15
5
5
45*
35
Max
Max
20
20
20
20
30
33
25
28
45
35
65
55
Multipliers
12 10 2
08/16/2000-LDS.18-O
LMU18
25*
20*
Max
20
20 18
18
20 20
18
18
25 20
38
30
LMU18
DEVICES INCORPORATED
16 x 16-bit Parallel Multiplier
NOTES
9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except tDIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max 2. The products described by this spec- respectively. Alternatively, a diode ification include internal circuitry de- bridge with upper and lower current signed to protect the chip from damagsources of IOH and IOL respectively, ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF less, conventional precautions should minimum, and may be distributed. be observed during storage, handling, and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current stress values. pulses and fast turn-on/turn-off times. As a result, care must be exercised in the 3. This device provides hard clamping of testing of this device. The following transient undershoot and overshoot. In- measures are recommended: put levels below ground or above VCC will be clamped beginning at -0.6 V and a. A 0.1 F ceramic capacitor should be VCC + 0.6 V. The device can withstand installed between VCC and Ground indefinite operation with inputs in the leads as close to the Device Under Test range of -0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors tion will not be adversely affected, how- should be installed between device VCC ever, input current levels will be well in and the tester common, and device ground and tester common. excess of 100 mA. 4. Actual test conditions may vary from b. Ground and VCC supply planes those designated but operation is guar- must be brought directly to the DUT anteed as specified. socket or contactor fingers. 5. Supply current for a given applica- c. Input voltages should be adjusted to tion can be accurately approximated by: compensate for inductive ground and VCC noise to maintain required DUT input NCV2 F levels relative to the DUT ground pin. 4 where 10. Each parameter is shown as a minimum or maximum value. Input requirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that ery cycle and no load, at a 5 MHz clock much time to meet the worst-case requirements of all parts. Responses from rate. the internal circuitry are specified from 7. Tested with all inputs within 0.1 V of the point of view of the device. Output VCC or Ground, no load. delay, for example, is specified as a 8. These parameters are guaranteed maximum since worst-case operation of any device always provides data within but not 100% tested. that time. N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 11. For the tENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the 200mV level from the measured steady-state output voltage with 10mA loads. The balancing voltage, VTH, is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current.
FIGURE A. OUTPUT LOADING CIRCUIT
DUT
S1 IOL CL IOH VTH
FIGURE B. THRESHOLD LEVELS
tENA OE
Z 0
1.5 V 1.5 V 1.5 V
tDIS
3.5V Vth VOL*
0.2 V
0 1
Z Z
1.5 V
VOH*
0.2 V
Z
1
0V Vth VOL* Measured VOL with IOH = -10mA and IOL = 10mA VOH* Measured VOH with IOH = -10mA and IOL = 10mA
Multipliers
5
08/16/2000-LDS.18-O
LMU18
DEVICES INCORPORATED
16 x 16-bit Parallel Multiplier
ORDERING INFORMATION
84-pin
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
B10 B11 B12 B13 B14 B15 ENB CLK OEL GND VCC R0 R1 R2 R3 R4 R5 R6 R7 R8 R9
11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 12 74 13 73 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 72 71 70 69 68 67 66
Top View
65 64 63 62 61 60 59 58 57 56
55 32 54 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
A11 A12 A13 A14 A15 ENA RND TCA TCB VCC GND GND MSPSEL FT RS OEM ENR R31 R31 R30 R29
Speed
0C to +70C -- COMMERCIAL SCREENING
45 ns 35 ns LMU18JC45 LMU18JC35
R10 R11 R12 R13 R14 R15 VCC GND R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28
Plastic J-Lead Chip Carrier (J3)
Multipliers
6
08/16/2000-LDS.18-O
121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 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1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 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1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
DEVICES INCORPORATED
Speed
-55C to +125C -- MIL-STD-883 COMPLIANT
-55C to +125C -- COMMERCIAL SCREENING
0C to +70C -- COMMERCIAL SCREENING
ORDERING INFORMATION
84-pin
G
H
D
C
K
E
B
A
F
L
J
OEL CLK GND
B15
B13
B12
R0
R9
R7
R6
R4
R1
B9
1
ENB VCC
R12
R10
B14
B11
B10
R2
R8
R5
B7
2
R13
R11
R3
B8
B6
3
Ceramic Pin Grid Array (G3)
Discontinued Package
R15
R14 GND VCC
B5
B4
4
(i.e., Component Side Pinout)
R16
R17
B0
B2
B1
7
5
Through Package
Top View
R19
R18
A0
A1
B3
6
R20
R21
R22
A4
A3
A2
7
R23
R24
A6
A5
8
16 x 16-bit Parallel Multiplier
GND GND RND
VCC TCA TCB
R27
R25
RS
A9
A7
9
ENR OEM
R30
R26
R29
A15
A12
A10
FT MSPSEL
10
A8
ENA
R31
R28
R31
A14
A13
A11
11
Multipliers LMU18
08/16/2000-LDS.18-O

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