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HC5503
March 1999 File Number 4344.3
Low Cost 24V SLIC For PABX/Key Systems
The Intersil HC5503 low cost SLIC is optimized for use in small Analog or mixed Analog and Digital Key Telephone Systems (KTS) or PBX products. The low component count solution and surface mount package options, enable a small desktop Key System/PBX product to be achieved. The internal power dissipation of the end product is minimized by the low power consumption and minimal power supply voltage requirements of the HC5503. The HC5503 integrated solution provides higher quality, higher reliability and better performance solution than a transformer, thick film hybrid or discrete analog subscriber interface design. The HC5503 is designed in a Dielectrically isolated bipolar technology and is inherently latch proof and does not require hot plug or power supply sequencing precautions.
Description
* Wide Operating Battery Range (-21V to -44V) * Single Additional +5V Supply * 25mA Short Loop Current Limit * Ring Relay Driver * Switch Hook and Ring Trip Detect * Low On-Hook Power Consumption * On-Hook Transmission * ITU-T Longitudinal Balance Performance * Loop Power Denial Function * Thermal Protection * Supports Tip, Ring or Balanced Ringing Schemes * Low Profile SO and PLCC Surface Mount Packaging * Pin Compatible with Industry Standard HC5504B SLIC
Ordering Information
PART NUMBER HC5503CM HC5503CB TEMP. RANGE (oC) 0 to 75 0 to 75 PACKAGE 28 Ld PLCC 24 Ld SOIC PKG. NO. N28.45 M24.3
Applications
* Analog Subscriber Line Interfaces in Analog Key Systems and Digital ISDN PABX Systems * Related Literature - AN571, Using Ring Sync with HC-5502A and HC-5504 SLICs
Block Diagram
RD RING RELAY DRIVER 4-WIRE INTERFACE VF SIGNAL PATH
TX RX
RFS C2
RING TRIP DETECTOR
TIP TF RING RF THERMAL LIMIT VBAT VCC AGND BGND DGND BIAS
2-WIRE INTERFACE
LOOP CURRENT DETECTOR LOGIC INTERFACE
SHD RS RC PD
C1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HC5503
Absolute Maximum Ratings (Note 1)
Maximum Continuous Supply Voltages (VBAT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -60 to 0.5V (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 15V (VCC - VBAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75V Relay Drive Voltage (VRD) . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 15V
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) 24 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 28 Lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (PLCC and SOIC - Lead Tips Only)
Operating Conditions
Operating Temperature Range HC5503 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC Relay Driver Voltage (VRD) . . . . . . . . . . . . . . . . . . . . . . . . 5V to 12V Positive Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . 4.75V to 5.25V Negative Supply Voltage (VBAT) . . . . . . . . . . . . . . . . . .-22V to -26V High Level Logic Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V Low Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V
Die Characteristics
Transistor Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 x 102 Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER On Hook Power Dissipation Off Hook Power Dissipation Off Hook IVCC Off Hook IVCC Off Hook IBAT Off Hook Loop Current Off Hook Loop Current Off Hook Loop Current Fault Currents TIP to Ground RING to Ground TIP to RING TIP and RING to Ground Ring Relay Drive VOL Ring Relay Driver Off Leakage Ring Trip Detection Period
Unless Otherwise Specified, VBAT = -24V, VCC = 5V, AG = BG = DG = 0V, Typical Parameters TA = 25oC. Min-Max Parameters are Over Operating Temperature Range CONDITIONS ILONG = 0 (Note 3), VCC = 5V RL = 600, ILONG = 0 (Note 4), VCC = 5V RL = 600, ILONG = 0 (Note 3), TA = 0oC RL = 600, ILONG = 0 (Note 3), TA = 25oC RL = 600, ILONG = 0 (Notes 3, 4) RL = 400, ILONG = 0 (Note 3) RL = 400, VBAT = -21.6V, ILONG = 0 (Note 3) TA = 25oC RL = 200, ILONG = 0 (Note 3) (Note 4) MIN 17.5 TYP 80 180 19 22.9 25 MAX 100 200 6.0 4.0 23 30 UNITS mW mW mA mA mA mA mA mA
-
27.5 70 30 140 0.2 2 2 90 10
0.5 25 3 10.5 0.5 20
mA mA mA mA V A Ring Cycles mA mA ms k
(Note 4)
-
IOL = 62mA VRD = 12V, RC = 1 = HIGH, TA = 25oC RL = 600, (Note 5)
5
Switch Hook Detection Threshold Loop Current During Power Denial Dial Pulse Distortion Receive Input Impedance Transmit Output Impedance RL = 200 (Note 4) (Note 5) (Note 5)
0 -
2
HC5503
Electrical Specifications
PARAMETER 2-Wire Return Loss SRL LO ERL SRL HI Longitudinal Balance 2-Wire Off Hook 2-Wire On Hook 4-Wire Off Hook at 1kHz Insertion Loss 2-Wire to 4-Wire at 3.4kHz VTR to VO VO is the Output of the Transhybrid Amplifier 4-Wire to 2-Wire at 300Hz Frequency Response Idle Channel Noise 2-Wire to 4-Wire Idle Channel Noise 4-Wire to 2-Wire Absolute Delay 2-Wire to 4-Wire, 4-Wire to 2-Wire Trans Hybrid Loss Overload Level 2-Wire to 4-Wire (On-hook) 4-Wire to 2-Wire (Off-hook, RL = 600) Level Linearity 2-Wire to 4-Wire, 4-Wire to 2-Wire At 1kHz, (Note 4) Referenced to 0dBm Level +3 to -40dBm -40 to -50dBm -50 to -55dBm Power Supply Rejection Ratio VCC to 2-Wire VCC to Transmit VBAT to 2-Wire VBAT to Transmit VCC to 2-Wire VCC to Transmit VBAT to 2-Wire VBAT to Transmit Logic Input Current (RS, RC, PD) 0V VIN 2.4V 200 - 16kHz, RL = 200 (Note 4) 30 - 60Hz, RL = 200 0.05 0.1 0.3 dB dB dB Balance Network Set Up for 600 Termination at 1kHz VCC = +5V 2.5 3.1 VPEAK VPEAK (Note 4) 200 - 3400Hz Referenced to Absolute Loss at 1kHz and 0dBm Signal Level (Note 4) 0dBm Input Level, Referenced 600 1VRMS 200Hz - 3400Hz, (Note 4) IEEE Method 0oC TA 75oC Unless Otherwise Specified, VBAT = -24V, VCC = 5V, AG = BG = DG = 0V, Typical Parameters TA = 25oC. Min-Max Parameters are Over Operating Temperature Range (Continued) CONDITIONS Referenced to 600 +2.16F (Note 4) 15.5 24 31 dB dB dB MIN TYP MAX UNITS
53 53 50
58 58 58
-
dB dB dB
-3.8 (Note 5) 30
0.05 -4.0 0.02 1 -89 1 -89
0.2 -4.2 0.05 5 -85 5 -85
dB dB dB dBrnC dBm0p dBrnC dBm0p s dB
40
2 -
35 35 20 20 35 35 35 35 -
-
20
dB dB dB dB dB dB dB dB A
3
HC5503
Electrical Specifications
PARAMETER Logic Inputs Logic `0' VIL Logic `1' VIH SHD Output Logic `0' VOL Logic `1' VOH ILOAD 800A, VCC = 5V ILOAD 40A, VCC = 5V 2.7 0.1 0.4 5.0 V V 2.0 0.8 5.5 V V Unless Otherwise Specified, VBAT = -24V, VCC = 5V, AG = BG = DG = 0V, Typical Parameters TA = 25oC. Min-Max Parameters are Over Operating Temperature Range (Continued) CONDITIONS MIN TYP MAX UNITS
NOTES: 3. ILONG = Longitudinal Current. 4. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification compliance. 5. Guaranteed by design, not tested.
4
HC5503 Design Information
Line Feed Amplifiers
The line feed amplifiers are high power operational amplifiers and are connected to the subscriber loop through 150 of feed resistance as shown in Figure 1. The feed resistors and synthesized impedance via feedback provide a 600 balanced load for the 2-wire to 4-wire transmission. The tip feed amplifier is configured as a unity gain noninverting buffer. A -4V bias (derived from the negative battery (VBAT) in the bias network) is applied to the input of the amplifier. Hence, the tip feed DC level is at -4V. The principal reason for this offset is to accommodate sourcing and sinking of longitudinal noise currents up to 15mARMS without saturating the amplifier output and to provide sufficient overhead for receive signals. The tip feed amplifier also feeds the ring feed amplifier, which is configured as a unity gain inverting amplifier as seen from the tip feed amplifier. The noninverting input to the ring feed amp is biased at a VBAT/2. Looking into this terminal the amplifier has a noninverting gain of 2. Thus, the DC output at ring feed is: VRF(DC) = (4 + VBAT) Volts For a -24V battery, VRF = -20V. Hence, the nominal battery feed across the loop provided by the SLIC is 16V. When the subscriber goes off-hook this DC feed causes current (metallic current) to flow around the loop.
Va + IL TIP RB1 TIP FEED 150
The received audio signal RX is fed into the tip feed amplifier and appears at the tip feed terminal. It is also fed through the ring feed amplifier and is inverted. Thus, a differential signal of 2VRX appears between tip feed and ring feed. The RX signal causes AC audio currents to flow around the loop which are then AC coupled to the earpiece of the telephone set.
2-Wire Impedance Matching
The HC5503 is optimized for operation with a -24V battery. Impedance matching to a 600 load, is achieved through the combination of the feed resistors (RB1, RB2) and negative feedback through resistor R2 (reference Figure 1). RB1 and RB2 are sense resistors that detect loop current and provide negative feedback to synthesize the remaining 300 required to match a 600 line. The impedance looking into the tip terminal is 150 (RB1) plus the synthesized impedance of the tip amplifier. The synthesized tip impedance is equal to the tip feed voltage Va divided by IL. (Note, the tip feed amplifier is a voltage follower. Thus, the tip feed voltage is equal to the receive input voltage VRX , both are labeled Va.) The synthesized impedance of the ring terminal is calculated the same way and is the ring feed voltage divided by IL. (Note, the ring feed voltage is equal in magnitude to the tip feed voltage, but opposite in phase as a result of the ring feed amplifier gain.)
TO TRANSHYBRID OP-AMP C3 RX R3 R1 VIN INPUT FROM CODEC
+
-
90k
+ 4VDC
(NOTE) + R2
ZIN RB1 = RB2 = RS = 150
-
+2
-
TX C4 4RSIL +
+
-
+4RSIL
R RING RB2 RING FEED 150 - IL +
R
HC5503
+ +
-
-
VBAT 2 (NOTE)
NOTE: Grounded for AC analysis. FIGURE 1. IMPEDANCE MATCHING CIRCUITRY
5
HC5503
The value of Va, as a result of feedback through R2 from the TX output, is given in Equation 1. Equation 1 is a voltage divider equation between resistors R2 and the parallel combination of resistors; R1, R3 and the internal 90k resistor RINTERNAL. The Voltage on the transmit out (TX) is the sum of the voltage drops across resistors RB1 and RB2 that is gained up by 2 to produce an output voltage at the VTX pin that is equal to -4RSIL.
R 1 90k R 3 V a = ------------------------------------------------ x V TX R 1 90k R 3 + R 2 (EQ. 1)
The voltage that is feed back into the RX pin is equal to the voltage at VTX times the feedback factor (Equation 5).
V a = V TX ( X ) (EQ. 5)
Where VTX is equal to -4RSIL (RS = 150) So:
Va X = -----------------I L 600 (EQ. 6)
Where: VTX = -4RSIL = -600IL. To match a 600 line, the synthesized tip and ring impedance must be equal to 150. The impedance looking into either the tip or ring terminal is once again the voltage at the terminal (Va) divided by the AC current IL as shown in Equation 2.
Va Z Tipfeed = Z Ringfeed = -------- = 150 I L (EQ. 2)
But, from Equation 2:
Va -------- = 150 I L (EQ. 7)
Therefore:
Va 150 1 X = ---------- = --------- = -600 4 V TX (EQ. 8)
Substituting the value of 600IL for VTX in Equation 1 and dividing both sides by IL results in Equation 3.
R 1 90k R 3 Va -------- = ------------------------------------------------ x 600 R 1 90k R 3 + R 2 I L (EQ. 3)
Equation 8 shows that 1/4 of the TX output voltage is required to synthesize 150 at both the Tip feed and Ring feed amplifiers. To match a 900 load would require 300 worth of synthesized impedance (300 from RB1 + RB2 and 600 from the Tip feed + Ring feed amplifiers). Setting Va/IL equal to 300 and solving for R2 in Equation 3, given that R1 = 10k, RINTERNAL = 90k and R3 = 150k the value of R2 to match the input impedance of 900 is determined to be 8.49k (Note: nearest standard value is 8.45k). The feed back factor to match a 900 load is 1/2 (300/600). The selection of the value of 150k for R3 is arbitrary. The only requirement is that it be large enough to have little effect on the parallel combination between RINTERNAL (90k) and R1 (10k). R3 should be greater then 90k. The selection of the value of 10k for R1 is also arbitrary. The only requirement is that the value be small enough to offset any process variations of RINTERNAL and large enough to avoid loading of the CODEC's output. A value of 10k is a good compromise.
Setting Va/IL equal to 150 and solving for R2 , given that R1 = 10k, RINTERNAL = 90k and R3 = 150k the value of R2 to match the input impedance of 600 is determined to be 25.47k. (Note: nearest standard value is 24.9k). The amount of negative feedback is dependent upon the additional synthesized resistance required for matching. The sense resistors RB1 and RB2 should remain at 150 to maintain the SHD threshold listed in the electrical specifications. The additional synthesized resistance is determined by the feed back factor X (Equation 4) which needs to be applied to the transmit output and fed into the RX pin of the HC5503. The feed back factor is equal to the voltage divider between R2 and the parallel combination of R1 , R3 and RINTERNAL , reference Figure 2.
R 1 90k R 3 FeedbackFactor = X = -----------------------------------------------R 1 90k R 3 + R 2 (EQ. 4)
2-Wire to 4-Wire Gain
The 2-wire to 4-wire gain is defined as the output voltage VTX divided by the tip to ring voltage (VTR). Where: VTX = -4RSIL = -600IL and VTR = (RL)IL = 600IL. The 2-wire to 4-wire gain is therefore equal to -1.0, as shown in Equation 9.
FEED BACK
HC5503
RX R2 24.9k TX TX = -4RSIL R3 150k R1 10k RINTERNAL 90.0k
V TX - 600 I L A 2 - 4 = ---------- = --------------------- = - 1.0 V TR 600I L
(EQ. 9)
FIGURE 2. FEEDBACK EQUIVALENT CIRCUIT
6
HC5503
4-Wire to 2-Wire Gain
The 4-wire to 2-wire gain is defined as the output voltage VTR divided by the input voltage, VIN . To determine the 4-wire to 2-wire gain we need to define VTR in terms of VIN . The voltage at VTR is the loop current times the load impedance ZL .
V TR = I L x Z L = I L x Z O (EQ. 10) V RX = V TF = ( 0.25 )V TX + ( 0.633 )V IN
VRX for the recommended values of R1 and R2 is given in Equations 15 and 16. For impedance matching to a load other than 600, recalculate the parallel impedances R1 , R2 and substitute into Equation 15. The 4-wire to 2-wire gain is recalculated by using the Equations below.
8.49k 17.25k V RX = V TF = ---------------------------------------------- V TX + -------------------------------------------- V IN 8.49k + 24.9k 17.25k + 10k (EQ. 15) (EQ. 16)
For optimum 2-wire return loss, the input impedance of the SLIC (ZO) must equal the load impedance (ZL) of the line. All Equations going further assume ZL= ZO . The loop current IL is the total voltage across the loop divided by the total resistance of the loop. The total voltage across the loop is the sum of the tip feed voltage (VTF) and the ring feed voltage (VRF) where VTF = -VRF. The total resistance is the sum of the sense resistors RB1 and RB2 and the load ZL (ZL +2RS). The total loop current is defined in Equation 11.
2 ( V TF ) V TF - V RF I L = --------------------------- = ------------------------Z O + 2R S Z O + 2R S (EQ. 11)
Substituting Equation 16 into Equation 13:
2 ( ( 0.25 )V TX + ( 0.633 )V IN ) V TR = ------------------------------------------------------------------------ Z O Z O + 2R S (EQ. 17)
From Equation 10:
V TR I L = ---------ZO (EQ. 18)
From Equation 1:
V TX = - 4RSI L (EQ. 19)
From Equation 10:
V TR I L = ---------ZO
Substituting Equation 18 into Equation 19:
(EQ. 12) V TR V TX = - 4RS ---------ZO (EQ. 20)
Substituting Equation 12 into Equation 11 and solving for VTR :
2 ( V TF ) V TR = ------------------------- Z O Z O + 2R S (EQ. 13)
Substituting Equation 20 into Equation 17:
V TR ZO V TR = - 2RS ---------- + 1.266V IN ------------------------ZO Z O + 2R S (EQ. 21)
Using Superposition, the voltage at the receive input RX is given as:
R 1 R 2 V RX = V TF = ---------------------- V TX + ---------------------- V IN R 1 + R 2 R 2 + R 1 (EQ. 14)
Assuming RS = 150 and rearranging terms:
1.266Z O 300 1 + ----------------------- V - TR = ----------------------- V IN Z O + 300 Z O + 300 (EQ. 22)
The 4-wire to 2-wire gain (Given that: R1 = 10k, R2 = 24.9k and R3 = 150k) for a 600 load is:
V TR 1.266Z O A 4 - 2 = ---------- = ----------------------- = 0.633 = - 3.96dB V IN Z O + 600 (EQ. 23)
Where R1 is the effective impedance that is formed by the parallel combination of RINTERNAL (90k), R3 (150k), R1 (10k) and is equal to 8.49k. R2 is the effective impedance that's formed by the parallel combination of RINTERNAL (90k), R3 (150k), R2 (24.9k) and is equal to 17.25k.
7
HC5503 The Transversal Amplifier (TA)
Whereas the feed amplifiers perform the 4-wire to 2-wire transmission function, the transversal amplifier acts as the 2-wire to 4-wire hybrid. The TA is a summing amplifier configured to reject common mode signals. It will reject 2wire common mode signals. RB1 and RB2 act as loop current sense resistors. The voice signal output of the amplifier is a function of the differential voltages appearing across RB1 and RB2 . The transversal amplifier also has a DC output proportional to the metallic current in the loop. The output voltage is given by: VTX = 2(ITIP + IRING) (RB1 + RB2) This DC level is used as an input to a comparator whose output feeds into the logic circuitry as SH. This signal is used to gate SHD output. Voice signals on the loop are transformed by the TA into ground referenced signals. Since the TA output has a DC offset it is necessary to AC couple the output to any external circuitry. Note, that during 4-wire to 2-wire transmission, the transversal amplifier will have an audio signal at its output proportional to the 4-wire audio receive signal and the loop's equivalent AC impedance. This is called the transhybrid return, and must be cancelled (or balanced) out to prevent an echo effect. Reference the Transhybrid Circuit section for more information.
VRF RING FEED C1 VB /2 + VRING VTF TRANSVERSAL AMP RB1 RB2 VTIP VRF R19 1.8K + AVCL = 2 R18 90K KVTX + VB5 IGM > 0, FOR KVTX < VB5 -4V VTX = -600 ILOOP VTX
-
-
-
R21 90K
FIGURE 3. DC LOOP CURRENT CHARACTERISTICS
Loop Current Limiting
The maximum loop length for this application is a 533 load across the feed amplifiers (24VSUPPLY - 8VOVERHEAD)/ 30mAMAX loop current). However, on a short loop the line resistance often approaches zero. Thus, a need exists to control the maximum DC loop current that can flow around the loop to prevent an excessive current drain from the system battery. This limit is internally set to 30mA on the HC5503. Figure 3 depicts the feedback network that modifies the VRF voltage as a function of metallic current. Figure 4 illustrates the loop current characteristics as a function of line resistance. As indicated above, the TA has a DC voltage output directly proportional to the loop current. This voltage level is scaled by R19 and R18 . The scaled level forms the `Metallic' input to one side of a Transconductance Amplifier.
The reference input to this amplifier is generated in the bias network, and is equivalent to 30mA. When the metallic input exceeds the set reference level, the transconductance amplifier sources current. This current will charge C1 in positive direction causing the VRF (Ring Feed) voltage to approach the VTF (Tip Feed), effectively reducing the battery feed across the loop which will limit the DC loop current. C1 will continue to charge until an equilibrium level is attained at ILOOP = ILOOPmA (Max). The time constant of this feedback loop is set by R21 (90k) and C1 which is nominally 0.33F. The VRF voltage level is also modified to reduce or control loop current during ring line faults (e.g., ground or power line crosses), and thermal overload. Figure 8 illustrates this. The thermal and fault current circuitry works in parallel with the transconductance amplifier.
Longitudinal Amplifier
The longitudinal amplifier is an operational amplifier configured as a closed loop differential amplifier with a nominal gain of 0.1. The output is a measure of any imbalance between ITIP and IRING . The transfer function of this amplifier is given by: VLONG = 0.1(ITIP - IRING) 150. The gain factor is much less than one since ring voltage (up to 150VPEAK) can appear at the Ring or Ring Feed Sense terminals and are attenuated to avoid exceeding the common mode range of the longitudinal amplifier's input.
8
HC5503
filter (R20 , C2) the RS pulse will occur at the most negative point of the attenuated ring signal that is fed into the ring trip detector. Hence, when DC conditions are established for SHD, the AC component actually assists ring trip taking place. For a ring side injected ring system, the RS pulse should occur at the positive zero crossing of the ring signal as it appears at RFS. If ring synchronization is not used, then the RS pin should be held permanently to a logic high of 5V nominally: ring trip will occur asynchronously with respect to the ring voltage. Ring trip is guaranteed to take place within three ring cycles after the telephone going off-hook. It is recommended that an RC snubber network is placed across the ring relay contacts to minimize inductive kickback effects from the telephone ringer. Typical values for such a network are shown in Figure 10.
150V VRING 150VPEAK, MAX
30
HC5503 ILOOP SATURATION
ILOOP (mA)
20
RLOOP = RB1 + RB2 + ZTF + ZRF + RLINE + RSET 10 0 533 RLOOP ()
FIGURE 4. DC LOOP CURRENT CHARACTERISTICS
The longitudinal amplifier's principal functions is Ring Trip Detection. The output of the amplifier after being filtered by R20 and C2 to attenuate AC signals is fed into a detector whose output inhibits the ring relay driver to remove ringing signals from the line in an off-hook condition, reference Figure 8.
Ringing The Line
The Ring Command (RC) input is taken low during ringing. This activates the ring relay driver (RD) output providing the telephone is not off-hook or the line is not in a power denial state. The ring relay connects the ring generator to the subscriber loop. The ring generator output is usually an 80VRMS , 20Hz signal. The ring signal should not exceed 150V peak. Since the telephone ringer is AC coupled only ring current will flow. This ringing current flows directly into VBAT via a set of relay contacts. The high impedance terminal RFS is provided so that the low impedance VRF node can be isolated from the hot end of the ring path in the battery referenced ring scheme. The AC ring current flowing in the subscriber circuit will be sensed across RB2 , and will give rise to an AC voltage at the output of the longitudinal amplifier. R20 and C2 attenuate this signal before it reaches the ring trip detector to prevent false ring trip. C2 is nominally set at 1.0F. When the subscriber goes off-hook, a DC path is established between the output of the ring generator and the battery ground or VBAT terminal. A DC longitudinal imbalance is established since no tip feed current is flowing through the tip feed resistors. The longitudinal amplifier output is driven negative. Once it exceeds the ring trip threshold of the ring trip detector, the logic circuitry is driven by GK to trip the ring relay establishing an off-hook condition such that SHD will become active as loop metallic current starts to flow. In addition to its ability to be used for tip or ring injected systems, the HC5503 can also be configured for systems utilizing balanced ringing. The main advantage of balanced ringing is that it tends to minimize cross coupling effects owing to the differential nature of the ring tone across the line. Figure 5 illustrates the sequence of events during ring trip with ring synchronization for a tip injected ring system. Note that owing to the 90 degree phase shift introduced by the low pass
5V RS 0V >50s
VC4 0V C2 CHARGES TO 0V QUESCENT VALUE
RING TRIP THRESHOLD
SUBSCRIBER GOES OFF-HOOK
RING RELAY DC SHIFT OWING TO HAS TRIPPED DC CURRENT DIFFERENCE BETWEEN ITIP AND IRING
FIGURE 5. RING TIP SEQUENCE
Transhybrid Circuit
The purpose of the transhybrid circuit is to remove the receive signal (RX) from the transmit signal (TX), thereby preventing an echo on the transmit side. This is accomplished by using an external op amp (usually part of the CODEC) and by the inversion of the signal from the 4-wire receive port (RX) to the 4-wire transmit port (TX). Figure 6 shows the transhybrid circuit. Because the voltage at RX is 180 degrees out of phase with the voltage at TX , the input signal will be subtracted from the output signal if I1 equals I2 . Node analysis yields the following Equation:
TX RX I 1 + I 2 = ------ + ------- = 0 R4 R3 (EQ. 24)
The voltage at TX is the product of the 4-wire to 2-wire (A4-2 = 0.633) and 2-wire to 4-wire (A2-4 = -1.0) voltage gains, and is therefore equal to 0.633. The voltage at RX , when taking into account the negative feedback through R2 ,
9
HC5503
is the calculated value of 0.633 plus the feedback which is 1/4 TX (for matching to a 600 load, reference Equation 8). The voltage at Rx is calculated in Equation 25.
1 R X = 0.633 - -- ( 0.633 ) = 0.474 4 (EQ. 25)
The Logic Network
The logic network utilizes I2L logic. All external inputs and outputs are LS TTL compatible: the relay driver is an open collector output that can sink 60mA with a VCE of 1V. Figure 9 is a schematic of the combination logic within the network. The external inputs RC (Relay Control) and PD (Power Denial) allow the switch controller to ring the line or deny power to the loop, respectively. The Ring Synchronization input (RS) facilitates switching of the ring relay near a ring current zero crossing in order to minimize inductive kickback from the telephone ringer.
Substituting the values for TX and RX into Equation 24 and setting the them equal to each other, the values of R3 and R4 can then be determined.
0.474 0.633 -------------- = -------------R4 R3 (EQ. 26)
Setting the value of R3 to 150k sets the value of R4 to be 200k. Notice that the input voltage for the incoming signal (I1) is taken at RX , instead of the conventional method at the CODEC (point A, Figure 6). This alternative method is used because the tolerance effects of R1 on the transhybrid balance are eliminated.
R5
Line Fault Protection
The subscriber loop can exist in a very hostile electrical environment. It is often in close proximity to very high voltage power lines, and can be subjected to lightning induced voltage surges. The SLIC has to provide isolation between the subscriber loop and the PBX/Key telephone system. The most stringent line fault condition that the SLIC has to withstand is that of the lightning induced surge. The Intersil monolithic SLIC, in conjunction with a simple low cost diode bridge, can achieve up to 450V of isolation between the loop and switch. The level of isolation is a function of the packaging technology and geometry together with the chip layout geometries. One of the principal reasons for using DI technology for fabricating the SLIC is that it lends itself most readily to manufacturing monolithic circuits for high voltage applications. Figures 10 shows the application circuit for the HC5503. A secondary protection diode bridge is indicated which protects the feed amplifiers during a fault. Most line systems will have primary protection networks. They often take the form of a carbon block or arc discharge device. These limit the fault voltage to less than 450V peak before it reaches the line cards. Thus when a transient high voltage fault has occurred, it will be transmitted as a wave front down the line. The primary protection network must limit the voltage to less than 450V. The attenuated wave front will continue down the line towards the SLIC. The feed amplifier outputs appear to the surge as very low impedance paths to the system battery. Once the surge reaches the feed resistors, fault current will flow into or out of the feed amplifier output stages until the relevant protection diodes switch on. Once the necessary diodes have started to conduct all the fault current will be handled by them. If the user wishes to characterize SLIC devices under simulated high voltage fault conditions on the bench, he should ensure that the negative battery power supply has sufficient current capability to source the negative peak fault current and low series inductance. If this is not the case, then the battery supply could be pulled more negative and destroy the SLIC if the total (VCC + VBAT) voltage across it exceeds 75V.
+ 150k I1 R3 R4 200k I2 R1 + VIN A + V0
-
-
HC5503
RX
R2 TX
-
CODEC/ FILTER
FIGURE 6. TRANSHYBRID CIRCUIT
Power Denial (PD)
Power denial limits power to the subscriber loop: it does not power down the SLIC, i.e., the SLIC will still consume its normal on-hook quiescent power during a power denial period. This function is intended to "isolate" from the battery, under processor control, selected subscriber loops during an overload or similar fault status. If PD is selected, the logic circuitry inhibits RC and switches in a current source to C1 . The capacitor charges up to a nominal -3.5V at which point it is clamped. Since tip feed is always at -4V, the battery feed across the loop is essentially zero, and minimum loop power will be dissipated if the circuit goes offhook. No signalling functions are available during this mode. After power denial is released (PD = 1), it will be several hundred milliseconds (300ms) before the VRF output reaches its nominal battery setting. This is due to the RC time constant of R21 and C1 .
10
HC5503 Pin Descriptions
28 PIN PLCC 2 3 4 5 6 7 9 24 PIN DIP/SOIC 1 2 3 4 5 6 7 SYMBOL TIP RING RFS VCC C1 DG RS DESCRIPTION An analog input connected to the TIP (more positive) side of the subscriber loop. Functions with the Ring terminal to receive voice signals from the telephone and for loop monitoring purposes. An analog input connected to the RING (more negative) side of the subscriber loop. Functions with the Tip terminal to receive voice signals from the telephone and for loop monitoring purposes. Senses ring side of loop for ring trip detection. During ringing, the ring signal is inserted into the line at this node and RF is isolated from RFS via a relay. Positive Voltage Source - Most positive supply. VCC is typically 5V. Capacitor #1 - An external capacitor to be connected between this terminal and analog ground. Required for proper operation of the loop current limiting function, and for filtering VBAT. Typical value is 0.3F, 16V. Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and outputs on the SLIC microcircuit. Ring Synchronization Input - A TTL - compatible clock input. The clock should be arranged such that a positive pulse transition occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This ensures that the ring relay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to 5V. Relay Driver - A low active open collector logic output. When enabled, the external ring relay is energized. Tip Feed - A low impedance analog output connected to the TIP terminal through a 150 feed resistor. Functions with the RF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. Ring Feed - A low impedance analog output connected to the RING terminal through a 150 feed resistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. Negative Voltage Source - Most negative supply. VBAT is typically -24V. Frequently referred to as "battery". Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground terminal. Switch Hook Detection - A low active LS TTL - compatible logic output. This output is enabled for loop currents exceeding 10.5mA and disabled for loop currents less than 5mA. Power Denial - A low active TTL - Compatible logic input. When enabled, the switch hook detect (SHD) is not necessarily valid, and the relay driver (RD) output is disabled. Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output goes low on the next high level of the ring sync (RS) input, as long as the SLIC is not in the power denial state (PD = 0) or the subscriber is not already off-hook (SHD = 0). Receive Input, Four Wire Side - A high impedance analog input which is internally biased. Capacitive coupling to this input is required. AC signals appearing at this input deferentially drive the Tip feed and Ring feed terminals, which in turn drive tip and ring through 150 of feed resistance on each side of the line. Capacitor #2 - An external capacitor to be connected between this terminal and analog ground. This capacitor prevents false ring trip detection from occurring when longitudinal currents are induced onto the subscriber loop from nearby power lines and other noise sources. Recommended value is 1.0F, 20V. This capacitor should be nonpolarized. Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX) and receive input (RX) terminals. Transmit Output, Four Wire Side - A low impedance analog output which represents the differential voltage across Tip and Ring. Transhybrid balancing must be performed beyond this output to completely implement two to four wire conversion. This output is unbalanced and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is essential. Used during production testing. For proper operation of the SLIC, this pin should float. No internal connection.
10 11
8 9
RD TF
12
10
RF
13 14 16 18 19
11 12 13 15 16
VBAT BG SHD PD RC
25
21
RX
26
22
C2
27 28
23 24
AG TX
17 1, 8, 15, 20, 21, 22, 23, 24
14 17, 18, 19, 20
NC NC
NOTE: All grounds (AG, BG, and DG) must be applied before VCC or VBAT. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first.
11
HC5503 Pinouts
HC5503 (SOIC) TOP VIEW
RFS RING
HC5503 (PLCC) TOP VIEW
TIP N/C TX AG 27 C2 26
TIP RING RFS VCC C1 DG RS RD TF
1 2 3 4 5 6 7 8 9
24 TX 23 AG 22 C2 21 RX 20 N/C DG 19 N/C 18 N/C 17 N/C 16 RC 15 PD 14 N/C 13 SHD N/C RS 7 8 9 VCC C1 5 6
4
3
2
1
28
25 RX 24 N/C 23 N/C 22 N/C 21 N/C 20 N/C 19 RC
RD 10 TF 11
RF 10 VBAT 11
BG 12
12 RF
13 VBAT
14 BG
15 N/C
16 SHD
17 N/C
18 PD
Functional Block Diagram
RS RC RD 1/2 RING RELAY TIP + RING CONTROL RING TRIP LOOP MONITORING SHD SWITCH HOOK DETECTION
RING SYNC RING COMMAND
TIP
-
DIFF AMP
TX
150 2-WIRE LOOP SECONDARY PROTECTION BG VBAT RFS 1/2 RING RELAY RING RING RING VOLTAGE VBAT POWER DENIAL PD SLIC MICROCIRCUIT -1 150 RX RF LOOP CURRENT LIMITER LINE DRIVERS TF VBAT BATTERY FEED +1
TRANSMIT OUTPUT
RECEIVE INPUT
FIGURE 7.
12
HC5503 Schematic Diagram
PLCC PIN NUMBERS SHOWN
25 RX
26 C2
13 VBAT
14 BAT GND
27 ANA GND VCC
7 DIG GND
5 VCC
VOLTAGE AND CURRENT BIAS NETWORK
VCC TF 11 VBAT
+ A-400 TIP FEED AMP IB4
R17 VB2 IB1 IB2 IB3 IB4 IB5 IB6 IB7 IB8 VBAT IB9 IB10 IB11
VB1 VB2 VB3 VB4 VB5 5V
R12
RING TRIP DETECTOR 5V VCC GK A-200 LONG'L I / V AMP + VBAT IB7 R5 IB8 R20 + VBAT VB4 GND SHORTS CURRENT LIMITING IB1 NC 17 5V IB10 VCC
R7 TIP 2 RING FEED SENSE 4 R8 R10 R9 VBAT R22 V V R23 CC BAT R11 VCC QD3 QD36
-
+ VCC A-100 TRANSV'L I/V AMP SWITCH HOOK DETECTOR VCC VBAT
+ VB3 STTL AND LOGIC INTERFACE
R3 RING 3 R4 R1 R2 R16 R15 VB2
IB6
VBAT + R6 IB6 QD27 QD28 THERMAL LIMITING
SH
SHD 16
VB1
VBAT/2 REFERENCE R14
RC 19 RFC
R18
RF 12 VBAT IB5 A-300 RING FEED AMP +
R21
LOAD CURRENT LIMITING I B2
R19
VB5
VB5
PD 18
+
VBAT
R13 VBAT
VBAT
C1 6
TX 28
RS 9
RD 10
FIGURE 8. FUNCTIONAL SCHEMATIC
13
HC5503 Schematic Diagram
(Continued) LOGIC GATE SCHEMATIC
GK 1 2
6 4
8
5 7 9 12
SH
16 10
13 11 15 TTL TO STTL TTL TO STTL TTL TO STTL TO R21 C SCHOTTKY LOGIC 14 RELAY DRIVER
A B
C B A
STTL TO TTL
RS
RC
PD
RD
SHD
FIGURE 9. LOGIC NETWORK
Overvoltage Protection and Longitudinal Current Protection
The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses. High voltage surge conditions are as specified in Table 1. The SLIC will withstand longitudinal currents up to a maximum or 10mARMS , 5mARMS per leg, without any performance degradation.
PARAMETER Longitudinal Surge Metallic Surge T/GND R/GND 50/60Hz Current T/GND R/GND
TABLE 1. TEST CONDITION 10s Rise/ 1000s Fall 10s Rise/ 1000s Fall 10s Rise/ 1000s Fall 11 Cycles Limited to 10ARMS PERFORMANCE (MAX) 450 (Plastic) 450 (Plastic) 450 (Plastic) 315 (Plastic) UNITS VPEAK VPEAK VPEAK VRMS
14
HC5503 Application Circuit
SYSTEM CONTROLLER +5V 16 RS1 CS1 D5 K1 10 RD TIP K1A 2 RB1 11 D2 Z1 PRIMARY PROTECTION MUST LIMIT INPUT VOLTAGE TO LESS THAN 450V D4 D1 D3 VBAT -24V 12 K1B CS2 4 RS2 RB2 RING 3 -BAT PTC 13 C5 BGND 14 DGND 7 AGND 27 C6 VCC 5 C2 C1 RING C2 26 RING FEED RING FEED SENSE C1 TIP TIP FEED RX HC5503 U1 (PINOUT FOR PLCC) TX 28 25 C3 R2 C4 R1 VIN SHD 18 PD 9 RS 19 RC R3 R4 CODEC/FILTER U2 R5 (NOTE 6)
VOUT
6
VBAT -24V VBAT -24V
VCC +5V
NOTES: 6. R5 sets the 2-wire to 4-wire gain. R5 = 150k then A2-4 = 0dB. R5 = 75k then A2-4 = -6.0dB. 7. Secondary protection diode bridge recommended is a 2A, 200V type. 8. All grounds (AG, BG, and DG) must be applied before VCC or VBAT. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 9. Application shows Ring Injected Ringing, Balanced or Tip injected configuration may be used. FIGURE 10. -24V APPLICATION CIRCUIT
Typical Component Values:
C1 = 0.33F, 20%, 20V. C2 = 1.0F, 10%, 20V. C3 = C4 = 0.47F, 20%, 30V. C5 , C6 = 0.01F, 30V. CS1 = CS2 = 0.1F, 200V typically, depending on VRING and line length. RB1 = RB2 = 150 (1% absolute value).
RS1 = RS2 = 1k, 1%, 1/4W. R1 = 10k, 1%, 1/4W. R2 = 24.9k, 1%, 1/4W. R3 = R5 = 150k, 1%, 1/4W. R4 = 200k, 1%, 1/4W. D1, D2 , D3 , D4 , D5 = 1N40007, 100V, 3A. Z1 = 250V to 350V transient protection. PTC used as ring generator ballast.
15
HC5503
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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