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FDS6984S
May 2000 PRELIMINARY
FDS6984S
Dual Notebook Power Supply N-Channel PowerTrench(R) SyncFET TM
General Description
The FDS6984S is designed to replace two single SO-8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6984S contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency. The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode using Fairchild's monolithic SyncFET technology.
Features
* Q2: Optimized to minimize conduction losses Includes SyncFET Schottky diode RDS(on) = 0.019 @ VGS = 10V RDS(on) = 0.027 @ VGS = 4.5V * Q1: Optimized for low switching losses Low gate charge ( 5 nC typical) RDS(on) = 0.040 @ VGS = 10V RDS(on) = 0.055 @ VGS = 4.5V
8.5A, 30V
5.5A, 30V
5 6 7
Q2 Q1
4 3 2 1
8
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
T A = 25C unless otherwise noted
Parameter
Q2
30 20
(Note 1a)
Q1
30 20 5.5 20 2
Units
V V A W
8.5 30
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
1.6 1 0.9 -55 to +150 C
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RJ A RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
C/W C/W
Package Marking and Ordering Information
Device Marking FDS6984S Device FDS6984S Reel Size 13" Tape width 12mm Quantity 2500 units
(c)2000 Fairchild Semiconductor Corporation
FDS6984S Rev B(W)
FDS6984S
Electrical Characteristics
Symbol
BVDSS IDSS IGSSF IGSSR
T A = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage
Test Conditions
VGS = 0 V, ID = 1 mA VGS = 0 V, ID = 250 A VDS = 24 V, VGS = 0 V
Type Min
Q2 Q1 Q2 Q1 All All 30 30
Typ
Max Units
V 1000 1 100 -100 A nA nA
Off Characteristics
Zero Gate Voltage Drain Current Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V
Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V
(Note 2)
On Characteristics
VGS(th) VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance
VDS = VGS, ID = 1 mA VDS = VGS, ID = 250 A ID = 1 mA, Referenced to 25C ID = 250 uA, Referenced to 25C VGS = VGS = VGS = VGS = VGS = VGS = VGS = 10 V, ID = 8.5 A 10 V, ID = 8.5 A, TJ = 125C 4.5 V, ID = 7 A 10 V, ID = 5.5 A 10 V, ID = 5.5 A, TJ = 125C 4.5 V, ID = 4.6 A 10 V, VDS = 5 V
Q2 Q1 Q2 Q1 Q2
1 1 -6 -4 16 24 23 35 53 48 30 20 26 40 1233 462 344 113 106 40 8 10 5 14 25 21 11 7 11 8.5 5 2.4 4 3.1
3 3
V mV/C
Q1
19 32 27 40 60 55
m
ID(on) gFS
On-State Drain Current Forward Transconductance
VDS = 5 V, ID = 8.5 A VDS = 5 V, ID = 5.5 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz
Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1
A S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 15 V, ID = 1 A, VGS = 10V, RGEN = 6
Q2 VDS = 15 V, ID = 8.5 A, VGS =5V Q1 VDS = 15 V, ID = 5.5 A,VGS = 5 V
16 18 10 25 40 34 20 14 18 12
ns ns ns ns nC nC nC
FDS6680S Rev B (W)
FDS6984S
Electrical Characteristics
Symbol
IS trr Qrr VSD
(continued)
T A = 25C unless otherwise noted
Parameter
Test Conditions
Type Min
Q2 Q1 Q2
(Note 2) (Note 2)
Typ
Max Units
3.0 1.3 A ns 0.7 1.2 nC V
Drain-Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain-Source Diode Forward Current Reverse Recovery Time Reverse Recovery Charge Drain-Source Diode Forward Voltage IF = 10A, diF/dt = 300 A/s VGS = 0 V, IS = 3.5 A VGS = 0 V, IS = 1.3 A 17 12.5 0.5 0.74
(Note 3)
Q2 Q1
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) 78/W when mounted on a 0.5 in 2 pad of 2 oz copper
b) 125/W when mounted on a .02 in 2 pad of 2 oz copper
c) 135/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. 2. See "SyncFET Schottky body diode characteristics" below. 3. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDS6680S Rev B (W)
FDS6984S
Typical Characteristics: Q2
50 V GS = 10V 40 6.0V 5.0V 4.5V
2.6 VGS = 4.0V 2.2
30 4.0V 20
1.8
4.5V 5.0V
1.4 6.0V 8.0V 1 3.5V 0.6 10V
10
0 0 1 2 3
0
10
20
30
40
50
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.06
1.9
ID = 10A VGS = 10V
ID = 5A 0.05 0.04
1.6
1.3 0.03 1 0.02 0.7 0.01 0.4 -50 -25 0 25 50 75 100
o o
TA = 125 C
o
TA = 25 C
0 125 150 2 4 6 8 10 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
50 VDS = 5V 40 125 C 30
o
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
10 VGS = 0V
TA = -55 C
o
25 C 1 TA = 125 C 25 C 0.1 -55 C
o o o
o
20 0.01 10 0.001 1.5 2.5 3.5 4.5 5.5 0 0.2 0.4 0.6 0.8
0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS6680S Rev B (W)
FDS6984S
Typical Characteristics: Q2
10 I D =10A 8 VDS = 5V 15V 10V
2000 f = 1MHz VGS = 0 V 1600 CISS
6
1200
4
800 COSS CRSS
2
400
0 0 3 6 9 12 15 18 21
0 0 5 10 15 20 25 30
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100 RDS(ON) LIMIT 100s 10 1ms 10ms 100ms 1 DC 0.1 VGS = 10V SINGLE PULSE R JA = 135 C/W TA = 25 C 0.01 0.1 1 10 100 0
o o
Figure 8. Capacitance Characteristics.
50 SINGLE PULSE RJA = 135C/W TA = 25C
40
30
1s 10s 20
10
0.001
0.01
0.1
1 t1, TIME (sec)
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
FDS6680S Rev B (W)
FDS6984S
Typical Characteristics Q1
40 VGS = 10V 6.0 30 5.0 4.5
3 VGS = 3.0V 2.5 3.5V 2 4.0V 1.5 3.5V 4.0V 4.5V 5.0V 6.0V 1 3.0 10V
20
10
0 0 1 2 3 4 5
0.5 0 10 20 30
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 11. On-Region Characteristics.
Figure 12. On-Resistance Variation with Drain Current and Gate Voltage.
0.2
1.8 1.6 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100
o
ID = 4.6A VGS = 10V 0.15
ID = 2.3 A
0.1
TA = 125 C
o
0.05 TA = 25 C
o
125
150
0 2.5 3 3.5 4 4.5 VGS, GATE TO SOURCE VOLTAGE (V) 5
TJ, JUNCTION TEMPERATURE ( C)
Figure 13. On-Resistance Variation with Temperature.
25 VDS = 5V 20
o
Figure 14. On-Resistance Variation with Gate-to-Source Voltage.
100
TA = -55 C 25 C 125 C
o
o
VGS = 0V 10 TA = 125 C 1 25 C
o o
15
10
0.1
-55 C
o
5
0.01
0 1 2 3 4 5
0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS6680S Rev B (W)
FDS6984S
Typical Characteristics Q1
10 ID = 4.6A 8 VDS = 5V 10V 15V
700 600 CISS 500 f = 1MHz VGS = 0 V
6
400 300 200
4
2 100
COSS CRSS
0 0 2 4 6 8 10
0 0 5 10 15 20 25 30
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 17. Gate Charge Characteristics.
100 RDS(ON) LIMIT 10 100ms 1 DC 0.1 VGS = 10V SINGLE PULSE R JA = 135 C/W TA = 25 C 0.01 0.1 1 10 100 0
o o
Figure 18. Capacitance Characteristics.
30
100s 1ms 10ms 1s 10s 10
SINGLE PULSE R JA = 135C/W TA = 25C 20
0.01
0.1
1 t1, TIME (sec)
10
100
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum Power Dissipation.
1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.001 0.01 0.1 t 1, TIME (sec) 1 D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk)
R JA (t) = r(t) * R JA R JA = 135C/W
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2
10 100 300
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDS6680S Rev B (W)
FDS6984S
Typical Characteristics
(continued)
SyncFET Schottky Body Diode Characteristics
Fairchild's SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 12 shows the reverse recovery characteristic of the FDS6690S.
0.1 125 C 0.01
o
0.001
3A/DIV
0.0001
25 C
o
0.00001 0 10 20 30
VDS, REVERSE VOLTAGE (V)
10nS/DIV
Figure 12. FDS6690S SyncFET body diode reverse recovery characteristic.
For comparison purposes, Figure 13 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6690A).
3A/DIV
0V
10nS/DIV
Figure 13. Non-SyncFET (FDS6690A) body diode reverse recovery characteristic.
FDS6680S Rev B (W)
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
Static Dissipative Embossed Carrier Tape
F63TNR Label Customized Label
F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959
SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182
F852 NDS 9959
Pin 1
SOIC-8 Unit Orientation
343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample
LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC:
F63TNLabel F63TN Label ESD Label
(F63TNR)3
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0
Carrier Tape Cover Tape
Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SOIC(8lds) (12mm)
A0
6.50 +/-0.10
B0
5.30 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.60 +/-0.10
E1
1.75 +/-0.10
E2
10.25 min
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
2.1 +/-0.10
T
0.450 +/0.150
Wc
9.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SOIC(8lds) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST FASTrTM GTOTM
DISCLAIMER
HiSeCTM ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6
SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. E
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging Configuration: Figure 1.0
Customized Label
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssipat ive (carbo n filled) po ly carbon ate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped w ith 3,000 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 unit s per 7" or 177cm diameter reel. This and some other options are further described in the Packagin g Information table. These full reels are in di vidu ally barcod e labeled and placed inside a standard intermediate box (ill ustrated in figure 1.0) made of recyclable corrugated brow n paper. One box contains two reels maximum. And t hese boxes are placed ins ide a barcode labeled shipp ing bo x whic h comes in di fferent sizes depend in g on t he nu mber of parts shippe d.
F63TNR Label Anti static Cover Tape
Static Dissi pat ive Emboss ed Carrier Tape
F852 831N F852 831N F852 831N F852 831N F852 831N
Pin 1
SSOT-8 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard
(no f l ow c ode )
D84Z TNR 500 7" Dia 184x187x47 1,000 0.0416 0.0980
TNR 3,000 13" D ia 343x64x343 6,000 0.0416 0.5615
SSOT-8 Unit Orientation
343mm x 342mm x 64mm Intermediate box for Standar d and L99Z Opti ons
F63TNR Label
F63TNR Label
F63TNR Labe l sa mpl e 184mm x 187mm x 47mm Pizza Box fo r D84Z Option F63TNR Label
LOT: CBVK741B019 FSID: FDR835N QTY: 3000 SPEC:
SSOT-8 Tape Leader and Trailer Configuration: Figur e 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
Carrier Tape Cover Tape
Components Traile r Tape 300mm mi nimum or 38 empty pockets Lead er Tape 500mm mi nimum or 62 empty poc kets
August 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape Configuration: Figur e 3.0
T E1 P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-8 (12mm)
A0
4.47 +/-0.10
B0
5.00 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.50 +/-0.10
E1
1.75 +/-0.10
E2
10.25 mi n
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.280 +/-0.150
Wc
9.5 +/-0.025
Tc
0.06 +/-0.02
Notes : A0, B0, and K0 dimensions are deter mined with r espec t to t he EIA/Jedec RS-481 rotationa l and lateral movement requi remen ts (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Si de or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-8 Reel Configuration: Figur e 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
5.906 150 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOTTM-8 (FS PKG Code 34, 35)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST FASTrTM GTOTM
DISCLAIMER
HiSeCTM ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6
SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. E

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