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PD-94098
SMPS MOSFET
IRFP460N
HEXFET(R) Power MOSFET
Applications Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching
l
VDSS
500V
Rds(on) max
0.24
ID
20A
Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified ( See AN1001)
l
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
20 13 80 280 2.2 30 5.0 -55 to + 150 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Typical SMPS Topologies:
l l
Full Bridge PFC Boost
Notes
through are on page 8
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1
05/22/01
IRFP460N
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 500 --- --- V VGS = 0V, ID = 250A --- 0.58 --- V/C Reference to 25C, ID = 1mA --- --- 0.24 VGS = 10V, ID = 12A 3.0 --- 5.0 V VDS = VGS , ID = 250A --- --- 25 VDS = 500V, VGS = 0V A --- --- 250 VDS = 400V, VGS = 0V, TJ = 125C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 10 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 23 87 34 33 3540 350 30 3930 95 200 Max. Units Conditions --- S VDS = 50V, ID = 12A 124 ID = 20A 40 nC VDS = 400V 57 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 20A ns --- RG = 4.3 --- RD = 13,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
340 20 28
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Typ.
--- 0.24 ---
Max.
0.45 --- 40
Units
C/W
Diode Characteristics
Min. Typ. Max. Units IS
ISM
VSD trr Qrr ton
Conditions D MOSFET symbol 20 --- --- showing the A G integral reverse --- --- 80 S p-n junction diode. --- --- 1.8 V TJ = 25C, IS = 20A, VGS = 0V --- 550 825 ns TJ = 25C, IF = 20A --- 7.2 10.8 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFP460N
100
10
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
100
10
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
1
0.1
1
5.0V
5.0V
20s PULSE WIDTH T = 25 C
J 1 10 100
0.01
0.001 0.1
0.1 0.1
20s PULSE WIDTH T = 150 C
J 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.5
I D , Drain-to-Source Current (A)
TJ = 150 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 20A
3.0
2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20
10
TJ = 25 C
1
0.1 5 6 7 8
V DS = 50V 20s PULSE WIDTH 9 10 11
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFP460N
100000
20
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + C ds gd
ID = 20A
16
10000
VDS = 400V VDS = 250V VDS = 100V
C, Capacitance(pF)
Ciss
1000
12
Coss
8
100
Crss
4
10 1 10 100 1000
0 0 20 40 60
FOR TEST CIRCUIT SEE FIGURE 13
80 100 120 140
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
TJ = 150 C
10
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
10
TJ = 25 C
1
100sec 1msec
1 T A = 25C T J = 150C 0.1 Single Pulse 10 100 1000 10000 10msec
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP460N
20
VDS VGS
RD
D.U.T.
+
ID , Drain Current (A)
15
RG
-VDD
10V
10
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
5
VDS 90%
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
0.1
0.01
0.001 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.0001 0.001 0.01
P DM t1 t2 1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFP460N
1 5V
750
EAS , Single Pulse Avalanche Energy (mJ)
VDS
L
D R IV E R
600
ID 8.9A 12.6A BOTTOM 20A TOP
RG
20V tp
D .U .T
IA S
+ V - DD
450
A
0 .0 1
300
Fig 12a. Unclamped Inductive Test Circuit
150
V (B R )D SS tp
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
10 V
QGS VG
QG
50K 12V .2F .3F
QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFP460N
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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7
IRFP460N
Package Outline
TO-247AC
Dimensions are shown in millimeters (inches)
1 5.9 0 (.6 2 6) 1 5.3 0 (.6 0 2) -B3 .65 (.1 43 ) 3 .55 (.1 40 ) 0.2 5 (.0 1 0) M -A5.50 (.21 7) 2 0 .30 (.8 0 0) 1 9 .70 (.7 7 5) 1 2 3 -C1 4.8 0 (.5 83 ) 1 4.2 0 (.5 59 ) 4 .3 0 (.1 70 ) 3 .7 0 (.1 45 )
L E A D A S S IG N M E N T S 1 2 3 4 GA TE D R A IN SOURCE D R A IN
-D DBM 5 .3 0 (.20 9 ) 4 .7 0 (.18 5 ) 2 .5 0 (.08 9 ) 1 .5 0 (.05 9 ) 4
2X
5.50 (.2 1 7) 4.50 (.1 7 7)
NO TE S : 1 D IM E N S IO N IN G & T O LE R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 82 . 2 C O N TR O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S TO J E D E C O U TL IN E T O -2 4 7 -A C .
2 .40 (.0 9 4) 2 .00 (.0 7 9) 2X 5. 45 (.2 15 ) 2X
1 .4 0 (.0 5 6) 3 X 1 .0 0 (.0 3 9) 0.2 5 (.0 10 ) M 3.4 0 (.1 33 ) 3.0 0 (.1 18 ) C AS
0 .80 (.0 31 ) 3X 0 .40 (.0 16 ) 2 .60 (.1 0 2) 2 .20 (.0 8 7)
Part Marking Information
TO-247AC
E X A M P L E : TH IS IS A N IR F P E 3 0 W ITH A S S E M B L Y LO T CO D E 3 A1 Q
A
IN TE R N A T IO N A L R E C T IF IE R LO G O A SSEMBLY LO T CO D E
PART N UM BER IR F P E 3 0 3 A1Q 9 302 D A TE C O D E (Y Y W W ) YY = YEA R W W W E EK
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Starting TJ = 25C, L = 1.8mH
R G = 25, IAS = 20A. (See Figure 12)
ISD 20A, di/dt 140A/s, VDD V(BR)DSS,
TJ 150C
This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 05/01
8
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