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Ordering number : EN5309A
Wideband Output Module (Video Pack)
VPS12
CRT Display Video Output Amplifier: High-Voltage, Wideband Amplifier
Features
* High output voltage and wide bandwidth: optimal for use in color monitors in the fH (horizontal deflection frequency) = 90-kHz class (f = 120 MHz -3 dB at VOUT = 40 Vp-p) * Package: Molded 15-pin SIP package housing 3 channels in a single package
Package Dimensions
unit: mm 2127A
[VPS12]
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Allowable power dissipation Maximum junction temperature Maximum case temperature Storage temperature Symbol VCC max VBB max Pd max Tj max Tc max Tstg At Tc = 25C with an ideal heat sink Conditions Ratings 90 15 25 150 100 -20 to +110 Unit V V W C C C
Operating Conditions at Ta = 25C
Parameter Recommended supply voltage Symbol VCC VBB Conditions Ratings 80 10 Unit V V
Electrical Characteristics at Ta = 25C (for a single channel)
Parameter Symbol Conditions VCC = 80 V, VBB = 10 V, CL = 10 pF VIN (DC) = 3.2 V, VOUT (p-p) = 40 V VCC = 80 V, VBB = 10 V, CL = 10 pF VIN (DC) = 3.2 V, VOUT (p-p) = 40 V 13 VCC = 80 V, VBB = 10 V, VIN (DC) = 2.9 V, f = 10 MHz clock, CL = 10 pF, VOUT (p-p) = 40 V VCC = 80 V, VBB = 10 V, VIN (DC) = 2.9 V, f = 120 MHz clock, CL = 10 pF, VOUT (p-p) = 40 V Ratings min typ 120 4.2 3.2 15 45 17 max Unit
Frequency band (-3 dB)
fc tr tf VG (DC) ICC (1)
MHz ns ns Times mA
Pulse response Voltage gain
Current drain ICC (2)
70
mA
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
93096HA (OT) No. 5309-1/4
VPS12 Internal Equivalent Circuit
Test Circuit (for testing a single channel)
No. 5309-2/4
VPS12
Thermal Design Since the VPS12 has the three-channel configuration shown in the circuit diagram on page 2, we first consider a single channel. The chip temperatures of the transistors during operation can be determined from the following formula: Tj = (Tri) = j-c (Tri) x Pc (Tri) + Tc + Ta (C) ........................(1) j-c (Tri): Thermal resistances of the transistor chips themselves Pc (Tri): Collector loss of the transistors Tc: Increase in case temperature Ta: Ambient temperature The j-c (Tri) for the individual transistors is: j-c(Tr1) to (Tr4) = 35C/W .........................................................(2) Although the loss in each transistor in the video pack changes with frequency and thus are not identical, assuming a maximum frequency of 120 MHz (clock), the transistor with the largest loss is Tr3 in the emitter-follower stage. From the Pd-f(clock) figure it can be seen that this loss is 22% of the total loss. Thus: Pc (EF stage) f = 120 MHz = Pd (1ch) f = 120 MHz x 0.22 [W] .............(3) Select a h for the heat sink so that the junction temperature (Tj) of this transistor does not exceed 150C. Equation (4) gives the relationship between h and Tc. Tc = Pd (TOTAL) x h ..............................................................(4) The required h can be calculated from this equation and equation (1).
No. 5309-3/4
VPS12 VPS12 Thermal Design Example fV = 120 MHz (clock) in an fH = 85-kHz class monitor VCC = 80 V, VBB = 10 V, VOUT = 40 Vp-p (CL = 10 pF) Consider using this monitor at Ta = 60C and operating it at a maximum frequency of f = 120 MHz (clock). As was mentioned previously, the chip with the largest loss is Tr3 in the emitter-follower stage. Deriving that value from the figures below and equation (3) gives: Pc (EF stage) = 5.8 x 0.22 1.3 [W] ............................................(5) Next, applying the value of j-c to equation (5) shows Tj to be as follows: Tj = 1.3 x 35 = 45.5 [C] Here, Tj is less than 50C, and in the thermal design we only have to assure that Tc is less than 100C. That is, we must set h so that Tc is less than 100C when Pd (TOTAL) = Pd (one channel) x 3. Here, Tc will be Tc = 100 - 60 = 40C Since h = Tc / Pd (TOTAL) = 40 / (5.8 x 3) = 2.3, then h = 2.3 C/W. In an actual system, it may be possible to use a heat sink smaller than the one required for the value calculated above due to the actual ambient temperature and other operating conditions. Actual designs should be optimized to match those conditions using the data presented above. Conditions:
VCC (V) 80
VBB (V) 10
VOUT (V) 40
VO (center) 45
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of September, 1996. Specifications and information herein are subject to change without notice. No. 5309-4/4

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