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19-1822; Rev 1; 2/02
Single-Supply, Low-Power, Serial 8-Bit ADCs
General Description
The MAX1115/MAX1116 low-power, 8-bit, analog-todigital converters (ADCs) feature an internal track/hold (T/H), voltage reference, VDD monitor, clock, and serial interface. The MAX1115 is specified from +2.7V to +5.5V, and the MAX1116 is specified from +4.5V to +5.5V. Both parts consume only 175A at 100ksps. The full-scale analog input range is determined by the internal reference of +2.048V (MAX1115) or +4.096V (MAX1116). The MAX1115/MAX1116 also feature AutoShutdownTM power-down mode which reduces power consumption to <1A when the device is not in use. The 3-wire serial interface directly connects to SPITM, QSPITM, and MICROWIRETM devices without external logic. Conversions up to 100ksps are performed using an internal clock. The MAX1115/MAX1116 are available in an 8-pin SOT23 package with a footprint that is just 30% of an 8-pin SO. o Single Supply +2.7V to +3.6V (MAX1115) +4.5V to +5.5V (MAX1116) o Input Voltage Range: 0 to VREF o Internal Track/Hold; 100kHz Sampling Rate o Internal Reference +2.048V (MAX1115) +4.096V (MAX1116) o SPI/QSPI/MICROWIRE-Compatible Serial Interface o Small 8-Pin SOT23 Package o Automatic Power-Down o Low Power 175A at 100ksps 18A at +3V and 10ksps 1A in Power-Down Mode
Features
MAX1115/MAX1116
________________________Applications
Low-Power, Hand-Held Portable Devices System Diagnostics Battery-Powered Test Equipment Receive-Signal-Strength Indicators 4mA to 20mA Powered Remote Data-Acquisition Systems
PART MAX1115EKA MAX1116EKA
Ordering Information
TEMP RANGE -40C to +85C -40C to +85C PINPACKAGE 8 SOT23 8 SOT23 TOP MARK AADU AADV
Pin Configuration
TOP VIEW
VDD 1 8 7 SCLK DOUT CONVST I.C.
AutoShutdown is a trademark of Maxim Integrated Products. SPI/QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor, Corp.
CH0 I.C. GND
2 3 4
MAX1115 MAX1116
6 5
SOT23
________________________________________________________________ Maxim Integrated Products
1
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +6.0V CH0 to GND ...............................................-0.3V to (VDD + 0.3V) Digital Output to GND ................................-0.3V to (VDD + 0.3V) Digital Input to GND ..............................................-0.3V to +6.0V Maximum Current into Any Pin .........................................50mA Continuous Power Dissipation (TA = +70C) 8-Pin SOT23 (derate 8.9mW/C above +70C)............714mW Operating Temperature Range MAX111_EKA ..................................................-40C to + 85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX1115), VDD = +4.5V to +5.5V (MAX1116), TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER DC ACCURACY Resolution Relative Accuracy Differential Nonlinearity Offset Error Gain Error Gain Temperature Coefficient VDD/2 Sampling Error Signal-to-Noise Plus Distortion Total Harmonic Distortion (up to the 5th Harmonic) Spurious-Free Dynamic Range Small-Signal Bandwidth ANALOG INPUT Input Voltage Range Input Leakage Current Input Capacitance INTERNAL REFERENCE Voltage POWER REQUIREMENTS Supply Voltage VDD MAX1115 MAX1116 MAX1115 Supply Current (Note 2) IDD MAX1116 Shutdown fSAMPLE = 10ksps fSAMPLE = 100ksps fSAMPLE = 10ksps fSAMPLE = 100ksps 2.7 4.5 14 135 19 182 0.8 5.5 5.5 21 190 25 230 10 A V VREF MAX1115 MAX1116 2.048 4.096 V CIN VCH = 0 or VDD 0 0.7 18 VREF 10 V A pF SINAD THD SFDR f-3dB 90 2 48 -69 66 4 7 INL DNL (Note 1) 8 1 1 0.5 5 Bits LSB LSB LSB %FSR ppm/C % dB dB dB MHz SYMBOL CONDITIONS MIN TYP MAX UNITS
DYNAMIC PERFORMANCE (25kHz sine-wave input, VIN = VREF (P-P), fSCLK = 5MHz, fSAMPLE = 100ksps, RIN = 100)
2
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Single-Supply, Low-Power, Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1115), VDD = +4.5V to +5.5V (MAX1116), TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER Supply Rejection Ratio Input High Voltage Input Low Voltage Input Hystersis Input Current High Input Current Low Input Capacitance DIGITAL OUTPUT (DOUT) Output High Voltage Output Low Voltage Three-State Leakage Current Three-State Output Capacitance CNVST High Time CNVST Low Time Conversion Time Serial Clock High Time Serial Clock Low Time Serial Clock Period Falling of CNVST to DOUT Active Serial Clock Falling Edge to DOUT Serial Clock Rising Edge To DOUT High-Z Last Serial Clock to Next CNVST (successive conversions on CH0) VOH VOL IL COUT tcsh tcsl tconv tch tcl tcp tcsd tcd tchz tccs CLOAD = 100pF, Figure 1 CLOAD = 100pF CLOAD = 100pF, Figure 2 10 100 50 75 75 200 100 100 500 100 100 7.5 ISOURCE = 2mA ISINK = 2mA ISINK = 4mA 0.01 4 VDD - 0.5 0.4 0.8 10 V V A pF ns ns s ns ns ns ns ns ns ns SYMBOL PSRR VIH VIL VHYST IIH IIL CIN 2 0.2 10 10 CONDITIONS Full-scale or zero input 2 0.8 MIN TYP 0.5 MAX 1 UNITS LSB/V V V V A A pF
MAX1115/MAX1116
DIGITAL INPUTS (CNVST AND SCLK)
TIMING CHARACTERISTICS (Figures 6a-6d)
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and offset have been calibrated. Note 2: Input = 0, with logic input levels of 0 and VDD.
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
Typical Operating Characteristics
(VDD = +3V (MAX1115), VDD = +5V (MAX1116), fscu = 5MHz, fsample = 100ksps, CLOAD = 100pF, TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. OUTPUT CODE
0.8 0.6 0.4 DNL (LSB) INL (LSB) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 50 100 150 200 250 300 OUTPUT CODE
MAX1115 toc01
DIFFERENTIAL NONLINEARITY vs. OUTPUT CODE
MAX1115 toc02
SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1115 toc03
1.0
1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 50 100 150 200 250
0.7 0.6 SHUTDOWN CURRENT (A) 0.5 0.4 0.3 0.2 0.1 0
300
2.5
3.5
4.5
5.5
OUTPUT CODE
SUPPLY VOLTAGE (V)
SUPPLY CURRENT vs. CONVERSION RATE
MAX1115 toc04
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1115 toc05
SUPPLY CURRENT vs. TEMPERATURE
MAX1115 toc06
100.0
200
200
SUPPLY CURRENT (A)
10.0
MAX1116 VDD = +5V MAX1115 VDD = +3V
SUPPLY CURRENT (A)
MAX1116 100
SUPPLY CURRENT (A)
150
150
MAX1115
100 MAX1115 VDD = +3V 50
MAX1116 VDD = +5V
1.0
50
DOUT = 00000000 VDD = VDIGITAL INPUTS
DOUT = 00000000 VDD = VREF = VDIGITAL INPUTS 0 4.5 5.5 -40 -15 10 35 60 85
0 0.01 0.1 1 10 100
CONVERSION (ksps)
0 2.5 3.5 SUPPLY VOLTAGE (V)
TEMPERATURE (C)
CONVERSION TIME vs. SUPPLY VOLTAGE
MAX1115 toc07
CONVERSION TIME vs. TEMPERATURE
MAX1115 toc08
GAIN ERROR vs. SUPPLY VOLTAGE
MAX1115 toc09
5.5
5.5
1.4 1.2 GAIN ERROR (%FSR) 1.0 0.8 0.6 0.4 0.2 0 MAX1115 VDD = +3V MAX1116 VDD = +5V
5.4 CONVERSION TIME (s)
5.4 CONVERSION TIME (s)
VDD = +3V
5.3
5.3
5.2
5.2
5.1
5.1
VDD = +5V
5.0 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
5.0 -40 -15 10 35 60 85 TEMPERATURE (C)
2.5
3.5
4.5
5.5
SUPPLY VOLTAGE (V)
4
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1115), VDD = +5V (MAX1116), fscu = 5MHz, fsample = 100ksps, CLOAD = 100pF, TA = +25C, unless otherwise noted.)
GAIN ERROR vs. TEMPERATURE FFT PLOT
MAX1115 toc10
1.5 GAIN ERROR (%FSR) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -40 -15 10 35 60 MAX1116 VDD = +5V MAX1115 VDD = +3V
-20 AMPLITUDE (dB) -40 -60 -80 -100 -120
fSAMPLE = 100kHz fIN = 25.1kHz AIN = 0.9xVREF p-p
85
0
10k
20k
30k
40k
50k
TEMPERATURE (C)
ANALOG INPUT FREQUENCY (Hz)
OFFSET ERROR vs. SUPPLY VOLTAGE
0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) MAX1115 VDD = +3V MAX1116 VDD = +3V
MAX1115 toc12
OFFSET ERROR vs. TEMPERATURE
0.4 0.3 OFFSET ERROR (LSB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -40 -15 10 35 60 85 TEMPERATURE (C) MAX1115 VDD = +5V MAX1116 VDD = +3V
MAX1115 toc13
0.5
0.5
MAX1115 REFERENCE VOLTAGE vs. NUMBER OF PIECES
MAX1115 toc14
MAX1116 REFERENCE VOLTAGE vs. NUMBER OF PIECES
MAX1115 toc15
21.0% 17.5% 14.0% 10.5% 7.0% 3.5% 0 1.982
21.0% 17.5% 14.0% 10.5% 7.0% 3.5% 0 3.980
2.008
2.034
2.060
2.086
2.112
4.020
4.060
4.100
4.140
4.180
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
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MAX1115 toc11
2.0
0
5
Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
Pin Description
PIN 1 2 3, 5 4 6 7 8 NAME VDD CH0 I.C. GND CNVST DOUT SCLK Positive Supply Voltage Analog Voltage Input Internally Connected. Connect to ground. Ground Convert/Start Input. CNVST initiates a power-up and starts a conversion on its falling edge. Serial Data Output. Data is clocked out on the falling edge of SCLK. DOUT goes low at the start of a conversion and presents the MSB at the completion of a conversion. DOUT goes high impedance once data has been fully clocked out. Serial Clock. Used for clocking out data on DOUT. FUNCTION
VDD
VDD 3k DOUT DOUT
3k DOUT DOUT
3k GND a) VOL TO VOH
CLOAD
CLOAD GND b) HIGH-Z TO VOL AND VOH TO VOL
3k GND a) VOH TO HIGH-Z
CLOAD
CLOAD GND b) VOL TO HIGH-Z
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disable Time
Detailed Description
The MAX1115/MAX1116 ADCs use a successiveapproximation conversion technique and input track/hold (T/H) circuitry to convert an analog signal to an 8-bit digital output. The SPI/QSPI/MICROWIREcompatible interface directly connects to microprocessors (Ps) without additional circuitry (Figure 3).
Sufficiently low source impedance is required to ensure an accurate sample. A source impedance of <1.5k is recommended for accurate sample settling. A 100pF capacitor at the ADC inputs also improves the accuracy of an input sample.
Conversion Process
The MAX1115/MAX1116 conversion process is internally timed. The total acquisition and conversion process takes <7.5s. Once an input sample has been acquired, the comparator's negative input is then connected to an auto-zero supply. Since the device requires only a single supply, the negative input of the comparator is set to equal VDD/2. The capacitive DAC restores the positive input to VDD/2 within the limits of 8bit resolution. This action is equivalent to transferring a charge QIN = 16pF VIN from CHOLD to the binaryweighted capacitive DAC, which forms a digital representation of the analog-input signal.
Track/Hold
The input architecture of the ADC is illustrated in the equivalent-input circuit shown in Figure 4 and is composed of the T/H, input multiplexer, input comparator, switched capacitor DAC, and auto-zero rail. The acquisition interval begins with the falling edge of CNVST. During the acquisition interval, the analog input (CH0) is connected to the hold capacitor (C HOLD). Once the acquisition is complete, the T/H switch opens and CHOLD is connected to GND, which retains the charge on CHOLD as a sample of the signal at the analog input.
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
VDD CH0 ANALOG INPUTS GND VDD 0.1F 1F CHOLD 16pF COMPARATOR RIN 6.5k HOLD TRACK VDD GND CAPACITIVE DAC
MAX1115 MAX1116
CONVST SCLK DOUT I/O
CPU
CH0 VDD 2
SCK (SK) MISO (SI) GND
AUTO-ZERO RAIL
Figure 3. Typical Operating Circuit
Figure 4. Equivalent Input Circuit
Input Voltage Range
Internal protection diodes that clamp the analog input to VDD and GND allow the input pin (CH0) to swing from (GND - 0.3V) to (VDD + 0.3V) without damage. However, for accurate conversions, the inputs must not exceed (VDD + 50mV) or be less than (GND - 50mV).
I/O SCK MISO +3V CONVST SCLK DOUT
MAX1115 MAX1116
Input Bandwidth
The ADC's input tracking circuitry has a 4MHz smallsignal bandwidth, so it is possible to digitize highspeed transient events and measure periodic signals with bandwidths exceeding the ADC's sampling rate by using undersampling techniques. Anti-alias filtering is recommended to avoid high-frequency signals being aliased into the frequency band of interest.
a) SPI
SS
CS SCK MISO +3V
CONVST SCLK DOUT
Serial Interface
The MAX1115/MAX1116 have a 3-wire serial interface. The CNVST and SCLK inputs are used to control the device, while the three-state DOUT pin is used to access the conversion results. The serial interface provides connection to microcontrollers (Cs) with SPI, QSPI, and MICROWIRE serial interfaces at clock rates up to 5MHz. The interface supports either an idle high or low SCLK format. For SPI and QSPI, set CPOL = CPHA = 0 or CPOL = CPHA = 1 in the SPI control registers of the C. Figure 5 shows the MAX1115/MAX1116 common serial-interface connections. See Figures 6a-6d for details on the serialinterface timing and protocol.
SS b) QSPI I/O SK SI
MAX1115 MAX1116
CONVST SCLK DOUT
MAX1115 MAX1116
c) MICROWIRE
Figure 5. Common Serial-Interface Connections
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
ACTIVE tCSH
POWER-DOWN MODE
CNVST
CH0 tCONV tch tcp
CH0 tccs
SCLK
IDLE LOW tcsd tcd tcl tchz
IDLE LOW
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6a. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle Low
ACTIVE tCSH
POWER-DOWN MODE
CNVST
CH0 tCONV tch tcp
CH0 tccs IDLE HIGH
SCLK IDLE HIGH
tcsd
tcd
tcl
tchz
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6b. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle High
Digital Inputs and Outputs
The MAX1115/MAX1116 perform conversions by using an internal clock. This frees the P from the burden of running the SAR conversion clock, and allows the conversion results to be read back at the P's convenience at any clock rate up to 5MHz.
The acquisition interval begins with the falling edge of CNVST. CNVST can idle between conversions in either a high or low state. If idled in a low state, CNVST must be brought high for at least 50ns, then brought low to initiate a conversion. To select VDD/2 for conversion, the CNVST pin must be brought high and low for a second time (Figures 6c and 6d).
8
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
ACTIVE tCSH
POWER-DOWN MODE tCSL
CH0 CNVST
VDD 2 tCONV tch tcp
CH0 tccs
VDD 2
SCLK
IDLE LOW tcsd tcd tcl tchz
IDLE LOW
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6c. Conversion and Interface Timing, Conversion on VDD / 2 with SCLK Idle Low
ACTIVE tCSH
POWER-DOWN MODE tcsl
CH0 CNVST
VDD 2 tCONV tch tcp
CH0 tccs
VDD 2
SCLK
IDLE HIGH
IDLE HIGH
tcsd
tcd
tcl
tchz
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6d. Conversion and Interface Timing, Conversion on VDD / 2 with SCLK Idle High
After CNVST is brought low, allow 7.5s for the conversion to be completed. While the internal conversion is in progress, DOUT is low. The MSB is present at the DOUT pin immediately after conversion is completed. The conversion result is clocked out at the DOUT pin and is coded in straight binary (Figure 7). Data is clocked out at SCLK's falling edge in MSB-first format
at rates up to 5MHz. Once all data bits are clocked out, DOUT goes high impedance (100ns to 500ns after the rising edge) of the eighth SCLK pulse. SCLK is ignored during the conversion process. Only after a conversion is complete will SCLK cause serial data to be output. Falling edges on CNVST during an
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9
Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
OUTPUT CODE 11111111 11111110 11111101
FULL-SCALE TRANSITION
SYSTEM POWER SUPPLIES GND
+3V/+5V
FS = VREFIN + VIN1LSB = VREFIN 256 00000011 00000010 00000001 00000000 0 1 2 3 INPUT VOLTAGE (LSB) FS FS - 1/2 LSB GND IN-
1F
10
0.1F VDD DGND VDD
MAX1115 MAX1116
DIGITAL CIRCUITRY
Figure 7. Input/Output Transfer Function
Figure 8. Power-Supply Connections
active conversion process interrupt the current conversion and cause the input multiplexer to switch to VDD/2. To reinitiate a conversion on CH0, it is necessary to allow for a conversion to be complete and all of the data to be read out. Once a conversion has been completed, the MAX1115/MAX1116 goes into Autoshutdown mode (typically <1A) until the next conversion is initiated.
Applications Information
Power-On Reset
When power is first applied, the MAX1115/MAX1116 are in AutoShutdown (typically <1A). A conversion can be started by toggling CNVST high to low. Powering up the MAX1115/MAX1116 with CNVST low does not start a conversion.
The power consumption consequence of this architecture is dramatic when relatively slow conversion rates are needed. For example, at a conversion rate of 10ksps, the average supply current for the MAX1115 is 15A, while at 1ksps it drops to 15A. At 0.1ksps it is just 0.3A, or a miniscule 1W of power consumption (see Average Supply Current vs. Conversion Rate plot in the Typical Operating Characteristics sections).
Transfer Function
Figure 7 depicts the input/output transfer function. Output coding is binary with a +2.048V reference, 1LSB = 8mV(VREF/256).
Layout, Grounding, and Bypassing
For best performance, board layout should ensure that digital and analog signal lines are separated from each other. Do not run analog and digital (especially clock) lines parallel to one another or run digital lines underneath the ADC package. Figure 8 shows the recommended system-ground connections. A single-point analog ground (star-ground point) should be established at the ADC ground. Connect all analog grounds to the star-ground. The ground-return to the power supply for the star ground should be low impedance and as short as possible for noise-free operation. High-frequency noise in the V DD power supply can affect the comparator in the ADC. Bypass the supply to the star ground with a 0.1F capacitor close to the VDD pin of the MAX1115/MAX1116. Minimize capacitor lead
AutoShutdown and Supply Current Requirements
The MAX1115/MAX1116 are designed to automatically shutdown once a conversion is complete, without any external control. An input sample and conversion process typically takes 5s to complete, during which time the supply current to the analog sections of the device are fully on. All analog circuitry is shutdown after a conversion completes, which results in a supply current of <1A (see Shutdown Current vs. Supply Voltage plot in the Typical Operating Characteristics section). The digital conversion result is maintained in a static register and is available for access through the serial interface at any time.
10
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Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
Functional Diagram
SCLK
CNVST
CONTROL LOGIC AND INTERNAL OCSILLATOR
CH0 INPUT MULTIPLEXER INPUT TRACK AND HOLD 8-BIT SAR ADC OUTPUT SHIFT REGISTER DOUT
SPLIT VDD/2
INTERNAL REFERENCE 2.096V OR 4.096V
MAX1115 MAX1116
lengths for best supply-noise rejection. If the power supply is noisy, a 0.1F capacitor in conjunction with a 10 series resistor can be connected to form a lowpass filter.
Chip Information
TRANSISTOR COUNT: 2000 PROCESS: BiCMOS
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11
Single-Supply, Low-Power, Serial 8-Bit ADCs MAX1115/MAX1116
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
SOT23, 8L.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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