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FAST CMOS 1-TO-10 CLOCK DRIVER
Integrated Device Technology, Inc.
IDT54/74FCT807BT/CT
FEATURES:
* * * * * * * * * * * * 0.5 MICRON CMOS Technology Guaranteed low skew < 250ps (max.) Very low duty cycle distortion < 350ps (max.) High speed: propagation delay < 2.5ns (max.) 100MHz operation TTL compatible inputs and outputs TTL level output voltage swings 1:10 fanout Output rise and fall time < 1.5ns (max.) Low input capacitance: 4.5pF typical High Drive: -32mA IOH, 48mA IOL ESD > 2000V per MIL STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0) * Available in DIP, SOIC, SSOP, QSOP, Cerpack and LCC packages * Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT807BT/CT clock driver is built using advanced dual metal CMOS technology. This low skew clock driver features 1:10 fanout, providing minimal loading on the preceding drivers. The IDT54/74FCT807BT/CT offers low capacitance inputs with hysteresis for improved noise margins. TTL level outputs and multiple power and grounds reduce noise. The device also features -32/48mA drive capability for driving low impedance traces.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
IN 1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 SO20-7 SO20-8 & E20-1 20 19 18 17 16 15 14 13 12 11 VCC O10 O9 GND O8 VCC O7 GND O6 O5
3017 drw 02
O1 O2
GND O1 VCC
O3 O4
O2 GND O3
O5 IN O6
VCC O4 GND
O7 O8 O9 O10
VCC
3017 drw 01
DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW
GND VCC O1
INDEX
3 4 5 6 7 8 O2 GND O3 VCC
2
1
20 19 18 17 O9 GND O8 VCC O7
L20-2
O10
16 15 14
9 10 11 12 13
O4
O5
IN
GND
O6
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
LCC TOP VIEW
GND
3017 drw 03
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1995 Integrated Device Technology, Inc.
OCTOBER 1995
DSC-4242/3
9.3
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IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names IN Ox Description Input Outputs
3017 tbl 01
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. Unit 6.0 pF 8.0
pF
3017 lnk 02 NOTE: 1. This parameter is measured at characterization but not tested.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature IOUT DC Output Current Commercial -0.5 to +7.0 Military -0.5 to +7.0 Unit V
-0.5 to VCC +0.5 0 to +70 -55 to +125 -55 to +125 -60 to +120
-0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 -60 to +120
V C C C mA
3017 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals. 3. Output and I/O terminals.
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IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Input LOW Current (5) Current (5) pins) (5) VCC = Min., IIN= -18mA VCC = Max.(3) , VO = GND VCC = Min. VIN = VIH or VIL IOH = -12mA MIL. IOH = -15mA COM'L. IOH = -24mA MIL. IOH = -32mA COM'L.(4) VCC = Min. IOL = 32mA MIL. VIN = VIH or VIL IOL = 48mA COM'L. VCC = 0V, VIN or VO 4.5V -- VCC = Max., VIN = GND or VCC Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V VCC = Max., VI = VCC (Max.) Min. 2.0 -- -- -- -- -- -- -- -60 2.4 2.0 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -0.7 -120 3.3 3.0 0.3 -- 150 5 Max. -- 0.8 1 1 1 1 1 -1.2 -225 -- -- 0.55 1 -- 500 V A mV A Unit V V A A A A A V mA V
High Impedance Output Current (3-State Output Input HIGH Current (5)
Clamp Diode Voltage Short Circuit Current Output HIGH Voltage
VOL
IOFF VH
Output LOW Voltage Input/Output Power Off Leakage(5) Input Hysteresis for all inputs Quiescent Power Supply Current
ICCL ICCH ICCZ
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter is 5A at TA = -55C.
3017 lnk 04
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (3) Test Conditions(1) VCC = Max. VIN = 3.4V VCC = Max. Input toggling 50% Duty Cycle Outputs Open VCC = Max. Input toggling 50% Duty Cycle Outputs Open fi = 50MHz Min. -- VIN = VCC VIN = GND -- Typ.(2) 0.5 0.4 Max. 2.0 0.6 Unit mA mA/ MHz
IC
Total Power Supply Current (5)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
20.0
30.5 (4)
mA
--
20.3
31.3 (4)
3017 tbl 05
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input; (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fi= Input Frequency All currents are in milliamps and all frequencies are in megahertz. 9.3
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IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
IDT54/74FCT807BT Com'l. Symbol Parameter tPLH Propagation Delay tPHL tR Output Rise Time tF tSK(o) tSK(p) tSK(t) Output Fall Time Output skew: skew between outputs of same package (same transition) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) Min.(2) 50 to VCC/2, CL = 10pF (See figure 1) or 50 ac termination, CL = 10pF (See figure 2) f 100MHz Outputs connected in groups of two 1.3 -- -- -- -- --
Max.
IDT54/74FCT807CT Com'l.
Min.(2) Max.
Mil.
Min.(2) Max.
Mil.
Min.(2) Max.
2.7 1.5 1.5 0.5 0.5 0.9 -- -- -- -- --
1.3 -- -- -- -- --
2.5 1.5 1.5 0.25 0.35 0.65 -- -- -- -- --
Unit ns ns ns ns ns ns
3017 tbl 06
IDT54/74FCT807BT Com'l. Symbol Parameter tPLH Propagation Delay tPHL tR Output Rise Time tF tSK(o) tSK(p) tSK(t) Output Fall Time Output skew: skew between outputs of same package (same transition) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) Min.(2) CL = 30pF f 67MHz (See figure 3) 1.5 -- -- -- -- --
Max.
IDT54/74FCT807CT Com'l.
Min.(2) Max.
Mil.
Min.(2) Max.
Mil.
Min.(2) Max.
3.8 1.5 1.5 0.5 0.5 0.9 -- -- -- -- --
1.5 -- -- -- -- --
3.5 1.5 1.5 0.25 0.35 0.75 -- -- -- -- --
Unit ns ns ns ns ns ns
3017 tbl 07
IDT54/74FCT807BT Com'l. Symbol Parameter tPLH Propagation Delay tPHL tR Output Rise Time tF tSK(o) tSK(p) tSK(t) Output Fall Time Output skew: skew between outputs of same package (same transition) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Conditions(1) Min.(2) CL = 50pF f 40MHz (See figure 4) 1.5 -- -- -- -- --
Max.
IDT54/74FCT807CT Com'l.
Min.(2) Max.
Mil.
Min.(2) Max.
Mil.
Min.(2) Max.
3.8 1.5 1.5 0.5 0.60 1.0 -- -- -- -- --
1.5 -- -- -- -- --
3.5 1.5 1.5 0.35 0.45 0.75 -- -- -- -- --
Unit ns ns ns ns ns ns
3017 tbl 08 NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
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IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS 50 TO VCC/2, CL = 10pF
V CC V CC
50 AC TERMINATION, CL = 10pF
V CC
100 VIN Pulse Generator RT D.U.T. 100 10pF RT 220pF
3017 drw 04 3017 drw 05
V OUT Pulse Generator
V IN D.U.T.
VOUT 50
10pF
Figure 1.
The capacitor value for ac termination is determined by the operating frequency. For very low frequencies a higher capacitor value should be selected. Figure 2.
CL = 30pF CIRCUIT
V CC
CL = 50pF CIRCUIT
V CC
V IN Pulse Generator RT D.U.T.
V OUT Pulse Generator 30pF CL
3017 drw 06
V IN D.U.T.
V OUT
50pF RT CL
3017 drw 07
Figure 3.
Figure 4.
ENABLE AND DISABLE TIME CIRCUIT
V CC 500 V IN Pulse Generator RT D.U.T. 50pF CL
3017 drw 08
ENABLE AND DISABLE TIME SWITCH POSITION
7.0V
V OUT
Test Disable LOW Enable LOW Disable HIGH Enable HIGH
Switch Closed Open
500
3017 lnk 09 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Figure 5.
9.3
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IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST WAVEFORMS PACKAGE DELAY
3V 1.5V INPUT tPLH tPHL VOH 2.0V OUTPUT tR tF
3017 drw 09
OUTPUT SKEW- tSK(o)
INPUT 3V 1.5V 0V VOH 1.5V VOL tSK(o) OUTPUT 2 tPLH2 tPHL2 tSK(o) VOH 1.5V VOL
0V OUTPUT 1
tPLH1
tPHL1
1.5V
0.8V VOL
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
3017 drw 10
PULSE SKEW - tSK(p)
3V 1.5V 0V tPLH tPHL VOH 1.5V VOL
PACKAGE SKEW - tSK(t)
3V 1.5V 0V VOH 1.5V VOL VOH 1.5V VOL
INPUT
INPUT
tPLH1
tPHL1
PACKAGE 1 OUTPUT tSK(t) PACKAGE 2 OUTPUT tSK(t)
OUTPUT tSK(p) = |tPHL - tPLH|
tPLH2
tPHL2
tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
3017 drw 11
Package 1 and Package 2 are same device type and speed grade
3017 drw 12
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED t PZH SWITCH OPEN 1.5V 0V 0V
3017 drw 13
DISABLE 3V 1.5V 0V t PLZ 3.5V 1.5V 0.3V t PHZ 0.3V VOH 3.5V VOL
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: f 1.0MHz; tF 2.5ns; tR 2.5ns
9.3
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IDT54/74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX Temp. Range FCT XXXX Device Type X Package X Process
Blank B P D SO L E PY Q 807BT 807CT
Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Shrink Small Outline IC Quarter-size Small Outline IC 1-to-10 Clock Driver
54 74
-55C to +125C 0C to +70C
3017 drw 14
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