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| PRELIMINARY INFORMATION I C R O C LOC K Description The ICS543 is a cost effective way to produce a high quality clock output divided from a clock input. The chip accepts a clock input up to 90 MHz at 5.0 V, and by using proprietary Phase Locked Loop (PLL) techniques, produces a divide by 3, 5, 6, or 10, or a multiply by 2 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the other. So, for instance, if an 81 MHz input clock is used, the ICS543 can produce low skew 27 MHz and 13.5 MHz clocks. The chip has an all-chip power down mode that stops the outputs low, and an OE pin that tri-states the outputs. The ICS543 is a member of the ICS ClockBlocksTM family of clock building blocks. See the ICS541 and ICS542 for other clock dividers, and the ICS300, 501, 502, and 503 for clock multipliers. ICS543 Clock Divider and 2X Multiplier Features * Packaged in 8 pin SOIC * Low cost clock divider and 2X multiplier * Low skew (500ps) outputs. One is / 2 of other. * Easy to use with other generators and buffers * Input clock frequency up to 90 MHz at 5 V * Output clock duty cycle of 45/55 * Power Down turns off chip * Output Enable * Full CMOS clock swings with 25 mA drive capability at TTL levels * Advanced, low power CMOS process * Operating voltages of 3.0 to 5.5 V Block Diagram VDD GND 2 S1, S0 Divider and Selection Circuitry Input Clock /2 Output Buffer CLK Output Buffer CLK/2 OE (both outputs) 1 Revision 010599 Printed 12/4/00 Integrated Circuit Systems, Inc.*525 Race Street*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS 543 A PRELIMINARY INFORMATION I C R O C LOC K ICS543 Clock Divider and 2X Multiplier Pin Assignment ICLK VDD GND S0 1 2 3 4 8 7 6 5 CLK CLK/2 OE S1 Clock Decoding Table S1 #5 0 0 1 1 S0 #4 0 1 0 1 CLK CLK/2 Max. Input Max. Input pin #8 pin #7 at 5V at 3.3V Power Down All Input x 2 Input 67 MHz 50 MHz Input/5 Input/10 60 MHz 40 MHz Input/3 Input/6 90 MHz 60 MHz 8 pin SOIC Pin Descriptions Number 1 2 3 4 5 6 7 8 Name ICLK VDD GND S0 S1 OE CLK/2 CLK Type CI P P I I I O O 0 = connect directly to ground. 1 = connect directly to VDD. Description Clock input. Connect to +3.3V or +5V. Connect to ground. Select 0 for output clock. Connect to GND or VDD, per decoding table above. Select 1 for output clock. Connect to GND or VDD, per decoding table above. Output Enable. Tri-states both output clocks when low. Clock output per Table above. Low skew divide by two of pin 8 clock. Clock output per Table above. Key: CI = clock input, I = input, O = output, P = power supply connection External Components The ICS543 requires a 0.01 F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS543 to minimize lead inductance. No external power supply filtering is required for this device. A 33 terminating resistor can be used next to each output pin. If a 3.3 V input clock is applied to the ICLK pin, with the ICS543 at 5 V, the clock must be AC coupled. 2 Revision 010599 Printed 12/4/00 Integrated Circuit Systems, Inc.*525 Race Street*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS 543 A PRELIMINARY INFORMATION I C R O C LOC K Electrical Specifications ICS543 Clock Divider and 2X Multiplier Parameter Conditions Minimum Typical ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) Supply Voltage, VDD Referenced to GND Inputs Referenced to GND -0.5 Clock Output Referenced to GND -0.5 Ambient Operating Temperature 0 Soldering Temperature Max of 10 seconds Storage temperature -65 DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Operating Voltage, VDD 3 Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 VDD/2 Input Low Voltage, VIL, ICLK only ICLK (Pin 1) VDD/2 Input High Voltage, VIH S0, S1, OE 2 Input Low Voltage, VIL S0, S1, OE Output High Voltage, VOH IOH=-25mA 2.4 Output Low Voltage, VOL IOL=25mA IDD Operating Supply Current, 50 MHz input No Load, 5.0V, /5, /10 17 IDD Operating Supply Current, 50 MHz input No Load, 3.3V, /5, 10 9 Short Circuit Current Each Output 70 Input Capacitance, S1, S0, OE Pins 4, 5, 6 4 AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Input Frequency, clock input at VDD = 5V 4 Input Frequency, clock input at VDD = 3.3V 4 Skew of output clocks rising edges at VDD/2 Output Clock Rise Time 0.8 to 2.0V 1 Output Clock Fall Time 2.0 to 0.8V 1 Output Clock Duty Cycle at VDD/2 45 49 to 51 Maximum 7 VDD+0.5 VDD+0.5 70 260 150 5.5 (VDD/2)-1 0.8 0.4 Units V V V C C C V V V V V V V mA mA mA pF MHz MHz ps ns ns % See page 2 See page 2 500 55 3 Revision 010599 Printed 12/4/00 Integrated Circuit Systems, Inc.*525 Race Street*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS 543 A PRELIMINARY INFORMATION I C R O C LOC K ICS543 Clock Divider and 2X Multiplier Package Outline and Package Dimensions 8 pin SOIC E Pin 1 H Symbol A b D E H e h Q Inches Min Max 0.055 0.068 0.013 0.019 0.185 0.200 0.150 0.160 0.225 0.245 .050 BSC 0.015 0.004 0.01 Millimeters Min Max 1.397 1.7272 0.330 0.483 4.699 5.080 3.810 4.064 5.715 6.223 1.27 BSC 0.381 0.102 0.254 D Q e b c h x 45 A Ordering Information Part/Order Number ICS543M ICS543MT Marking ICS543M ICS543M Package 8 pin SOIC 8 pin SOIC on tape and reel Temperature 0 to 70 C 0 to 70 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Ince. (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. ClockBlocks is a trademark of ICS 4 Revision 010599 Printed 12/4/00 Integrated Circuit Systems, Inc.*525 Race Street*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS 543 A |
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