Part Number Hot Search : 
C3372 K1536CT AD8804 DSPIC3 FST3135 4001B 448640 TA0706A
Product Description
Full Text Search
 

To Download MC33077 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 Order this document by MC33077/D
Dual, Low Noise Operational Amplifier
The MC33077 is a precision high quality, high frequency, low noise monolithic dual operational amplifier employing innovative bipolar design techniques. Precision matching coupled with a unique analog resistor trim technique is used to obtain low input offset voltages. Dual-doublet frequency compensation techniques are used to enhance the gain bandwidth product of the amplifier. In addition, the MC33077 offers low input noise voltage, low temperature coefficient of input offset voltage, high slew rate, high AC and DC open loop voltage gain and low supply current drain. The all NPN transistor output stage exhibits no deadband cross-over distortion, large output voltage swing, excellent phase and gain margins, low open loop output impedance and symmetrical source and sink AC frequency performance. The MC33077 is tested over the automotive temperature range and is available in plastic DIP and SO-8 packages (P and D suffixes).
MC33077
DUAL, LOW NOISE OPERATIONAL AMPLIFIER
SEMICONDUCTOR TECHNICAL DATA
* * * * * * * * * * * * *
Low Voltage Noise: 4.4 nV/ Hz @ 1.0 kHz Low Input Offset Voltage: 0.2 mV Low TC of Input Offset Voltage: 2.0 V/C High Gain Bandwidth Product: 37 MHz @ 100 kHz High AC Voltage Gain: 370 @ 100 kHz High AC Voltage Gain: 1850 @ 20 kHz Unity Gain Stable: with Capacitance Loads to 500 pF High Slew Rate: 11 V/s Low Total Harmonic Distortion: 0.007% Large Output Voltage Swing: +14 V to -14.7 V High DC Open Loop Voltage Gain: 400 k (112 dB) High Common Mode Rejection: 107 dB Low Power Supply Drain Current: 3.5 mA Dual Supply Operation: 2.5 V to 18 V
8 1
P SUFFIX PLASTIC PACKAGE CASE 626
8 1
D SUFFIX PLASTIC PACKAGE CASE 751 (SO-8)
PIN CONNECTIONS Representative Schematic Diagram (Each Amplifier)
R1 Q1 Bias Network R6 Q8 D3 C1 C3 R3 Q6 R9 Z1 Q11 Q14 D4 R13 Neg Q2 Q4 D1 Q1 R2 Q5 R4 D2 R7 R10 R12 R5 C2 Q10 Q7 Q9 Pos C6 Q12 R14 D7 C7 C8 Q20 D5 R15 VEE Q22 Device MC33077D MC33077P R19 Q16 R17 R18 Vout (Dual, Top View) D6 Q21 R8 R11 Q13 Q19 Inputs 1 3 2 VEE 4 + 5 - 6 Inputs 2 R16 Q17 2 + VCC Output 1 1 - 1 7 Output 2 8 VCC
J1
ORDERING INFORMATION
Operating Temperature Range TA = - 40 to +85C Package SO-8 Plastic DIP
R20
(c) Motorola, Inc. 1996
Rev 0
MOTOROLA ANALOG IC DEVICE DATA
1
MC33077
MAXIMUM RATINGS
Rating Supply Voltage (VCC to VEE) Input Differential Voltage Range Input Voltage Range Output Short Circuit Duration (Note 2) Maximum Junction Temperature Storage Temperature Maximum Power Dissipation Symbol VS VIDR VIR tSC TJ Tstg PD Value +36 (Note 1) (Note 1) Indefinite +150 -60 to +150 (Note 2) Unit V V V sec C C mW
NOTES: 1. Either or both input voltages should not exceed VCC or VEE (See Applications Information). 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (See power dissipation performance characteristic, Figure 1).
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted.)
Characteristics Input Offset Voltage (RS = 10 , VCM = 0 V, VO = 0 V) TA = +25C TA = -40 to +85C Average Temperature Coefficient of Input Offset Voltage RS = 10 , VCM = 0 V, VO = 0 V, TA = -40 to +85C Input Bias Current (VCM = 0 V, VO = 0 V) TA = +25C TA = -40 to +85C Input Offset Current (VCM = 0 V, VO = 0 V) TA = +25C TA = -40 to +85C Common Mode Input Voltage Range (VIO ,= 5.0 mV, VO = 0 V) Large Signal Voltage Gain (VO = 1.0 V, RL = 2.0 k) TA = +25C TA = -40 to +85C Output Voltage Swing (VID = 1.0 V) RL = 2.0 k RL = 2.0 k RL = 10 k RL = 10 k Common Mode Rejection (Vin = 13 V) Power Supply Rejection (Note 3) VCC/VEE = +15 V/ -15 V to +5.0 V/ -5.0 V Output Short Circuit Current (VID = 1.0 V, Output to Ground) Source Sink Power Supply Current (VO = 0 V, All Amplifiers) TA = +25C TA = -40 to +85C
NOTE: 3. Measured with VCC and VEE simultaneously varied.
Symbol |VIO|
Min -- --
Typ 0.13 -- 2.0
Max 1.0 1.5 --
Unit mV
VIO/T IIB
--
V/C nA
-- -- IIO -- -- VICR AVOL 150 k 125 k VO+ VO - VO+ VO - CMR PSR ISC +10 -20 ID -- -- +13.0 -- +13.4 -- 85 80 13.5
280 -- 15 -- 14 400 k -- +13.6 -14.1 +14.0 -14.7 107 90
1000 1200 nA 180 240 -- -- -- V -- -13.5 -- -14.3 -- -- dB dB mA V V/V
+26 -33 3.5 --
+60 +60 mA 4.5 4.8
2
MOTOROLA ANALOG IC DEVICE DATA
MC33077
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted.)
Characteristics Slew Rate (Vin = -10 V to +10 V, RL = 2.0 k, CL = 100 pF, AV = +1.0) Gain Bandwidth Product (f = 100 kHz) AC Voltage Gain (RL = 2.0 k, VO = 0 V) f = 100 kHz f = 20 kHz Unity Gain Frequency (Open Loop) Gain Margin (RL = 2.0 k, CL = 10 pF) Phase Margin (RL = 2.0 k, CL = 10 pF) Channel Separation (f = 20 Hz to 20 kHz, RL = 2.0 k, VO = 10 Vpp) Power Bandwidth (VO = 27p-p, RL = 2.0 k, THD 1%) Distortion (RL = 2.0 k) AV = +1.0, f = 20 Hz to 20 kHz VO = 3.0 Vrms AV = 2000, f = 20 kHz VO = 2.0 Vpp VO = 10 Vpp AV = 4000, f = 100 kHz VO = 2.0 Vpp VO = 10 Vpp Open Loop Output Impedance (VO = 0 V, f = fU) Differential Input Resistance (VCM = 0 V) Differential Input Capacitance (VCM = 0 V) Equivalent Input Noise Voltage (RS = 100 ) f = 10 Hz f = 1.0 kHz Equivalent Input Noise Current (f = 1.0 kHz) f = 10 Hz f = 1.0 kHz Symbol SR GBW AVO -- -- fU Am m CS BWp THD -- -- -- -- -- |ZO| Rin Cin en -- -- in -- -- 1.3 0.6 -- -- 6.7 4.4 -- -- pA/ Hz -- -- -- 0.007 0.215 0.242 0.3.19 0.316 36 270 15 -- -- -- -- -- -- -- -- k pF nV/ Hz -- -- -- -- -- 370 1850 7.5 10 55 -120 200 -- -- -- -- -- -- -- MHz dB
Degrees
Min 8.0 25
Typ 11 37
Max -- --
Unit V/s MHz V/V
dB kHz %
PD(MAX) , MAXIMUM POWER DISSIPATION (mW)
Figure 1. Maximum Power Dissipation versus Temperature
2400 2000 1600 1200 800 MC33077D 400 0 -60 -40 -20 MC33077P I IB, INPUT BIAS CURRENT (nA) 800 VCM = 0 V TA = 25C 600
Figure 2. Input Bias Current versus Supply Voltage
400
200
0 0 20 40 60 80 100 120 140 160 180 0 2.5 5.0 7.5 10 12.5 15 17.5 20 TA, AMBIENT TEMPERATURE (C) VCC, |VEE|, SUPPLY VOLTAGE (V)
MOTOROLA ANALOG IC DEVICE DATA
3
MC33077
Figure 3. Input Bias Current versus Temperature
1000 I IB, INPUT BIAS CURRENT (nA) 800 600 400 200 0 -55 VCC = +15 V VEE = -15 V VCM = 0 V V IO , INPUT OFFSET VOLTAGE (mV) 1.0
Figure 4. Input Offset Voltage versus Temperature
0.5
0 VCC = +15 V VEE = -15 V RS = 10 VCM = 0 V AV = +1.0 -25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125
-0.5
-25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
-1.0 -55
600 I IB , INPUT BIAS CURRENT (nA) 500 400 300 200 100 0 -15 VCC = +15 V VEE = -15 V TA = 25C
V ICR , INPUT COMMON MODE VOTAGE RANGE (V)
Figure 5. Input Bias Current versus Common Mode Voltage
Figure 6. Input Common Mode Voltage Range versus Temperature
VCC 0.0 VCC -0.5 VCC -1.0 VCC -1.5 Input Voltage Range +VCM
VEE +1.5 VEE +1.0 VEE +0.5 VEE +0.0 -55
VCC = +3.0 V to +15 V VEE = -3.0 V to -15 V VIO = 5.0 mV VO = 0 V
-VCM -25 0 25 50 75 100 125
-10
-5.0
0
5.0
10
15
VCM, COMMON MODE VOLTAGE (V)
TA, AMBIENT TEMPERATURE (C)
Figure 7. Output Saturation Voltage versus Load Resistance to Ground
V sat , OUTPUT SATURATION VOLTAGE (V) VCC 0 VCC -2 -55C VCC -4 125C 125C VEE +4 VEE +2 VEE 0 0 25C -55C 0.5 1.0 1.5 2.0 2.5 RL, LOAD RESISTANCE TO GROUND (k) 3.0 25C VCC = +15 V VEE = -15 V |I SC |, OUTPUT SHORT CIRCUIT CURRENT (mA) 50
Figure 8. Output Short Circuit Current versus Temperature
VCC = +15 V VEE = -15 V VID = 1.0 V RL < 100
40
Sink
30 Source 20
10 -55
-25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
4
MOTOROLA ANALOG IC DEVICE DATA
MC33077
Figure 9. Supply Current versus Temperature
CMR, COMMON MODE REJECTION (dB) 5.0 I CC , SUPPLY CURRENT (mA) 4.0 3.0 2.0 1.0 0 -55 VCM = 0 V RL = VO = 0 V 120 100 80 60 40 20 VCC = +15 V VEE = -15 V VCM = 0 V VCM = 1.5 V TA = 25C 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M
VCM - ADM + VCM VO VO x ADM
Figure 10. Common Mode Rejection versus Frequency
15 V 5.0 V
CMR = 20Log
-25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
0 100
Figure 11. Power Supply Rejection versus Frequency
PSR, POWER SUPPLY REJECTION (dB) +PSR = 20Log 100 80 60 40 20 0 100 VCC = +15 V VEE = -15 V TA = 25C 1.0 k
- ADM +
Figure 12. Gain Bandwidth Product versus Supply Voltage
GBW, GAIN BANDWIDTH PRODUCT (MHz) 48 44 40 36 32 28 24 RL = 10 k CL = 0 pF f = 100 kHz TA = 25C
120
VO/ADM VCC
-PSR = 20Log
VO/ADM VEE
+PSR -PSR
VCC VO VEE
10 k f, FREQUENCY (Hz)
100 k
1.0 M
0
5
10
15
20
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 13. Gain Bandwidth Product versus Temperature
GBW, GAIN BANDWIDTH PRODUCT (MHz) 50 46 42 38 34 30 26 -55 VCC = +15 V VEE = -15 V f = 100 kHz RL = 10 k CL = 0 pF 20 15 VO,OUTPUT VOLTAGE (Vp ) 10 5.0 0 -5.0 -10 -15 -25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 -20 0
Figure 14. Maximum Output Voltage versus Supply Voltage
TA = 25C Vp + RL = 10 k RL = 2.0 k
Vp - RL = 2.0 k RL = 10 k 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 20
MOTOROLA ANALOG IC DEVICE DATA
5
MC33077
Figure 15. Output Voltage versus Frequency
30 VO, OUTPUT VOLTAGE (Vpp ) 25 20 15 10 5.0 0 100 VCC = +15 V VEE = -15 V RL = 2.0 k AV =+1.0 THD 1.0% TA = 25C 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M
AVOL , OPEN LOOP VOLTAGE GAIN (X1000 V/V)
Figure 16. Open Loop Voltage Gain versus Supply Voltage
1200 1000 800 600 400 200 0 0 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 20 RL = 2.0 k f = 10 Hz VO = 2/3 (VCC -VEE) TA = 25C
Figure 17. Open Loop Voltage Gain versus Temperature
A VOL , OPEN LOOP VOLTAGE GAIN (X1000 V/V) 600 550 500 450 400 350 300 -55 | Z O |, OUTPUT IMPEDANCE ( ) VCC = +15 V VEE = -15 V RL = 2.0 k f = 10 Hz VO = -10 V to +10 V 80 70 60 50 40 30 20 10 0 100
Figure 18. Output Impedance versus Frequency
VCC = +15 V VEE = -15 V VO = 0 V TA = 25C
AV = 10 AV = 1000 AV = 100 AV = 1.0 10 M
-25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
1.0 k
10 k 100 k f, FREQUENCY (Hz)
1.0 M
Figure 19. Channel Separation versus Frequency
THD, TOTAL HARMONIC DISTORTION (%) 160 CS, CHANNEL SEPARATION (dB) 150 140 130 120 110 100 10 VOD Vin 100 k
Vin
Figure 20. Total Harmonic Distortion versus Frequency
1.0 VCC = +15 V VO = 2.0 Vpp VEE = -15 V TA = 25C 0.1 AV = +1000 AV = +100 AV = +10
100 k 2.0 k VO
- +
VO
Measurement Channel
Drive Channel VCC = +15 V VEE = -15 V RL = 2.0 k VOD = 20 Vpp TA = 25C
0.01
RA Vin
- +
AV = +1.0
CS = 20 Log 100 1.0 k f, FREQUENCY (Hz) 10 k
0.001 10
100
1.0 k f, FREQUENCY (Hz)
10 k
100 k
6
MOTOROLA ANALOG IC DEVICE DATA
MC33077
Figure 21. Total Harmonic Distortion versus Frequency
THD, TOTAL HARMONIC DISTORTION (%) VCC = +15 V VEE = -15 V V0 = -10 Vpp TA = 25C THD, TOTAL HARMONIC DISTORTION (%) 1.0
100 k RA Vin - + 2.0 k VO
Figure 22. Total Harmonic Distortion versus Output Voltage
1.0 0.5 0.1 0.05 AV = +100 0.01 0.005 AV = +1.0 0.001 0 2.0 4.0 6.0 8.0 VO, OUTPUT VOLTAGE (Vpp) 10 12 AV = +10 VCC = +15 V VEE = -15 V f = 20 kHz TA = 25C AV = +1000
100 k RA Vin - + 2.0 k VO
0.1
AV = +1000 AV = +100 0.01 AV = +10 AV = +1.0 0.001
10
100
1.0 k f, FREQUENCY (Hz)
10 k
100 k
Figure 23. Slew Rate versus Supply Voltage
16 Vin = 2/3 (VCC -VEE) TA = 25C SR, SLEW RATE (V/ s) SR, SLEW RATE (V/ s) 12 30 40
Figure 24. Slew Rate versus Temperature
VCC = +15 V VEE = -15 V Vin = 20 V
- Vin + 2.0 k VO 100 pF
8.0
- Vin VO 100 pF
20
4.0
+ 2.0 k
10
0 0 2.5 5.0 7.5 10 12.5 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 17.5 20
0 -55
-25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
Figure 25. Voltage Gain and Phase versus Frequency
A VOL , OPEN-LOOP VOLTAGE GAIN (dB) 180 140 100 60 20 -20 -60 10 VCC = +15 V VEE = -15 V RL = 2.0 k TA = 25C A m , OPEN LOOP GAIN MARGIN (dB) 0 40 80 120 160 200 240 100 M , EXCESS PHASE (DEGREES) 14
Figure 26. Open Loop Gain Margin and Phase Margin versus Output Load Capacitance
0
Vin + 2.0 k VO CL
12 10 8.0 -55C 6.0 4.0 2.0 0 1.0 125C -55C 25C
10 20 30 Phase 40 Gain 50 60 70 1000
Phase Gain
25C
VCC = +15 V VEE = -15 V VO = 0 V
100
1.0 k
10 k 100 k 1.0 M f, FREQUENCY (Hz)
10 M
10 100 CL, OUTPUT LOAD CAPACITANCE (pF)
MOTOROLA ANALOG IC DEVICE DATA
m , PHASE MARGIN (DEGREES)
125C
-
7
MC33077
Figure 27. Phase Margin versus Output Voltage
70 m , PHASE MARGIN (DEGREES) 60 50 40 30 20 10 0 -10 -5.0 VCC = +15 V VEE = -15 V TA = 25C CL = 300 pF CL = 500 pF
Vin - + 2.0k VO CL
Figure 28. Overshoot versus Output Load Capacitance
100
-
CL = 0 pF os, OVERSHOOT (%) CL = 100 pF
80 60 40 20
Vin
+ 2.0 k
VO 100 pF
VCC = +15 V VEE = -15 V Vin = 100 mV
125C and 25C 0 10 1 10
-55C 100 1000
0 5.0 VO, OUTPUT VOLTAGE (V)
CL, OUTPUT LOAD CAPACITANCE (pF)
e n , INPUT REFERRED NOISE VOLTAGE ( nV/ Hz )
100 50 30 20 10 Current 5.0 3.0 2.0 1.0 1.0 Voltage VCC = +15 V VEE = -15 V TA = 25C
10 5.0 3.0 2.0 1.0 0.5 0.3 0.2 0.1 100 k
V n , TOTAL REFERRED NOISE VOLTAGE (nV/ Hz ) V
Figure 29. Input Referred Noise Voltage and Current versus Frequency
i n ,INPUT REFERRED NOISE CURRENT (pA)
Figure 30. Total Input Referred Noise Voltage versus Source Resistant
1000 VCC = +15 V f = 1.0 kHz VEE = -15 V TA = 25C Vn (total) = (inRs)2 en2
)
) 4KTRS
100
10
10
100 1.0 k f, FREQUENCY (Hz)
10 k
1.0
10
100
1.0 k 10 k 100 k RS, SOURCE RESISTANCE ()
1.0 M
Figure 31. Phase Margin and Gain Margin versus Differential Source Resistance
14 12 Am , GAIN MARGIN (dB) 10 8.0 6.0 4.0 2.0 0 1.0 10 100 1.0 k RT, DIFFERENTIAL SOURCE RESISTANCE ()
Vin R 1 R2 - + VO
Figure 32. Inverting Amplifer Slew Rate
0 VO , OUTPUT VOLTAGE (5.0 V/DIV) VCC = +15 V VEE = -15 V AV = -1.0 RL = 2.0 k CL = 100 pF TA = 25C
Gain
20 30 Phase VCC = +15 V VEE = -15 V RT = R1 + R2 VO = 0 V TA = 25C 40 50 60 70 10 k
m ,PHASE MARGIN (DEGREES)
10
t, TIME (2.0 s/DIV)
8
MOTOROLA ANALOG IC DEVICE DATA
MC33077
Figure 33. Noninverting Amplifier Slew Rate
VO , OUTPUT VOLTAGE (5.0 V/DIV) VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k CL = 100 pF TA = 25C VO , OUTPUT VOLTAGE (5.0 V/DIV)
Figure 34. Noninverting Amplifier Overshoot
CL = 100 pF VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k TA = 25C
CL = 0 pF
t, TIME (2.0 s/DIV)
t, TIME (200 ns/DIV)
Figure 35. Low Frequency Noise Voltage versus Time
e n , INPUT NOISE VOLTAGE (100nV/DIV)
VCC = +15 V VEE = -15 V BW = 0.1 Hz to 10 Hz TA = 25C See Noise Circuit (Figure 36) t, TIME (1.0 sec/DIV)
MOTOROLA ANALOG IC DEVICE DATA
9
MC33077
APPLICATIONS INFORMATION
The MC33077 is designed primarily for its low noise, low offset voltage, high gain bandwidth product and large output swing characteristics. Its outstanding high frequency gain/phase performance make it a very attractive amplifier for high quality preamps, instrumentation amps, active filters and other applications requiring precision quality characteristics. The MC33077 utilizes high frequency lateral PNP input transistors in a low noise bipolar differential stage driving a compensated Miller integration amplifier. Dual-doublet frequency compensation techniques are used to enhance the gain bandwidth product. The output stage uses an all NPN transistor design which provides greater output voltage swing and improved frequency performance over more conventional stages by using both PNP and NPN transistors (Class AB). This combination produces an amplifier with superior characteristics. Through precision component matching and innovative current mirror design, a lower than normal temperature coefficient of input offset voltage (2.0 V/C as opposed to 10 V/C), as well as low input offset voltage, is accomplished. The minimum common mode input range is from 1.5 V below the positive rail (VCC) to 1.5 V above the negative rail (VEE). The inputs will typically common mode to within 1.0 V of both negative and positive rails though degradation in offset voltage and gain will be experienced as the common mode voltage nears either supply rail. In practice, though not recommended, the input voltage may exceed VCC by approximately 30 V and decrease below the VEE by approximately 0.6 V without causing permanent damage to the device. If the input voltage on either or both inputs is less than approximately 0.6 V, excessive current may flow, if not limited, causing permanent damage to the device. The amplifier will not latch with input source currents up to 20 mA, though in practice, source currents should be limited to 5.0 mA to avoid any parametric damage to the device. If both inputs exceed VCC, the output will be in the high state and phase reversal may occur. No phase reversal will occur if the voltage on one input is within the common mode range and the voltage on the other input exceeds VCC. Phase reversal may occur if the input voltage on either or both inputs is less than 1.0 V above the negative rail. Phase reversal will be experienced if the voltage on either or both inputs is less than VEE. Through the use of dual-doublet frequency compensation techniques, the gain bandwidth product has been greatly enhanced over other amplifiers using the conventional single pole compensation. The phase and gain error of the amplifier remains low to higher frequencies for fixed amplifier gain configurations. With the all NPN output stage, there is minimal swing loss to the supply rails, producing superior output swing, no crossover distortion and improved output phase symmetry with output voltage excursions (output phase symmetry being the amplifiers ability to maintain a constant phase relation independent of its output voltage swing). Output phase symmetry degradation in the more conventional PNP and NPN transistor output stage was primarily due to the inherent cut-off frequency mismatch of the PNP and NPN transistors used (typically 10 MHz and 300 MHz, respectively), causing considerable phase change to occur as the output voltage changes. By eliminating the PNP in the output, such phase change has been avoided and a very significant improvement in output phase symmetry as well as output swing has been accomplished. The output swing improvement is most noticeable when operation is with lower supply voltages (typically 30% with 5.0 V supplies). With a 10 k load, the output of the amplifier can typically swing to within 1.0 V of the positive rail (VCC), and to within 0.3 V of the negative rail (VEE), producing a 28.7 Vpp signal from 15 V supplies. Output voltage swing can be further improved by using an output pull-up resistor referenced to the VCC. Where output signals are referenced to the positive supply rail, the pull-up resistor will pull the output to VCC during the positive swing, and during the negative swing, the NPN output transistor collector will pull the output very near VEE. This configuration will produce the maximum attainable output signal from given supply voltages. The value of load resistance used should be much less than any feedback resistance to avoid excess loading and allow easy pull-up of the output. Output impedance of the amplifier is typically less than 50 at frequencies less than the unity gain crossover frequency (see Figure 18). The amplifier is unity gain stable with output capacitance loads up to 500 pF at full output swing over the -55 to +125C temperature range. Output phase symmetry is excellent with typically 4C total phase change over a 20 V output excursion at 25C with a 2.0 k and 100 pF load. With a 2.0 k resistive load and no capacitance loading, the total phase change is approximately one degree for the same 20 V output excursion. With a 2.0 k and 500 pF load at 125C, the total phase change is typically only 10C for a 20 V output excursion (see Figure 27). As with all amplifiers, care should be exercised to insure that one does not create a pole at the input of the amplifier which is near the closed loop corner frequency. This becomes a greater concern when using high frequency amplifiers since it is very easy to create such a pole with relatively small values of resistance on the inputs. If this does
10
MOTOROLA ANALOG IC DEVICE DATA
MC33077
occur, the amplifier's phase will degrade severely causing the amplifier to become unstable. Effective source resistances, acting in conjunction with the input capacitance of the amplifier, should be kept to a minimum to avoid creating such a pole at the input (see Figure 31). There is minimal effect on stability where the created input pole is much greater than the closed loop corner frequency. Where amplifier stability is affected as a result of a negative feedback resistor in conjunction with the amplifier's input capacitance, creating a pole near the closed loop corner frequency, lead capacitor compensation techniques (lead capacitor in parallel with the feedback resistor) can be employed to improve stability. The feedback resistor and lead capacitor RC time constant should be larger than that of the uncompensated input pole frequency. Having a high resistance connected to the noninverting input of the amplifier can create a like instability problem. Compensation for this condition can be accomplished by adding a lead capacitor in parallel with the noninverting input resistor of such a value as to make the RC time constant larger than the RC time constant of the uncompensated input resistor acting in conjunction with the amplifiers input capacitance. For optimum frequency performance and stability, careful component placement and printed circuit board layout should be exercised. For example, long unshielded input or output leads may result in unwanted input output coupling. In order to reduce the input capacitance, the body of resistors connected to the input pins should be physically close to the input pins. This not only minimizes the input pole creation for optimum frequency response, but also minimizes extraneous signal "pickup" at this node. Power supplies should be decoupled with adequate capacitance as close as possible to the device supply pin. In addition to amplifier stability considerations, input source resistance values should be low to take full advantage of the low noise characteristics of the amplifier. Thermal noise (Johnson Noise) of a resistor is generated by thermally-charged carriers randomly moving within the resistor creating a voltage. The rms thermal noise voltage in a resistor can be calculated from: Enr = / 4k TR x BW where: k = Boltzmann's Constant (1.38 x 10-23 joules/k) T = Kelvin temperature R = Resistance in ohms BW = Upper and lower frequency limit in Hertz. By way of reference, a 1.0 k resistor at 25C will produce a 4.0 nV/ Hz of rms noise voltage. If this resistor is connected to the input of the amplifier, the noise voltage will be gained-up in accordance to the amplifier's gain configuration. For this reason, the selection of input source resistance for low noise circuit applications warrants serious consideration. The total noise of the amplifier, as referred to its inputs, is typically only 4.4 nV/ Hz at 1.0 kHz. The output of any one amplifier is current limited and thus protected from a direct short to ground, However, under such conditions, it is important not to allow the amplifier to exceed the maximum junction temperature rating. Typically for 15 V supplies, any one output can be shorted continuously to ground without exceeding the temperature rating.
Figure 36. Voltage Noise Test Circuit (0.1 Hz to 10 Hzp-p)
0.1 F
10
100 k - D.U.T. + 2.0 k 4.7 F +
1/2
4.3 k
22 F Scope x1 Rin = 1.0 M
MC33077 - 100 k 2.2 F 24.3 k 0.1 F
Voltage Gain = 50,000
110 k
Note: All capacitors are non-polarized.
MOTOROLA ANALOG IC DEVICE DATA
11
MC33077
OUTLINE DIMENSIONS
P SUFFIX PLASTIC PACKAGE CASE 626-05 ISSUE K -B-
1 4
8
5
NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --- 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --- 10_ 0.030 0.040
F
NOTE 2
-A- L
C -T-
SEATING PLANE
J N D K
M
M
H
G 0.13 (0.005) TA
M
B
M
A
8
D
5
D SUFFIX PLASTIC PACKAGE CASE 751-05 (SO-8) ISSUE R C H 0.25
M
E
1 4
B
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.18 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_
B C
e A
SEATING PLANE
h
X 45 _
q
0.10 A1 0.25 B
M
L CB
S
A
S
q
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
12
MOTOROLA ANALOG IC DEVICE DATA MC33077/D
*MC33077/D*


▲Up To Search▲   

 
Price & Availability of MC33077

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X