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 19-4802; Rev 0; 7/00
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
General Description
The MAX9111/MAX9113 single/dual low-voltage differential signaling (LVDS) receivers are designed for highspeed applications requiring minimum power consumption, space, and noise. Both devices support switching rates exceeding 500Mbps while operating from a single +3.3V supply, and feature ultra-low 300ps (max) pulse skew required for high-resolution imaging applications such as laser printers and digital copiers. The MAX9111 is a single LVDS receiver, and the MAX9113 is a dual LVDS receiver. Both devices conform to the EIA/TIA-644 LVDS standard and convert LVDS to LVTTL/CMOS-compatible outputs. A fail-safe feature sets the outputs high when the inputs are undriven and open, terminated, or shorted. The MAX9111/MAX9113 are available in space-saving 8-pin SOT23 and SO packages. Refer to the MAX9110/ MAX9112 data sheet for single/dual LVDS line drivers.
Features
o Low 300ps (max) Pulse Skew for High-Resolution Imaging and High-Speed Interconnect o Space-Saving 8-Pin SOT23 and SO Packages o Pin-Compatible Upgrades to DS90LV018A and DS90LV028A (SO Packages Only) o Guaranteed 500Mbps Data Rate o Low 29mW Power Dissipation at 3.3V o Conform to EIA/TIA-644 Standard o Single +3.3V Supply o Flow-Through Pinout Simplifies PC Board Layout o Fail-Safe Circuit Sets Output High for Undriven Inputs o High-Impedance LVDS Inputs when Powered Off
MAX9111/MAX9113
________________________Applications
Laser Printers Digital Copiers Cellular Phone Base Stations Telecom Switching Equipment Network Switches/Routers LCD Displays Backplane Interconnect Clock Distribution
PART MAX9111EKA MAX9111ESA MAX9113EKA MAX9113ESA
Ordering Information
TEMP. RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 8 SOT23 8 SO 8 SOT23 8 SO TOP MARK AAEE -- AAED --
Typical Operating Circuit appears at end of data sheet.
Pin Configurations/Functional Diagrams/Truth Table
MAX9111
IN- 1 IN+ N.C. 2 3 8 7 6 5 VCC OUT N.C. GND VCC GND OUT N.C. 1 2 3
MAX9111
8 7 6 ININ+ IN1- 1 IN1+ 2 3
MAX9113
8 7 6 5 VCC OUT1 VCC GND 1 2 3
MAX9113
8 7 6 5 IN1IN1+ IN2+ IN2-
N.C. IN2+
OUT2 OUT1 GND
MAX9111
N.C. 4 4 5 N.C. IN2- 4 OUT2 4
SO
SOT23
(IN_+) - (IN_-) 100mV -100mV OPEN SHORT 100 PARALLEL TERMINATION (UNDRIVEN) OUT_ H L H H H
SO
SOT23
H = LOGIC LEVEL HIGH L = LOGIC LEVEL LOW
________________________________________________________________ Maxim Integrated Products
1
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9111/MAX9113
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +4V IN_ _ to GND .........................................................-0.3V to +3.9V OUT_ _ to GND...........................................-0.3V to (VCC + 0.3V) ESD Protection All Pins (Human Body Model, IN_+, IN_-) ..................................11kV Continuous Power Dissipation (TA = +70C) 8-Pin SOT23 (derate 7.52mW/C above +70C)..........602mW 8-Pin SO (derate 5.88mWC above +70C).................471mW Operating Temperature Ranges MAX911_E .......................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, magnitude of input voltage, |VID| = +0.1V to +1.0V, VCM = |VID|/2 to (2.4V - (|VID|/2)), TA = -40C to +85C. Typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.) (Notes 1, 2)
PARAMETER Differential Input High Threshold (Note 3) Differential Input Low Threshold (Note 3) Differential Input Resistance SYMBOL VTH VTL RDIFF CONDITIONS VCM = 0.05V, 1.2V, 2.75V at 3.3V VCM = 0.05V, 1.2V, 2.75V at 3.3V VCM = 0.2V or 2.2V, VID = 0.4V, VCC = 0 or 3.6V VID = +200mV Inputs shorted, undriven Output High Voltage (OUT_) VOH IOH = -4mA 100 parallel termination, undriven Output Low Voltage (OUT_) Output Short-Circuit Current No-Load Supply Current VOL IOS ICC IOL = 4mA, VID = -200mV VID = +200mV, VOUT_ = 0 Inputs open MAX9111 MAX9113 4.2 8.7 2.7 0.4 -100 6 11 mA mA -100 5 2.7 2.7 V 18 MIN TYP MAX 100 UNITS mV mV k
2
_______________________________________________________________________________________
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
SWITCHING CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA = -40C to +85C. Typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.) (Notes 4, 5, 6)
PARAMETER Differential Propagation Delay High to Low Differential Propagation Delay Low to High Differential Pulse Skew |tPLHD -tPHLD| (Note 7) Differential Channel-to-Channel Skew; Same Device (MAX9113 only) (Note 8) Differential Part-to-Part Skew (Note 9) Differential Part-to-Part Skew (MAX9113 only) (Note 10) Rise Time Fall Time Maximum Operating Frequency SYMBOL tPHLD tPLHD tSKD1 CL = 15pF, VID = 200mV, V CM = 1.2V, Figures 1, 2 CONDITIONS MIN 1 1 TYP 1.77 1.68 90 MAX 2.5 2.5 300 UNITS ns ns ps
MAX9111/MAX9113
tSKD2
140
400
ps
tSKD3 tSKD4 tTLH tTHL fMAX All channels switching, CL =15pF, VOL (max) = 0.4V, VOH (min) = 2.7V, 40% < duty cycle < 60% (Note 6) 250 0.6 0.6 300
1 1.5 0.8 0.8
ns ns ns ns MHz
Note 1: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production tested at TA = +25C. Note 2: Current into the device is defined as positive. Current out of the devices is defined as negative. All voltages are referenced to ground except VTH and VTL. Note 3: Guaranteed by design, not production tested. Note 4: AC parameters are guaranteed by design and characterization. Note 5: CL includes probe and test jig capacitance. Note 6: fMAX generator output conditions: tR = tF < 1ns (0% to 100%), 50% duty cycle, VOH = 1.3V, VOL = 1.1V. Note 7: tSKD1 is the magnitude difference of differential propagation delays in a channel. tSKD1 = |tPLHD - tPHLD|. Note 8: tSKD2 is the magnitude difference of the tPLHD or tPHLD of one channel and the tPLHD or tPHLD of the other channel on the same device. Note 9: tSKD3 is the magnitude difference of any differential propagation delays between devices at the same VCC and within 5C of each other. Note 10: tSKD4, is the magnitude difference of any differential propagation delays between devices operating over the rated supply and temperature ranges.
_______________________________________________________________________________________
3
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9111/MAX9113
Test Circuit Diagrams
IN_+ GENERATOR IN_R CL 50 50 OUT_
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
IN_0V DIFFERENTIAL IN_+ tPLHD 80% 50% OUT_ 20% tTLH tPHLD 80% VID = 200mV +1.2V
+1.3V
+1.1V VOH 50% 20% VOL tTHL
Figure 2. Receiver Propagation Delay and Transition Time Waveforms
4
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Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
Typical Operating Characteristics
(VCC = 3.3V, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, CL = 15pF, TA = +25C and over recommended operating conditions unless otherwise specified.)
OUTPUT HIGH VOLTAGE vs. SUPPLY VOLTAGE
3.7 3.6 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 3.0
MAX9111 toc01
MAX9111/MAX9113
OUTPUT LOW VOLTAGE vs. SUPPLY VOLTAGE
OUTPUT SHORT-CIRCUIT CURRENT (mA) IOUT_ = 4mA OUTPUT LOW VOLTAGE (mV) 120
MAX9111 toc02
OUTPUT SHORT-CIRCUIT CURRENT vs. SUPPLY VOLTAGE
VID = 200mV 78 73 68 63 58 53 48
MAX9111 toc03
130
83
IOUT_ = 4mA
OUTPUT HIGH VOLTAGE (V)
110
100
90 3.1 3.2 3.3 3.4 3.5 3.6 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
DIFFERENTIAL THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE
MAX9111 toc04
MAX9113 POWER-SUPPLY CURRENT vs. FREQUENCY
MAX9111 toc05
POWER-SUPPLY CURRENT vs. TEMPERATURE
7.7 7.6 7.5 7.4 7.3 7.2 7.1 7.0 6.9 6.8 6.7 6.6 6.5 -40 fIN = 1MHz BOTH CHANNELS SWITCHING
MAX9111 toc06
24 DIFFERENTIAL THRESHOLD VOLTAGE (mV)
60 POWER-SUPPLY CURRENT (mA) 50 40 30 20 10 ONE SWITCHING 0 0.01 BOTH CHANNELS SWITCHING
22
20
LOW-HIGH
18 HIGH-LOW 16
14 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V)
0.1
1
10
100
1000
POWER-SUPPLY CURRENT (mA)
-15
10
35
60
85
FREQUENCY (MHz)
TEMPERATURE (C)
DIFFERENTIAL PROPAGATION DELAY vs. SUPPLY VOLTAGE
DIFFERENTIAL PROPAGATION DELAY (ns) DIFFERENTIAL PROPAGATION DELAY (ns) 2.10 2.05 2.00 1.95 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50 3.0 3.1 tPLHD 2.20 2.15 2.10 2.05 2.00 1.95 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50
MAX9111 toc07
DIFFERENTIAL PROPAGATION DELAY vs. TEMPERATURE
MAX9111 toc08
DIFFERENTIAL PULSE SKEW vs. SUPPLY VOLTAGE
MAX9111 toc09
120
tPHLD
tPHLD
DIFFERENTIAL SKEW (ns) tPLHD 35 60 85
100
80
60
40 -40 -15 10 3.0 3.1 TEMPERATURE (C) 3.2 3.3 3.4 SUPPLY VOLTAGE (V) 3.5 3.6
3.2 3.3 3.4 SUPPLY VOLTAGE (V)
3.5
3.6
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5
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9111/MAX9113
Typical Operating Characteristics (continued)
(VCC = 3.3V, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, CL = 15pF, TA = +25C and over recommended operating conditions, unless otherwise specified.)
DIFFERENTIAL PULSE SKEW vs. TEMPERATURE
MAX9111 toc10
DIFFERENTIAL PROPAGATION DELAY vs. DIFFERENTIAL INPUT VOLTAGE
MAX9111 toc11
DIFFERENTIAL PROPAGATION DELAY vs. COMMON-MODE VOLTAGE
DIFFERENTIAL PROPAGATION DELAY (ns) fIN = 20MHz
MAX91111 toc12
250
3.0 DIFFERENTIAL PROPAGATION DELAY (ns) 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0 500 1000 1500 2000 tPLHD tPHLD fIN = 20MHz
2.2 2.1 2.0 1.9
DIFFERENTIAL SKEW (ps)
200
150
100
tPHLD 1.8 1.7 tPLHD 1.6 0 0.5 1.0 1.5 2.0 2.5 3.0
50
0 -40 -15 10 35 60 85 TEMPERATURE (C)
2500
DIFFERENTIAL INPUT VOLTAGE (mV)
COMMON-MODE VOLTAGE (V)
TRANSITION TIME vs. TEMPERATURE
MAX9111 toc14
DIFFERENTIAL PROPAGATION DELAY vs. LOAD
DIFFERENTIAL PROPAGATION DELAY (ns) 2.9 2.7 2.5 2.3 2.1 1.9 1.7 1.5 10 15 20 25 30 35 40 45 50 tPLHD tPHLD
MAX9111 toc15
680 630 TRANSITION TIME (ps) 580 530 480 430 380 330 -40 -15 10 35 60 tTLH tTHL
3.1
85
TEMPERATURE (C)
LOAD (pF)
TRANSITION TIME vs. LOAD
2200
MAX9111 toc16
TRANSITION TIME (ps)
1800 tTHL 1400 1000 600 200 10 15 20 25 30 35 40 45 50 LOAD (pF) tTLH
6
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Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
Pin Description
PIN MAX9111 SOT23-8 1 2 8 7 -- -- 3 -- 4, 5, 6 SO-8 8 5 1 2 -- -- 7 -- 3, 4, 6 MAX9113 SOT23-8 1 2 8 7 5 6 3 4 -- SO-8 8 5 1 2 4 3 7 6 -- VCC GND IN-/IN1IN+/IN1+ IN2IN2+ OUT/OUT1 OUT2 N.C. Power Supply Ground Receiver Inverting Differential Input Receiver Noninverting Differential Input Receiver Inverting Differential Input Receiver Noninverting Differential Input Receiver Output Receiver Output No Connection. Not internally connected. NAME FUNCTION
MAX9111/MAX9113
_______________Detailed Description
LVDS Inputs
The MAX9111/MAX9113 feature LVDS inputs for interfacing high-speed digital circuitry. The LVDS interface standard is a signaling method intended for point-topoint communication over a controlled impedance media, as defined by the ANSI/EIA/TIA-644 standards. The technology uses low-voltage signals to achieve fast transition times, minimize power dissipation, and noise immunity. Receivers such as the MAX9111/MAX9113 convert LVDS signals to CMOS/LVTTL signals at rates in excess of 500Mbps. The devices are capable of detecting differential signals as low as 100mV and as high as 1V within a 0V to 2.4V input voltage range . The LVDS standard specifies an input voltage range of 0 to 2.4V referenced to ground.
ESD Protection
As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The receiver inputs of the MAX9111/MAX9113 have extra protection against static electricity. Maxim's engineers have developed state-of-the-art structures to protect these pins against ESD of 11kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. ESD protection can be tested in various ways; the receiver inputs of this product family are characterized for protection to the limit of 11kV using the Human Body Model. Human Body Model Figure 3a shows the Human Body Model, and Figure 3b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5k resistor.
Fail-Safe
The fail-safe feature sets the output to a high state when the inputs are undriven and open, terminated, or shorted. When using one channel in the MAX9113, leave the unused channel open.
_______________________________________________________________________________________
7
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9111/MAX9113
RC 1M CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1500 DISCHARGE RESISTANCE DEVICE UNDER TEST IP 100% 90% AMPERES Cs 100pF STORAGE CAPACITOR 36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
Figure 3a. Human Body ESD Test Modules
Figure 3b. Human Body Current Waveform
__________ Applications Information
Supply Bypassing
Bypass VCC with high-frequency surface-mount ceramic 0.1F and 0.001F capacitors in parallel, as close to the device as possible, with the 0.001F valued capacitor the closest to the device. For additional supply bypassing, place a 10F tantalum or ceramic capacitor at the point where power enters the circuit board.
Termination
Termination resistors should match the differential characteristic impedance of the transmission line. Because the MAX9111/MAX9113 are current steering devices, an output voltage will not be generated without a termination resistor. Output voltage levels depend upon the value of the termination resistor. Resistance values may range from 75 to 150. Minimize the distance between the termination resistor and receiver inputs. Use a single 1% to 2% surfacemount resistor across the receiver inputs.
Differential Traces
Output trace characteristics affect the performance of the MAX9111/MAX9113. Use controlled impedance traces to match trace impedance to both transmission medium impedance and the termination resistor. Eliminate reflections and ensure that noise couples as common mode by running the differential traces close together. Reduce skew by matching the electrical length of the traces. Excessive skew can result in a degradation of magnetic field cancellation. Maintain the distance between the differential traces to avoid discontinuities in differential impedance. Avoid 90 turns and minimize the number of vias to further prevent impedance discontinuities.
Board Layout
For LVDS applications, a four-layer PC board that provides separate power, ground, LVDS signals, and input signals is recommended. Isolate the input and LVDS signals from each other to prevent coupling. For best results, separate the input and LVDS signal planes with the power and ground planes.
Cables and Connectors
Transmission media should have a differential characteristic impedance of about 100. Use cables and connectors that have matched impedance to minimize impedance discontinuities. Avoid the use of unbalanced cables such as ribbon or simple coaxial cable. Balanced cables such as twisted pair offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables tend to pick up noise as common mode, which is rejected by the LVDS receiver.
8
_______________________________________________________________________________________
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
Typical Operating Circuit
+3.3V 0.001F 0.1F +3.3V 0.001F 0.1F
MAX9111/MAX9113
DIN_
DRIVER
RT = 100
RECEIVER
OUT_
LVDS
MAX9110 MAX9112
MAX9111 MAX9113
Chip Information
TRANSISTOR COUNT: MAX9111: 675 MAX9113: 675 PROCESS: CMOS
_______________________________________________________________________________________
9
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9111/MAX9113
Package Information
SOT23, 8L.EPS
10
______________________________________________________________________________________
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
Package Information (continued)
SOICN.EPS
MAX9111/MAX9113
______________________________________________________________________________________
11
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9111/MAX9113
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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