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19-1085; Rev 1; 10/96 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface ________________General Description The MAX1601/MAX1604 DC power-switching ICs contain a network of low-resistance MOSFET switches that deliver selectable VCC and VPP voltages to two CardBus or PC Card host sockets. Key features include ultra-low-resistance switches, small packaging, softswitching action, and compliance with PCMCIA specifications for 3V/5V switching. 3.3V-only power switching for fast, 32-bit CardBus applications is supported in two ways: stiff, low-resistance 3.3V switches allow high 3.3V load currents (up to 1A); and completely independent internal charge pumps let the 3.3V switch operate normally, even if the +5V and +12V supplies are disconnected or turned off to conserve power. The internal charge pumps are regulating types that draw reduced input current when the VCC switches are static. Also, power consumption is automatically reduced to 10A max when the switches are programmed to high-Z or GND states over the serial interface, unlike other solutions that may require a separate shutdown-control input. Other key features include guaranteed specifications for output current limit level, and guaranteed specifications for output rise/fall times (in compliance with PCMCIA specifications). Reliability is enhanced by thermal-overload protection, accurate current limiting, an overcurrent-fault flag output, undervoltage lockout, and extra ESD protection at the VCC/VPP outputs. The SMBus serial interface is flexible, and can tolerate logic input levels in excess of the positive supply rail. The MAX1604 and MAX1601 are identical, except for the MAX1604's VY switch, which has roughly threetimes the on-resistance (typically 140m ).The MAX1601/MAX1604 fit two complete CardBus/PCMCIA switches into a space-saving, narrow (0.2in. or 5mm wide) SSOP package. ____________________________Features o Supports Two CardBus Sockets o 1A, 0.08 Max VY VCC Switch (MAX1601 only) 1A, 0.14 Max VX VCC Switch o Soft Switching for Low Inrush Surge Current o Overcurrent Protection o Overcurrent/Thermal-Fault Flag Output o Thermal Shutdown at Tj = +150C o Independent Internal Charge Pumps o Break-Before-Make Switching Action o 10A Max Standby Supply Current o 5V and 12V Not Required for Low-RDS(ON) 3.3V Switching o Complies with PCMCIA 3V/5V Switching Specifications o Super-Small, 28-Pin SSOP Package (0.2in. or 5mm wide) o System Management Bus (SMBus) Serial Interface MAX1601/MAX1604 _______________Ordering Information PART MAX1601EAI MAX1604EAI TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 28 SSOP 28 SSOP __________Simplified Block Diagram 12IN VY VY VX VX VL VDD SMBCLK SMBDATA SMBSUS GND 12IN DECODE LOGIC ADDRESS SELECT OVERCURRENT AND THERMAL SHUTDOWN SMBALERT ADR VPPB VCCA VCCA VCCA VPPA ________________________Applications Desktop Computers Notebook Computers Docking Stations Handy-Terminals Data Loggers Digital Cameras Printers PCMCIA Read/Write Drives MAX1601/MAX1604 Pin Configuration appears on last page. VY VX VCCB VCCB VCCB SMBus is a trademark of Intel Corp. ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 ABSOLUTE MAXIMUM RATINGS Inputs/Outputs to GND (VL, VX, VY, VCCA, VCCB) (Note 1)........................-0.3V, +6V VPP Inputs/Outputs to GND (12INA, 12INB, VPPA, VPPB) (Note 1) ..................-0.3V, +15V Inputs and Outputs to GND (SMBCLK, SMBDATA, SMBSUS, SMBALERT) (Note 1) ..............................-0.3V, +6V ADR Input to GND ...........................................-0.3V, (VL + 0.3V) VCCA, VCCB Output Current (Note 2).....................................4A VPPA, VPPB Output Current (Note 2) ...............................250mA VCCA, VCCB Short Circuit to GND ............................Continuous VPPA, VPPB Short Circuit to GND..............................Continuous Continuous Power Dissipation (TA = +70C) SSOP (derate 9.52mW/C above +70C) ....................762mW Operating Temperature Range MAX1601EAI/MAX1604EAI .............................-40C to +85C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C Note 1: There are no parasitic diodes between any of these pins, so there are no power-up sequencing restrictions (for example, logic input signals can be applied even if all of the supply voltage inputs are grounded). Note 2: VCC and VPP outputs are internally current-limited to safe values. See the Electrical Characteristics table. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER POWER-SUPPLY SECTION Input Voltage Range VX, VY or VL 12INA, 12INB VL falling edge 12IN falling edge 12IN rising edge VX, VY falling edge Standby Supply Current VY Quiescent Supply Current VX Quiescent Supply Current 12IN_ Standby Supply Current 12IN_ Quiescent Supply Current VL Standby Supply Current VL Quiescent Supply Current VL Fall Rate VCC SWITCHES Operating Output Current Range On-Resistance, VY Switches VCCA or VCCB, VX = VY = 3V to 5.5V 12INA = 12INB = 0V to 13V, VY = 3V, VX = 0V to 5.5V, ISWITCH = 1A, TA = +25C MAX1601 MAX1604 0 0.06 0.14 0.10 1 0.08 0.24 0.14 A VX or VY, all switches 0V or high-Z, control inputs = 0V or VL, TA = +25C Any combination of VY switches on, control inputs = 0V or VL, no VCC loads Any combination of VX switches on, control inputs = 0V or high-Z, no VCC loads 12INA tied to 12INB, all switches 0V or high-Z, control inputs = 0V or VL, TA = +25C 12INA tied to 12INB, VPPA and VPPB 12V switches on, control inputs = 0V or VL, no VPP loads All switches 0V or high-Z, control inputs = 0V or VL, TA = +25C Any combination of switches on When using VL as shutdown pin (Note 3) 15 4 25 20 20 3.0 11 2.4 1.8 5 1.4 5.5 13 2.8 10 2.8 1 100 100 1 100 10 150 0.05 A A A A A A A V/s V CONDITIONS MIN TYP MAX UNITS 2.5 3.0 8 2.5 Undervoltage Lockout Threshold V On-Resistance, VX Switches 12INA = 12INB = 0V to 13V, VX = 4.5V, VY = 0V to 5.5V, ISWITCH = 1A, TA = +25C 2 _______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface ELECTRICAL CHARACTERISTICS (continued) (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Output Current Limit Output Sink Current Output Leakage Current Output Propagation Delay Plus Rise Time Output Rise Time Output Propagation Delay Plus Fall Time Output Fall Time VPP SWITCHES Operating Output Current Range On-Resistance, 12V Switches On-Resistance, VPP = VCC Switches Output Current Limit Output Sink Current Output Leakage Current Output Propagation Delay Plus Rise Time Output Rise Time Output Propagation Delay Plus Fall Time Output Fall Time INTERFACE AND LOGIC SECTION SMBALERT Signal Propagation Delay SMBALERT Output Low Voltage SMBALERT Output Leakage Current Thermal Shutdown Threshold Logic Input Low Voltage Logic Input High Voltage Logic Output Low Voltage VCC_ or VPP_, load step to SMBALERT output, 50% point to 50% point (Note 3) ISINK = 1mA, low state V SMBALERT = 5.5V, high state Hysteresis = +20C (Note 4) SMBSUS, SMBCLK, SMBDATA SMBSUS, SMBCLK, SMBDATA SMBDATA, ISINK = 4mA 2.2 0.4 -0.1 150 0.8 3 0.4 0.1 s V A C V V V VPPA or VPPB 12IN = 11.6V, ISWITCH = 100mA, TA = +25C Programmed to VX (5V) or VY (3.3V), TA = +25C VPPA or VPPB, programmed to 12V VPPA or VPPB < 0.4V, programmed to 0V state VPPA or VPPB forced to 0V, high-Z state, TA = +25C VPPA or VPPB, 0V to 12IN_, CL = 0.1F, 50% of input to 90% of output, TA = +25C VPPA or VPPB, 0V to 12IN_, CL = 0.1F, 10% to 90% points, TA = +25C VPPA or VPPB, 12IN_ to 0V, CL = 0.1F, 50% of input to 10% of output, TA = +25C VPPA or VPPB, 12IN_ to 0V, CL = 0.1F, 90% to 10% points 100 1.2 800 9 1 60 130 10 10 30 0 0.70 1 200 120 1 3 260 mA mA mA A ms s ms ms VCCA or VCCB VCCA or VCCB < 0.4V, programmed to 0V state VCCA or VCCB forced to 0V, high-Z state, TA = +25C VCCA or VCCB, 0V to VX or VY, CL = 30F, RL = 25, 50% of input to 90% of output, TA = +25C VCCA or VCCB, 0V to VX or VY, CL = 1F, RL = open circuit, 10% to 90% points, TA = +25C VCCA or VCCB, VX or VY to 0V, CL = 30F, RL = open circuit, 50% of input to 10% of output, TA = +25C VCCA or VCCB, VX or VY to 0V, CL = 1F, RL = 25, 90% to 10% points 100 2 1200 CONDITIONS MIN 1.2 20 10 10 TYP MAX 4.0 UNITS A mA A ms s MAX1601/MAX1604 60 100 ms 6 ms _______________________________________________________________________________________ 3 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 ELECTRICAL CHARACTERISTICS (continued) (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SMB Input Capacitance SMBCLK Clock Frequency SMBCLK Clock Low Time SMBCLK Clock High Time SMB Repeated Start-Condition Setup Time SMB Start-Condition Hold Time SMB Stop-Condition Setup Time SMB Data Valid to SMBCLK RisingEdge Time SMB Data Hold Time Bus Free Time ADR Input Low Voltage ADR Input High Voltage Logic Input Bias Current SCL Fall to SDA Valid (Master Clocking-In Data) Start-Condition Setup 4.7 ADR, SMBSUS, SMBCLK, SMBDATA 1.5 -1 100 1 1000 CONDITIONS SMBSUS, SMBCLK, SMBDATA SMBus spec = 10kHz min tLOW 10% to 10% points tHIGH 90% to 90% points tSU:STA 90% to 90% points tHD:STA 10% of SMBDATA to 90% of SMBCLK tSU:STO 90% of SMBCLK to 10% of SMBDATA tSU:DAT 10% or 90% of SMBDATA to 10% of SMBCLK tHD:DAT (Note 5) tBUF between start and stop conditions DC 4.7 4 250 4 4 500 0 4.7 0.6 MIN TYP 5 100 MAX UNITS pF kHz s s ns s s ns ns s V V A ns s Note 3: Not production tested. Note 4: Thermal limit not active in standby state (all switches programmed to GND or high-Z state). Note 5: A transition must internally provide at least a hold time in order to bridge the undefined region (300ns max) of the falling edge of SMBCLK. 4 _______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface ELECTRICAL CHARACTERISTICS (VL = VY = 3.3V, VX = 5V, 12INA = 12INB = 12V, TA = -40C to +85C, unless otherwise noted.) PARAMETER POWER-SUPPLY SECTION Input Voltage Range VX, VY or VL 12INA, 12INB VL falling edge, hysteresis = 1% 12IN falling edge 12IN rising edge VX, VY falling edge Standby Supply Current VY Quiescent Supply Current VX Quiescent Supply Current 12IN_ Standby Supply Current 12IN_ Quiescent Supply Current VL Standby Supply Current VL Quiescent Supply Current SMBALERT Output Low Voltage Logic Input Low Voltage Logic Input High Voltage Logic Output Low Voltage ADR Input Low Voltage ADR Input High Voltage 1.5 VX or VY, all switches 0V or high-Z, control inputs = 0V or VL Any combination of VY switches on, control inputs = 0V or VL, no VCC loads Any combination of VX switches on, control inputs = 0V or high-Z, no VCC loads 12INA tied to 12INB, all switches 0V or high-Z, control inputs = 0V or VL 12INA tied to 12INB, VPPA and VPPB 12V switches on, control inputs = 0V or VL, no VPP loads All switches 0V or high-Z, control inputs = 0V or VL Any combination of switches on ISINK = 1mA, low state SMBCLK, SMBDATA, SMBSUS SMBCLK, SMBDATA, SMBSUS SMBDATA, ISINK = 4mA 2.2 0.4 0.6 3.0 11 2.3 1.8 5 1.4 10 2.9 15 100 100 15 100 15 150 0.4 0.8 A A A A A A A V V 5.5 13 2.9 V CONDITIONS MIN TYP MAX UNITS MAX1601/MAX1604 Undervoltage Lockout Threshold V INTERFACE AND LOGIC SECTION V V V V _______________________________________________________________________________________ 5 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 __________________________________________Typical Operating Characteristics (VL = VY = 3.3V, VX = 5V, 12IN, TA = +25C, unless otherwise noted.) VCC_ SWITCHING (RISE) MAX1601/4 TOC-01 VCC_ SWITCHING (RISE) 3 VCC_ (V) 2 1 0 CONTROL 5 INPUT 0 (V) MAX1601/4 TOC-02 6 VCC_ (V) 4 2 0 CONTROL 5 INPUT 0 (V) 200s/div CL = 30F, RL = 25 CL = 1F, RL = 500s/div VCC_ SWITCHING (FALL) MAX1601/4 TOC-03 VCC_ SWITCHING (FALL) 6 4 VCC_ (V) 2 0 MAX1601/4 TOC-04 6 VCC_ (V) 4 2 0 CONTROL 5 INPUT 0 (V) CONTROL 5 INPUT 0 (V) CL = 33F, RL = 10ms/div CL = 1F, RL = 25 10ms/div VPP_ SWITCHING (RISE) MAX1601/4 TOC-05 VPP_ SWITCHING (FALL) 15 10 VPP_ (V) 5 0 CONTROL 5 INPUT 0 (V) MAX1601/4 TOC-06 15 10 VPP_ (V) 5 0 CONTROL 5 INPUT 0 (V) CL = 0.1F, RL = 200s/div CL = 0.1F, RL = 2ms/div 6 _______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface _____________________________Typical Operating Characteristics (continued) (VL = VY = 3.3V, VX = 5V, 12IN, TA = +25C, unless otherwise noted.) MAX1601/MAX1604 VCC_ CURRENT LIMITING MAX1601/4 TOC-08 INPUT CURRENT (VCC OUTPUT SHORTED) 2.0 1.5 IVY (A) 1.0 0.5 0 MAX1601/4 TOC-09 4 VCC_ (V) 2 0 2ms/div CL = 1F, RESISTIVE OVERLOAD, RL = 1 1ms/div VPP_ CURRENT LIMITING MAX1601/4 TOC-10 INPUT CURRENT (VPP OUTPUT SHORTED) 10 5 MAX1601/4 TOC-11 10 VPP_ (V) 5 0 VPP_ (V) 0 300 I12IN_ (mA) 200 100 0 2ms/div CL = 1F, RL = 50 RL = 0.1 100s/div VCC_ SHUTDOWN RESPONSE 4 VL (V) 2 0 MAX1601/4 TOC-12 4 VCC_ (V) 2 0 100s/div CIRCUIT OF FIGURE 2 _______________________________________________________________________________________ 7 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 _____________________________Typical Operating Characteristics (continued) (VL = VY = 3.3V, VX = 5V, 12IN, TA = +25C, unless otherwise noted.) VX ON-RESISTANCE vs. VCC_ LOAD CURRENT MAX1601/4 TOC-13 MAX1601 VY ON-RESISTANCE vs. CURRENT MAX1601/4 TOC-14 MAX1604 VY ON-RESISTANCE vs. CURRENT 160 155 150 VY RON (m) 145 140 135 130 TA = +25C TA = +85C MAX1600/3 TOC-20 110 105 100 95 VX RON (m) 90 85 80 75 70 65 60 0 200 400 600 TA = -40C 800 TA = +25C TA = +85C 80 75 70 65 VY RON (m) 60 55 50 45 40 35 30 TA = -40C TA = +25C TA = +85C 165 125 120 115 TA = -40C 0 200 400 600 800 1000 1000 0 200 400 600 800 1000 VCC_ LOAD CURRENT (mA) CURRENT (mA) CURRENT (mA) 12IN_ ON-RESISTANCE vs. CURRENT MAX1601/4 TOC-15 12IN_ ON-RESISTANCE vs. TEMPERATURE 900 850 12IN RON (m) 800 750 700 650 600 550 MAX1601/4 TOC-16 725 720 715 12IN RON (m) 710 705 700 695 690 685 0 20 40 60 80 100 VPPB VPPA 950 120 140 -40 -20 0 20 40 60 80 100 CURRENT (mA) TEMPERATURE (C) VX, VY SUPPLY CURRENT vs. INPUT VOLTAGE MAX1601/4 TOC-17 12IN SUPPLY CURRENT vs. INPUT VOLTAGE MAX1601/4 TOC-18 VL SUPPLY CURRENT vs. VL INPUT VOLTAGE VX = VY = 0V 12IN MAX1601/4 TOC-19 0.9 0.8 VX, VY SUPPLY CURRENT (A) VX 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 4 5 6 INPUT VOLTAGE (V) VY 7 12IN SUPPLY CURRENT (A) 6 5 4 3 2 1 0 0 2 4 6 8 10 70 60 VL SUPPLY CURRENT (A) 50 40 30 20 10 0 SHUTDOWN NORMAL OPERATION 12 0 1 2 3 4 5 6 INPUT VOLTAGE (V) INPUT VOLTAGE (V) 8 _______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface ______________________________________________________________Pin Description PIN 1, 25 2, 3, 26, 27 4 5 6, 8, 10 7, 22, 24 9, 18, 20 11 12 13 14 15 16 17 NAME GND N.C. 12INA VPPA VX VCCA VCCB VPPB 12INB ADR SMBSUS SMBCLK SMBDATA SMBALERT Ground No internal connection +12V Supply Voltage Input, internally connects to channel A VPP switch. Tie to VPPA if not used. Channel A VPP Output VX Supply-Voltage Inputs. VX pins must be connected together. Input range is 3V to 5.5V. VX is normally connected to 5V. Channel A VCC Outputs Channel B VCC Outputs Channel B VPP Output +12V Supply Voltage Input, internally connects to channel B VPP switch. Tie to VPPB if not used. Address Input, sets SMBus address location. See Table 1 for address selection. SMBus Suspend-Mode Control Input. The device will execute commands previously stored in the normal-mode register if SMBSUS is high, or will execute commands previously stored in the suspend-mode register if SMBSUS is low. SMBus Clock Input SMBus Data Input/Output, open drain Fault-Detection Interrupt Output. SMBALERT goes low if either channel VCC or VPP switch is current limiting or undervoltage lockout, or if the thermal protection circuit is activated. SMBALERT is an open-drain output that requires an external pull-up resistor. VY Supply-Voltage Inputs. VY pins must be connected together. Input range is 3V to 5.5V. VY is normally connected to 3V. Logic Supply-Voltage Inputs. Connect to the +3.3V or +5V host system supply. VL can be supplied via the output of a CMOS-logic gate to produce an overriding shutdown. When used as a shutdown input, VL should have a 1k series resistor with a 0.1F capacitor to ground (Figure 2). Note that VL must be greater than undervoltage lockout for any switches to be turned on. FUNCTION MAX1601/MAX1604 19, 21, 23 VY 28 VL _______________________________________________________________________________________ 9 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 12IN VB12 1/2 MAX1601/MAX1604 VPPA CHARGE PUMP 3 CURRENT LIMIT 40 VY VY VB3 0.08* VCCA CHARGE PUMP VX VB5 0.14 VX 20 CURRENT LIMIT VCCA VCCA CHARGE PUMP CURRENT LIMIT SMBALERT SMBCLK SMBDATA SMBSUS ADR SMB THERMAL SHUTDOWN VDD SHDN GND VL *0.24 FOR THE MAX1604 Figure 1. Functional Diagram (one channel of two) 10 ______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface _______________Detailed Description The MAX1601/MAX1604 power-switching ICs contain a network of low-resistance MOSFET switches that deliver selectable VCC and VPP voltages to two Cardbus or PC Card host sockets. The MAX1601/MAX1604 differ only in the VY switch on-resistance. Figure 1 is the detailed block diagram. The power-input pins (VY, VX, 12IN_) are completely independent. Low inrush current is guaranteed by controlled switch rise times. VCC's 100s minimum output rise time is 100% tested with a 1F capacitive load, and VPP's 1ms minimum rise time is guaranteed with a 0.1F load. These respective capacitive loads are chosen as worst-case card-insertion parameters. The internal switching control allows VCC and VPP rise times to be controlled, and makes them nearly independent of resistive and capacitive loads (see rise-time photos in the Typical Operating Characteristics). Fall times are a function of loading, and are compensated by internal circuitry. Power savings is automatic: internal charge pumps draw very low current when the VCC switches are static. Standby mode reduces switch supply current to 1A. Driving the VL pin low with an external logic gate (master shutdown) reduces total supply current to1A (Figure 2). 3.3V 1k VL 74HC04 0.1F VY VPPA VCCA TO SOCKETS A AND B VPPB VCCB MAX1601/MAX1604 MASTER SHUTDOWN MAX1601 MAX1604 Figure 2. Master Shutdown Circuit low. A continuous short-circuit condition results in a pulsed output current until thermal shutdown is reached. SMBALERT is open-drain and requires an external pull-up resistor. Thermal Shutdown If the IC junction temperature rises above +150C, the thermal shutdown circuitry opens all switches, including the GND switches, and SMBALERT is pulled low. When the temperature falls below +130C, the switches turn on again at the controlled rise rate. If the overcurrent condition remains, the part cycles between thermal shutdown and overcurrent. Operating Modes The MAX1601/MAX1604 have three operating modes: normal, standby, and shutdown. Normal mode supplies the selected outputs with their appropriate supply voltages. Standby mode places all switches at ground, high impedance, or a combination of the two. Shutdown mode turns all switches off, and puts the VCC and VPP outputs into a high-impedance state. Pull VL low to enter shutdown mode. To ensure a 0.05V/s fall rate on VL, use a 1k series resistor and a 0.1F capacitor to ground (Figure 2). Undervoltage Lockout If the VX or VY switch input voltage drops below 1.5V, the associated switch turns off and SMBALERT goes low. For example, if VY is 3.3V and VX is 0V, and if the interface controller selects VY, the VCCA output will be 3.3V. If VX is selected, VCCA changes to a high-impedance output and SMBALERT goes low. When a voltage is initially applied to 12IN_, it must be greater than 8V to allow the switch to operate. Operation continues until the voltage falls below 2V (the VPP output is high impedance). When VL drops to less than 2.3V, all switches are turned off and the VCC and VPP outputs are high impedance. Overcurrent Protection Peak detecting circuitry protects both the VCC and VPP switches against overcurrent conditions. When current through any switch exceeds the internal current limit (4A for VCC switches and 200mA for VPP switches), the switch turns off briefly, then turns on again at the controlled rise rate. If the overcurrent condition lasts more than 2s, the SMBALERT output latches ______________________________________________________________________________________ 11 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 ______SMBusTM Interface Operation The SMBus serial interface is a two-wire interface with multi-mastering capability, intended to control lowspeed peripheral devices in low-power portable equipment applications. SMBus is similar to I 2 CTM and AccessBus, but has slightly different logic threshold voltage levels, different fixed addresses, and a suspend-mode register capability. To obtain a complete set of specifications on the SMBus interface, call Intel at (800) 253-3696 and ask for product code SBS5220. responding to either the A channel address (which will provide data about faults for both A and B channels) or to the interrupt pointer address (discussed later). The normal start condition consists of a high-to-low transition on SMBDATA while SMBCLK is high. The 7-bit address is followed by a bit that designates a read or write operation: high = read, low = write. If the 7-bit address matches one of the supported function addresses, the IC issues an acknowledge pulse by pulling the SMBDATA line low. If the address is not valid, the IC stays off of the bus and ignores any data on the bus until a new start condition is detected. Once the IC receives a valid address that includes a write bit, it expects to receive one additional byte of data. If a stop condition or new start condition is detected before a complete byte of data is clocked in, the IC interprets this as an error and all of the data is rejected and lost. SMBDATA and SMBCLK are Schmitt triggered and can accommodate slower edges. However, rising edges should still be faster than 1s, and falling edges should be faster than 300ns. SMBus Addressing These dual-channel PC Card switch devices respond to two of four different addresses, depending on the state of the ADR address pin. Normal writing to the device is done by transmitting one of four addresses, followed by a single data byte, to program the channel selected. Write transmissions to the interrupt pointer address are not supported by these devices. Reading from the device is done by transmitting one of two addresses cor- Table 1. SMBus Addressing SMB ADDRESS 0001100 1010000 1010001 1010010 1010011 ADR PIN Don't care Grounded Grounded Tied to VL Tied to VL WRITE FUNCTION N/A Channel A Channel B Channel A Channel B READ FUNCTION Interrupt Pointer Channel A/B faults Channel A/B faults Channel A/B faults Channel A/B faults SMBus Write Operations If the IC receives a valid address immediately followed by a write bit, the IC becomes a slave receiver. The slave IC generates a first acknowledge after the address and write bit, and a second acknowledge after the command byte. A stop condition following the command (data) byte causes immediate execution of the command, unless the data included a low SUS/OP bit. If the data included a low SUS/OP bit, the command is stored in the suspend-mode register and is executed only when the SMBSUS pin is pulled low (Figure 3). Table 2. Command Format for Channel A Write Operations (address 1010000 or 1010010) BIT 7 (MSB) 6 5 4 3 2 1 0 (LSB) NAME OP/SUS VCCAON VCCA3/5 VCCAHIZ VPPAON VPPAPGM VPPAHIZ MASKFLT POR STATE 0 0 0 0 0 0 0 0 FUNCTION Operate/suspend bit. Selects which latch receives data: high = operation, low = suspend. Turns on VCCA when high, pulls VCCA to GND when low. If VCCA is on, a high connects VY to VCCA, and a low connects VX to VCCA. Puts VCCA in a high-impedance state when high. Overrides VCCAON. Turns on VPPA when high, pulls VPPA to GND when low. If VPPA is on, a high connects VPPA to 12INA, and a low connects VPPA to VCCA. Puts VPPA in a high-impedance state when high. Overrides VPPAON. Masks fault interrupts from both channel A and channel B when high. is a trademark of Philips Corp. SMBus is a trademark of Intel Corp. 12 ______________________________________________________________________________________ I2C Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 Table 3. Command Format for Channel B Write Operations (address 1010001 or 1010011) BIT 7 (MSB) 6 5 4 3 2 1 0 (LSB) NAME OP/SUS VCCBON VCCB3/5 VCCBHIZ VPPBON VPPBPGM VPPBHIZ RFU POR STATE 0 0 0 0 0 0 0 0 FUNCTION Operate/suspend bit. Selects which latch receives data: high = operation, low = suspend. Turns on VCCB when high, pulls VCCB to GND when low. If VCCB is on, a high connects VY to VCCB, and a low connects VX to VCCB. Puts VCCB in a high-impedance state when high. Overrides VCCBON. Turns on VPPB when high, pulls VPPB to GND when low. If VPPB is on, a high connects VPPB to 12INB, and a low connects VPPB to VCCB. Puts VPPB in a high-impedance state when high. Overrides VPPBON. Reserved for future use. Table 4. Read Format for Interrupt Pointer Address (0001100) BIT 7 (MSB) 6 5 4 3 2 1 0 (LSB) NAME ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0 POR STATE 0 0 0 0 0 0 0 0 ADD7 to ADD1 provide a return address for any interrupt query. For these devices, the return addresses are: 1010000 = Channel A, ADD = low 1010001 = Channel B, ADD = low 1010010 = Channel A, ADD = high 1010011 = Channel B, ADD = high FUNCTION Table 5. Read Format for Power Switch Address (1010000 or 1010010) BIT 7 (MSB) 6 5 4 3 2 1 0 (LSB) NAME CATFAULT FAULT1 FAULT2 FAULT3 FAULT4 SIG/DUAL RFU RFU POR STATE 0 0 0 0 0 0 0 0 LATCHED? Y Y Y Y Y N N N FUNCTION Indicates catastrophic (thermal or undervoltage lockout) fault when high. Indicates VCCA overcurrent/undervoltage lockout when high. Indicates VPPA overcurrent/undervoltage lockout when high. Indicates VCCB overcurrent/undervoltage lockout when high. Indicates VPPB overcurrent/undervoltage lockout when high. Indicates dual part (single-channel devices would read 1). Reserved for future use. Reserved for future use. ______________________________________________________________________________________ 13 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 A tLOW B tHIGH C D E F G H I J K L M SMBCLK SMBDATA tSU:STA tHD:STA tSU:DAT tHD:DAT tSU:STO tBUF A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA LINE LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO SLAVE (OP/SUS BIT) H = LSB OF DATA CLOCKED INTO SLAVE I = SLAVE PULLS SMBDATA LINE LOW J = ACKNOWLEDGE CLOCKED INTO MASTER K = ACKNOWLEDGE CLOCK PULSE L = STOP CONDITION, DATA EXECUTED BY SLAVE M = NEW START CONDITION Figure 3. SMBus Write Timing Diagram SMBus Read Operations If the IC receives a valid address that includes a read bit, the IC becomes a slave transmitter. After receiving the address data, the IC generates an acknowledge during the acknowledge clock pulse and drives the SMBDATA line in sync with SMBCLK. The SMB protocol requires that the master end the read transmission by not acknowledging during the acknowledge bit of SMBCLK. These PC Card ICs support the repeated start-condition method for changing data-transfer direction; that is, a write transmission followed by a repeated start instead of a stop condition prepares the IC for data reading (Figure 4). fault condition is to cycle the voltage on VL in order to generate a power-on reset (which clears all of the SMBus registers). Note that the SMBus registers retain their data even if the main VX/VY supplies are turned off, provided that VL remains powered. When a fault occurs, SMBALERT is immediately asserted and latched low. If the fault is momentary and disappears before the IC is serviced, the data is still latched in the interrupt pointer and SMBALERT remains asserted. Normally, the master (host system or PCMCIA digital controller) now sends out the interrupt pointer address (00011000) followed by a read bit. SMBALERT is cleared and the PC Card IC responds by putting out its address on the bus. If the fault persists, SMBALERT is re-asserted, but the data in the fault registers is not reloaded. The data in the fault latches only reflects the first time SMBALERT is asserted. When the part enters operating mode, a false interrupt flag may be issued. The user needs to send the interrupt address to clear the false interrupt. Normally, the master sends out the appropriate PC Card switch address on the bus, followed by a read bit. The data in the fault registers is then clocked out onto the bus (which also clears the fault registers). If the fault persists, the fault bits and SMBALERT are latched again. SMBus Interrupts These PC Card power-switch ICs are slave devices only, and never initiate communications except by asserting an interrupt (by pulling SMBALERT low). Interrupts are generated only for reporting fault conditions, including overcurrent at VCCA, VCCB, VPPA, or VPPB, undervoltage lockout, and IC thermal overload. If an interrupt occurs, it can be an indication of impending system failure. The host system can react by going into suspend mode or taking other action. It can come back later to interrogate the IC via the interrupt pointer to determine status or perform corrective action (such as disabling the appropriate power switch that might be connected to a shorted PC card). The fas test method for turning off the switches in response to a 14 ______________________________________________________________________________________ Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 A tLOW B tHIGH C D E F G H I J K SMBCLK SMBDATA tSU:STA tHD:STA A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE tSU:DAT E = SLAVE PULLS SMBDATA LINE LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO MASTER H = LSB OF DATA CLOCKED INTO MASTER tSU:STO I = ACKNOWLEDGE CLOCK PULSE J = STOP CONDITION K = NEW START CONDITION tBUF Figure 4. SMBus Read Timing Diagram The interrupt pointer address provides quick fault identification for simple slave devices that lack the complex, expensive logic needed to be a bus master. The host can read the interrupt pointer to determine which slave device generated an SMBALERT interrupt signal. The interrupt pointer address can activate several different slave devices simultaneously, similar to an I2C general call. Any slave device that generated an interrupt attempts to identify itself by putting its own address on the bus during the first read byte. If more than one slave attempts to respond, bus arbitration rules apply and the device with the lower address code wins. The losing device won't generate an acknowledge and will continue to hold the SMBALERT line low until serviced, which implies that the host interrupt input must be level sensitive. Changing SMBCLK and SMBDATA Simultaneously When clocking data into the MAX1601/MAX1604, SMBDATA must not fall before SMBCLK. Otherwise, the MAX1601/MAX1604 may interpret this as a start condition. Even when SMBDATA and SMBCLK fall at the same instant, different fall times for the two signals may cause the erroneous generation of a start condition. To ensure that SMBDATA transitions after the falling edge of SMBCLK, add an RC network to SBMDATA (Figure 6). 1k VL 0.1F +5V VX VY __________Applications Information Supply Bypassing Bypass the VY, VX, and 12IN_ inputs with ceramic 0.1F capacitors. Bypass the VCC_ and VPP_ outputs with a 0.1F capacitor for noise reduction and ESD protection. MAX1601 MAX1604 Figure 5. Powering from Either VX or VY +5V Power-Up Apply power to the VL input before any of the switch inputs. If VX, VY, or 12IN receive power before VL rises above 2.8V, the supply current may be artificially high (about 5mA). When the voltage on VL is greater than 2.8V (operating mode), the part consumes its specified 24A. To avoid power sequencing, diode-OR VX and VY to VL through a 1k resistor (Figure 5). Take care not to allow VL to drop below the 2.8V maximum undervoltage lockout threshold. CIRRUS LOGIC CL-PD6730 SMBDATA SMBCLK 10k PULL-UP 1.5k SMBDATA 100pF MAX1601 MAX1604 SMBCLK Figure 6. Application with Cirrus Logic Interface ______________________________________________________________________________________ 15 Dual-Channel CardBus and PCMCIA Power Switches with SMBusTM Serial Interface MAX1601/MAX1604 __________________Pin Configuration TOP VIEW GND 1 N.C. 2 N.C. 3 12INA 4 VPPA 5 VX 6 VCCA 7 VX 8 VCCB 9 VX 10 VPPB 11 12INB 12 ADR 13 SMBSUS 14 28 VL 27 N.C. 26 N.C. 25 GND ___________________Chip Information TRANSISTOR COUNT: 4372 MAX1601 MAX1604 24 VCCA 23 VY 22 VCCA 21 VY 20 VCCB 19 VY 18 VCCB 17 SMBALERT 16 SMBDATA 15 SMBCLK SSOP ________________________________________________________Package Information DIM A A1 B C D E e H L INCHES MILLIMETERS MIN MAX MIN MAX 0.068 0.078 1.73 1.99 0.002 0.008 0.05 0.21 0.010 0.015 0.25 0.38 0.004 0.008 0.09 0.20 SEE VARIATIONS 0.205 0.209 5.20 5.38 0.0256 BSC 0.65 BSC 0.301 0.311 7.65 7.90 0.025 0.037 0.63 0.95 0 8 0 8 INCHES MILLIMETERS MAX MIN MAX MIN 6.33 0.239 0.249 6.07 6.33 0.239 0.249 6.07 7.33 0.278 0.289 7.07 8.33 0.317 0.328 8.07 0.397 0.407 10.07 10.33 21-0056A E H C L DIM PINS e A B D A1 SSOP SHRINK SMALL-OUTLINE PACKAGE D D D D D 14 16 20 24 28 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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