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IMP690A , 692A , 802L/M, 805L
POWER MANAGEMENT
P Power Supply Supervisor with Battery Backup Switch
The IMP690A/IMP692A/IMP802L/IMP802M/IMP805L simplify power supply monitoring and control in microprocessor systems. Each circuit implements four functions: Reset control, watchdog monitoring, batterybackup switching and power-failure monitoring. In addition to microprocessor reset under powerup and power-down conditions, these devices provide battery-backup switching to maintain control in powerloss and brown-out situations. Additional monitoring capabilities can provide an early warning of unregulated power-supply loss before the voltage regulator drops out. The important features of these four functions are: a) 1.6 second watchdog timer to keep microprocessor responsive b) c) 4.40V or 4.65V VCC threshold for microprocessor reset at power-up and power-down SPDT (single-pole, double-throw) PMOS switch connects backup power to RAM if VCC fails
Key Features
x Design improvement over Maxim MAX690A/692A/802L/802M/805L -- 70% lower current than Maxim: 100A maximum -- RESET Operation to 1.1V x Two precision supply-voltage monitor options -- 4.65V (IMP690A/802L/805L) -- 4.40V (IMP692A/802M) x Battery-backup power switch on-chip x Watchdog timer: 1.6 second timeout x Power failure/low battery detection x Short-circuit protection and thermal limiting x Small 8-pin SO package x No external components x Specified over full temperature range
d) 1.25V threshold detector for power loss or general purpose voltage monitoring While these features are pin-compatible with the industry standard power-supply supervisors offered by Maxim, the IMP devices are superior replacements and can reduce power requirements by 70 percent when compared to Maxim MAX690/MAX692A/MAX802L/MAX802M/ MAX805L devices. Short-circuit and thermal protection have also been added. The IMP690A/IMP802L/IMP805L generate a reset pulse when the supply voltage drops below 4.65V, and the IMP692A/IMP802M generate a reset below 4.40V. The IMP802L/IMP802M have power-fail accuracy to 2%. The IMP805L is the same as the IMP690A except that RESET is provided instead of RESET.
Applications
x Embedded control systems x Battery-operated systems x Intelligent instruments x Wireless communication systems x PDAs and handheld equipment x P/C power supply monitoring
Block Diagrams
VBATT VCC
+
Typical Application
1 7 VOUT RESET (RESET) Unregulated DC Regulated +5V VCC RESET PFI R2 PFO WDI VOUT NMI I/O LINE GND BUS CMOS VCC RAM GND
690A_01.eps
8 2
Battery-Switchover Circuit Reset Generator
+
R1
0.1F
VCC RESET
1.25V 3.5V 6 WDI
+ + + +
Watchdog Timer
+ -
3.6V Lithium Battery
VBATT GND
0.8V 4 PFI
1.25V
+ +
IMP690A
5 PFO
IMP690A, IMP692A, IMP802L, IMP802M, IMP805L ( ) IMP805L 3 GND
690A_03.eps
IMP, Inc.
San Jose, CA
408-432-9100/www.impweb.com
IMP690A , 692A , 802L, 802M, 805L
Pin Configuration
Plastic/CerDip/SO
VOUT VCC GND PFI 1 2 3 4 IMP690A IMP692A IMP802L IMP802M IMP805L 8 7 6 5 VBATT RESET (RESET) WDI PFO
( ) IMP805L
690A_02.eps
Ordering Information
Part Number IMP690A
IMP690ACPA IMP690ACSA IMP690AC/D IMP690AEPA IMP690AESA IMP690AMJA 4.5 to 4.75 4.5 to 4.75 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75
Reset Threshold (V)
4.5 to 4.75 4.5 to 4.75 4.5 to 4.75
Temperature Range
0C to +70C 0C to +70C 25C - 40C to +85C - 40C to +85C Contact Factory 0C to +70C 0C to +70C 25C - 40C to +85C - 40C to +85C Contact Factory 0C to +70C 0C to +70C - 40C to +85C - 40C to +85C 0C to +70C 0C to +70C - 40C to +85C - 40C to +85C 0C to +70C 0C to +70C 25C -40C to +85C -40C to +85C Contact Factory
Pins-Package
8-Plastic DIP 8-SO DICE 8-Plastic DIP 8-SO 8-CerDIP 8-Plastic DIP 8-SO DICE 8-Plastic DIP 8-SO 8-CerDIP 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO DICE 8-Plastic DIP 8-SO 8-CerDIP
IMP692A
IMP692ACPA IMP692ACSA IMP692AC/D IMP692AEPA IMP692AESA IMP692AMJA
IMP802L
IMP802LCPA IMP802LCSA IMP802LEPA IMP802LESA
IMP802M
IMP802MCPA IMP802MCSA IMP802MEPA IMP802MESA
IMP805L
IMP805LCPA IMP805LCSA IMP805LC/D IMP805LEPA IMP805LESA IMP805LMJA
2
IMP690A , 692A , 802L, 802M, 805L
Pin Description
Pin Number IMP690A/IMP692A IMP802L/IMP802M
1
IMP805L
1
Name
VOUT
Function
Voltage supply for RAM. When VCC is above the reset threshold, VOUT connects to VCC through a P-channel MOS device. If VCC falls below the reset threshold, this output will be connected to the backup supply at VBATT (or VCC, whichever is higher) through the MOS switch to provide continuous power to the CMOS RAM. +5V power supply input Ground Power failure monitor input. PFI is connected to the internal power fail comparator which is referenced to 1.25V. The power fail output (PFO) is active LOW but remains HIGH if PFI is above 1.25V. If this feature is unused, the PFI pin should be connected to GND or VOUT. Power-fail output. is active LOW whenever the PFI pin is less than PFO 1.25V. Watchdog input. The WDI input monitors microprocessor activity. An internal timer is reset with each transition of the WDI input. If WDI is held HIGH or LOW for longer than the watchdog timeout period, typically 1.6 seconds, RESET (or is asserted for the reset pulse width time, RESET) tRS, of 140ms, minimum. Active-LOW reset output. When triggered by VCC falling below the reset threshold or by watchdog timer timeout, RESET (or pulses low RESET) for the reset pulse width, t RS, typically 200ms. It will remain low if VCC is below the reset threshold (4.65V in the IMP690A/IMP802L and 4.4V in the IMP692A/IMP802L) and remains low for 200ms after VCC rise above the reset threshold. Active-HIGH reset output. The inverse of RESET. Auxiliary power or backup-battery input. VBATT should be connected to GND if the function is not used. This input has about 40mV of hysteresis to prevent rapid toggling between VCC and VBATT.
2 3 4
2 3 4
VCC GND PFI
5 6
5 6
PFO WDI
7
----
RESET
---- 8
7 8
RESET VBATT
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V VBATT . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V All Other Inputs* . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V) Input Current at VCC . . . . . . . . . . . . . . . . . . 200mA Input Current at VBATT . . . . . . . . . . . . . . . . . 50mA Input Current at GND . . . . . . . . . . . . . . . . . 20mA Output Current: VOUT . . . . . . . . . . . . . . . Short circuit protected All Other Inputs . . . . . . . . . . . . . . . . . . . 20mA Rate of Rise: VBATT and VCC . . . . . . . . . . 100V/s Continuous Power Dissipation Plastic DIP (derate 9mW/C above 70C) . . . 800mW SO (derate 5.9mW/C above 70C) . . . . . . . . 500mW CerDIP (derate 8mW/C above 70C) . . . . . . 650mW Operating Temperature Range (C Devices) . . . . 0C to 70C Operating Temperature Range (E Devices) . . . . -40C to 85C Storage Temperature Range . . . . . . . . . . . . . . . . . -65C to 160C Lead Temperature Soldering, (10 sec) . . . . . . . . 300C * The input voltage limits on PFI and WDI may be exceeded if the current is limited to less than 10mA These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.
3
IMP690A , 692A , 802L, 802M, 805L
Electrical Characteristics
Unless otherwise noted VCC = 4.75V to 5.5V for the IMP690A/IMP802L/IMP805L and VCC = 4.5V to 5.5V for the IMP692A/IMP802M; VBATT = 2.8V; and TA = TMIN to TMAX.
Parameter
VCC, VBATT Voltage Range (Note 1) Supply Current Excluding IOUT ISUPPLY in Battery-Backup Mode (Excluding IOUT) VBATT Standby Current (Note 2) VOUT Output VOUT in Battery-Backup Mode Battery Switch Threshold, VCC to VBATT Battery Switchover Hysteresis Reset Threshold
Symbol
Conditions
IMP69_AC, IMP802_C IMP805LC IMP69_AE, IMP80_ _E IMP69_AC, IMP802_C IMP69_AE, IMP802_E, IMP805LE VCC = 0V, VBATT = 2.8V TA = 25C TA = TMIN to TMAX 5.5V > VCC > VBATT - 0.2V TA = 25C TA = TMIN to TMAX IOUT = 5mA IOUT = 50mA IOUT = 250A, VCC < VBATT - 0.2V Power-up VCC < VRT Power-down IMP690A/802L/805L IMP692A, IMP802M IMP802L, TA = 25C, VCC falling IMP802M, TA = 25C, VCC falling
Min
1.1 1.1 1.1
Typ
Max Units
5.5 5.5 5.5 100 100 1.0 5.0 0.02 0.02 V
IS
35 35
A A A V V mV mV V
VRT
Reset Threshold Hysteresis Reset Pulse Width Reset Output Voltage
tRS ISOURCE = 800A ISINK = 3.2mA IMP69_AC, IMP802_C, VCC = 1.0V, ISINK = 50A IMP69_AE, IMP802_E, VCC = 1.2V, ISINK = 100A IMP805LC, ISOURCE = 4A, VCC = 1.1V IMP805LE, ISOURCE = 4A, VCC = 1.2V IMP805L, ISOURCE = 800A IMP805L, ISINK = 3.2mA tWD tWP VIL= 0.4V, VIH = 0.8VCC WDI = VCC WDI = 0V VCC = 5V, Logic LOW VCC = 5V, Logic HIGH IMP69_A, IMP805L, VCC = 5V IMP802_C/E, VCC = 5V ISOURCE = 800A ISINK = 3.2mA
- 0.1 -1.0 VCC - 0.025 VCC - 0.010 VCC - 0.25 VCC - 0.10 VBATT - 0.1 VBATT - 0.001 20 -20 40 4.50 4.65 4.25 4.40 4.55 4.30 40 140 200 VCC - 1.5
4.75 4.50 4.70 4.45 280 0.4 0.3 0.3
mV ms V
0.8 0.9 VCC - 1.5 1.00 50 -150 3.5 1.20 1.225 - 25 VCC - 1.5 1.60 50 -50 0.4 2.25 150 0.8 1.25 1.250 0.01 1.30 1.275 25 0.4 sec ns A V V nA V
Watchdog Timeout WDI Pulse Width WDI Input Current WDI Input Threshold (Note 3) PFI Input Threshold PFI Input Current PFO Output Voltage
Notes: 1. If VCC or VBATT is 0V, the other must be greater than 2.0V. 2. Battery charging-current is "-". Battery discharge-current is "+". 3. WDI is guaranteed to be in an intermediate level state if WDI is floating and VCC is within the operating voltage range. WDI input impedance is 50k. WDI is biased to 0.3VCC.
4
IMP690A , 692A , 802L, 802M, 805L
Application Information
Reset Output
It is important to initialize a microprocessor to a known state in response to specific events that could create code execution errors and "lock-up". The reset output of these supervisory circuits send a reset pulse to the microprocessor in response to power-up, power-down/power-loss or a watchdog time-out. The reset pulse width, t RS, is typically around 200ms and is LOW for the IMP690A, IMP692A, IMP802 and HIGH for the IMP805L. Power-up reset occurs when a rising VCC reaches the reset threshold, VRT, forcing a reset condition in which the reset output is asserted in the appropriate logic state for the duration of t RS. Figure 2 shows the reset pin timing. Power-loss or "brown-out" reset occurs when VCC dips below the reset threshold resulting in a reset assertion for the duration of tRS. The reset signal remains asserted as long as VCC is between VRT and 1.1V, the lowest VCC for which these devices can provide a guaranteed logic-low output. To ensure logic inputs connected to the IMP690A/692A/802 RESET pin are in a known state when VCC is under 1.1V, a 100k pull-down resistor at RESET is needed: the logic-high IMP805L will need a pull-up resistor to VCC. A Watchdog time-out reset occurs when a logic "1" or logic "0" is continuously applied to the WDI pin for more than 1.6 seconds. After the duration of the reset interval, the watchdog timer starts a new 1.6 second timing interval; the microprocessor must service the watchdog input by changing states or by floating the WDI pin before this interval is finished. If the WDI pin is held either HIGH or LOW, a reset pulse will be triggered every 1.8 seconds (the 1.6 second timing interval plus the reset pulse width t RS).
Microprocessor Interface.
The IMP690 has logic-LOW RESET output while the IMP805 has an inverted logic-HIGH RESET output. Microprocessors with bidirectional reset pins (69HC11 for example) can pose a problem when the supervisory circuit and the microprocessor output pins attempt to go to opposite logic states. The problem can be resolved by placing a 4.7k resistor between the RESET output and the microprocessor reset pin. This is shown in Figure 3. Since the series resistor limits drive capabilities, the reset signal to other devices should be buffered.
+5V VCC +0V +5V VOUT +0V +5V RESET +0V +5V (RESET) +0V +5V PFO +0V ( ) IMP805L VBATT = PFI = 3.0V IOUT = 0mA
690A_04.eps
3.0V tRS
3.0V
Figure 2. Timing Diagram
VBATT VCC
+
8 2
Battery-Switchover Circuit Reset Generator
+
1 7
VOUT RESET (RESET)
Buffered RESET to Other System Components
1.25V 3.5V 6 WDI
+ + + +
Watchdog Timer VCC 1.25V
+ +
VCC 4.7k
0.8V 4 PFI
5 PFO
RESET IMP690A GND
RESET
IMP690A, IMP692A, IMP802L, IMP802M, IMP805L ( ) IMP805L 3 GND
690A_03.eps
GND
690A_05.eps
Figure 1. Block Diagram
Figure 3. Interfacing with bi-directional microprocessor reset inputs
5
IMP690A , 692A , 802L, 802M, 805L
Application Information
Watchdog Input
As discussed in the Reset section, the Watchdog Input is used to monitor microprocessor activity. It can be used to insure that the microprocessor is in a continually responsive state by requiring that the WDI pin be toggled every second. If the WDI pin is not toggled within the 1.6 second window (minimum t WD + t RS), a reset pulse will be asserted to return the microprocessor to the initial start-up state. Pulses as short as 50ns can be applied to the WDI pin. If this feature is not used, the WDI pin should be opencircuited or the logic placed into a high-impedance state to allow the pin to float.
Table 1. Pin Connections in Battery Backup Mode
Pin
VOUT VBATT PFI PFO RESET WDI
Connection
Connected to VBATT through internal PMOS switch Connected to VOUT Disabled Logic-LOW Logic LOW (except on IMP805 where it is HIGH) Watchdog timer disabled
Backup-Battery Switchover
A power loss can be made less severe if the system RAM contents are preserved. This is achieved in the IMP690/692/802/805 by switching from the failed VCC to an alternate power source connected at VBATT when VCC is less than the reset threshold voltage (VCC < VRT), and VCC is less than VBATT. The VOUT pin is normally connected to VCC through a 2 PMOS switch but a brown-out or loss of VCC will cause a switchover to VBATT by means of a 20 PMOS switch. Although both conditions (VCC < VRT and VCC < VBATT) must occur for the switchover to VBATT to occur, VOUT will be switched back to VCC when VCC exceeds VRT irrespective of the voltage at VBATT. It should be noted that an internal device diode (D1 in Figure 4) will be forward biased if VBATT exceeds VCC by more than a diode drop when VCC is switched to VOUT. Because of this it is recommended that VBATT be no greater than VRT +0.6V.
VBATT VCC
During the backup power mode, the internal circuitry of the supervisory circuit draws power from the battery supply. While VCC is still alive, the comparator circuits remain alive and the current drawn by the device is typically 35A. When VCC drops more than 1.1V below VBATT, the internal switchover comparator, the PFI comparator and WDI comparator will shut off, reducing the quiescent current drawn by the IC to less than 1A.
Backup Power Sources - Batteries
Battery voltage selection is important to insure that the battery does not discharge through the parasitic device diode D1 (see Figure 4) when VCC is less than VBATT and VCC > VRT.
Table 2. Maximum Battery Voltages
Part No.
IMP690A IMP802L IMP805L IMP692A IMP802M
MAXIMUM Battery Voltage
4.80 4.80 4.80 4.55 4.55
SW1
SW2
D1 D2
SW3
SW4
IMP690A IMP802L IMP692A IMP802M
D3
IMP805L
Although most batteries that meet the requirements of Table 2 are acceptable, lithium batteries are very effective backup source due to their high-energy density and very low self-discharge rates.
Battery Replacement while Powered
Batteries can be replaced even when the device is in a powered state as long as VCC remains above the reset threshold voltage VRT. In the IMP devices, a floating VBATT pin will not cause a powersupply switchover as can occur in some other supervisory circuits. If VBATT is not used, the pin should be grounded.
VOUT CONDITION VCC > Reset Threshold VCC < Reset Threshold and VCC > VBATT VCC < Reset Threshold and VCC < VBATT SW1/SW2 SW3/SW4 Open Closed Open Closed Closed Open
IMP690A /IMP802L / IMP805L Reset Threshold = 4.65V IMP692A /IMP802M Reset Threshold = 4.4V
690A_06.eps
Figure 4. Internal device configuration of battery switch-over function
6
IMP690A , 692A , 802L, 802M, 805L
Application Information
Backup Power Sources - SuperCapTM
Capacitor storage, with very high values of capacitance, can be used as a back-up power source instead of batteries. SuperCapTM are capacitors with capacities in the fractional farad range. A 0.1 farad SuperCapTM would provide a useful backup power source. Like the battery supply, it is important that the capacitor voltage remain below the maximum voltages shown in Table 2. Although the circuit of Figure 5 shows the most simple way to connect the SuperCapTM, this circuit cannot insure that an overvoltage condition will not occur since the capacitor will ultimately charge up to VCC. To insure that an overvoltage condition does not occur, the circuit of Figure 6 is preferred. In this circuit configuration, the diode-resistor pair clamps the capacitor voltage at one diodedrop below VCC. VCC itself should be regulated within 5% of 5V for the IMP692A/802M or within 10% of 5V for the IMP690A/802L/805L to insure that the storage capacitor does not achieve an overvoltage state. Note: SuperCapTM is a trademark of Baknor Industries
+5V
Operation Without a Backup Power Source
When operating without a back-up power source, the VBATT pin should be connected to GND and VOUT should be connected to VCC, since power source switchover will not occur. Connecting VOUT to VCC eliminates the voltage drop due to the ON-resistance of the PMOS switch.
Power-Fail Comparator
The Power Fail feature is an independent voltage monitoring function that can be used for any number of monitoring activities. The PFI function can provide an early sensing of power supply failure by sensing the voltage of the unregulated DC ahead of the regulated supply sensing seen by the backup-battery switchover circuitry. The PFI pin is compared to a 1.25V internal reference. If the voltage at the PFI pin is less than this reference voltage, the pin PFO goes low. By sensing the voltage of the raw DC power supply, the microprocessor system can prepare for imminent power-loss, especially if the battery backup supply is not enabled. The input voltage at the PFI pin results from a simple resistor voltage divider as shown in Figure 7.
+5V
VCC
VOUT
To Static RAM
VBATT
RESET (RESET)
To P R1
VCC IMP690A IMP692A PFI IMP802L PFO IMP802M IMP805L GND
+
0.1F GND
( ) IMP805L
690A_07.eps
R2
Figure 5. Capacitor as a backup power source
+5V +5V VCC VOUT To Static RAM PFO 0V A B
VBATT
RESET
To P A 5R 2 < 1.25V R1 + R 2 B 5R 2 > 1.25V R1 + R 2
690A_09.eps
+
100k 0.1F
IMP692A IMP802M GND
Figure 7. Simple Voltage divider sets PFI trip point
690A_08.eps
( ) IMP805L
Figure 6. Capacitor as back-up Power Source - Voltage clamped to 0.5V below VCC
7
IMP690A , 692A , 802L, 802M, 805L
Application Information
Power Fail Hysteresis
A noise margin can be added to the simple monitoring circuit of Figure 7 by adding positive feedback from the PFO pin. The cir cuit of Figure 8 adds this positive "latching" effect by means of an additional resistor R3 connected between PFO and PFI which helps in pulling PFI in the direction of PFO and eliminating an indecision at the trip point. Resistor R3 is normally about 10 times higher in resistance than R2 to keep the hysteresis band reasonable and should be larger than 10k to avoid excessive loading on the pin. The calculations for the correct values of resistors to PFO set the hysteresis thresholds are given in Figure 8. A capacitor can be added to offer additional noise rejection by low-pass filtering.
VIN +5V VCC R1 IMP690A IMP692A IMP802L PFI IMP802M IMP805L PFO GND To P *Optional +5V PFO 0V 0V V TRIP = 1.25 R2 R +R 2 2 VL VTRIP VIN VH +5V PFO 0V VTRIP V- 5 - 1.25 1.25 - V TRIP = R1 R2 0V R1
Monitoring Capabilities of the Power-Fail Input
Although designed for power supply failure monitoring, the PFI pin can be used for monitoring any voltage condition that can be scaled by means of a resistive divider. An example is the negative power supply monitor configured in Figure 9. In this case a good negative supply will hold the PFI pin below 1.25V and the PFO pin will be at a logic "0". As the negative voltage declines, the voltage at the PFI pin will rise until it exceeds 1.25V and the PFO pin will go to a logic "1".
+5V
VCC
IMP690A IMP692A IMP802L PFO PFI IMP802M IMP805L GND
R2 V-
R3 R2 C1*
V- = VTRIP
690A_11.eps
Figure 9. Using PFI to monitor negative supply voltage
V IH =
1.25 R2 R3 R +R R 1 2 3
V L- 1.25 5 - 1.25 1.25 + = R1 R3 R2
690A_10.eps
Figure 8. Hysteresis added to PFI pin
8
IMP690A , 692A , 802L, 802M, 805L
Package Dimensions
Plastic DIP (8-Pin)
D1
Inches Min
A A1
E
Millimeters Max Min Max Plastic DIP (8-Pin)*
0.210 ----- 0.195 0.022 0.070 0.045 0.400 ----- 0.325 0.280 ----- ----- 0.430 0.060 0.150 0.200 0.070 0.023 0.065 0.015 0.405 ----- 0.320 0.310 2.92 ---- 0.38 0.36 0.97 0.20 ----- 0.13 7.37 5.59 2.54 0.200 0.069 0.010 0.020 0.010 3.18 1.35 0.10 0.33 0.19 1.27 0.157 0.244 0.050 0.197 3.80 5.80 0.40 4.80 4.00 6.20 1.27 5.00 5.08 1.75 0.25 0.51 0.25 3.81 5.08 1.78 0.58 1.65 0.38 10.29 ----- 8.13 7.87 ----- ---- 0.38 2.92 0.36 1.14 0.80 9.02 0.13 7.62 6.10 2.54 7.62 10.92 5.33 ----- 4.95 0.56 1.78 1.14 10.16 ----- 8.26 7.11
----- 0.015 0.115 0.014 0.045 0.030 0.355 0.005 0.300 0.240 0.100 0.300 ----- ----- 0.115 ----- 0.015 0.014 0.038 0.008 ----- 0.005 0.290 0.220 0.100 0.125 0.053 0.004 0.013 0.007 0.050 0.150 0.228 0.016 0.189
D A A2
A2 b b2 b3
E1
L A1 e b b2
0-15 C eA eB
Plastic DIP (8-Pin)a.eps
D D1 E E1 e eA eB eC L A
CerDIP (8-Pin)
D1
CerDIP (8-Pin)
E D E1
A1 b b2 C
A
L A1 e b b2
0-15 C
Ceramic DIP (8-Pin)a.eps
D D1 E E1 e
SO (8-Pin)
0- 8
L A A1
L
SO (8-Pin)**
B C e E H L
C
E
H
D
D A
* JEDEC Drawing MS-001BA ** JEDEC Drawing MS-012AA
e B A1
SO (8-Pin).eps
9
IMP690A , 692A , 802L, 802M, 805L
IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Tel: 800-438-3722 Fax: 408-434-0335 Fax-on-Demand: 1-800-249-1614 (USA) Fax-on-Demand: 1-303-575-6156 (International) e-mail: info@impinc.com http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners.
(c) 1998 IMP, Inc. Printed in USA Preliminary Part No.: IMP 690A Document Number: IMP690A-2-9/98
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