| PART |
Description |
Maker |
| 89HPES16H16 |
Low-latency cut-through switch architecture
|
Integrated Device Techn...
|
| LTC2420I LTC2420IS8 LTC2420 LTC2420CS8 2420I LTC24 |
20-Bit uPower No Latency ADC in SO-8
24bit uPower No Latency ADC
From old datasheet system
|
LINER[Linear Technology]
|
| AOC-UINF-M2 |
Dual-Port, Low-Latency InfiniBand UIO Adapter Cards with PCI Express 2.0
|
List of Unclassifed Man...
|
| CS4362A |
114 dB, 24-bit, 192 kHz, 6- and 8-Channel D/A Converters with DSD Support & Low-Latency Digital Filtering
|
Cirrus Logic
|
| LTC2430 LTC2431 LTC2431CMS LTC2430CGN LTC2431IMS L |
20-Bit No Latency Delta-Sigma ADCs with Differential Input and Differential Reference
20-Bit No Latency Delta Sigma with Differential Input, 50/60Hz Rejection, SSOP-16
20-Bit No Latency Delta Sigma with Differential Input, 50/60Hz Rejection, MS10
|
LINER[Linear Technology]
|
| CY7C1165V18 CY7C1163V18 CY7C1161V18 CY7C1176V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18兆位的国防评估报告⑩- II SRAM字突发架构（2.5周期读写延迟
18-Mbit QDR??II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| MAQ28140FD MAQ28140FB MAQ28140FC |
Packet telecommand decoder
|
Dynex Semiconductor
|
| MA28140 |
Packet Telecommand Decoder
|
Dynex Semiconductor
|
| RPC-UHF |
Radio Packet Controller
|
http://
|
| DS34S132 DS34S132GN |
32-Port TDM-over-Packet IC
|
Maxim Integrated Products
|
| GS1572 |
EDH packet generation and insertion
|
Gennum Corporation
|
