PART |
Description |
Maker |
HCTS74KTR HCTS74T HCTS74DTR |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 20-LCCC -55 to 125 Radiation Hardened Dual-D Flip-Flop with
Set and Reset(抗辐射双D触发器(带置位、复位)) Radiation Hardened Dual-D Flip-Flop with Set and Reset HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
Intersil Corporation
|
74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
PHILIPS[Philips Semiconductors] NXP Semiconductors N.V.
|
MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest From old datasheet system DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc ON Semi
|
MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR 3.3V / 5VECL 8-Bit Serial/Parallel Converter Dual Binary 1-4-Decoder (High) 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset 9-Bit TTL-ECL Translator Quad TTL-ECL Translator Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter 3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable 3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 5V ECL Voltage Controlled Oscillator 3.3V ECL D-Type Flip-Flop with Set and Reset Binary to 1-8 Decoder (Low) Differential -5V ECL To TTL Translator -3.3V / -5V Triple ECL Input to PECL Output Translator 5V ECL Dual Differential 2:1 Multiplexer Quad MSTR 5V ECL Quad 4-Input OR/NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
MC74VHC74 MC74VHC74D MC74VHC74DT MC74VHC74M ON1736 |
Dual D-Type Flip-Flop with Set and Reset From old datasheet system
|
Motorola, Inc. ON Semiconductor MOTOROLA[Motorola, Inc]
|
74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位(带设置和复位的双触发器)
|
ONSEMI[ON Semiconductor]
|
74ALVC74PW 74ALVC74 74ALVC74BQ 74ALVC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger 带设置和复位功能的双D触发器;上升沿触
|
NXP Semiconductors N.V.
|
74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 From old datasheet system
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
HCTS74MS |
Flip Flop, D-Type, with Set and Reset, TTL Inputs, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil
|
74AUP1G74GD 74AUP1G74GM125 |
Low-power D-type flip-flop with set and reset; positive-edge trigger Low-power D-type flip-flop with set and reset; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors
|