PART |
Description |
Maker |
74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
74HC107D-Q100 74HCT107D-Q100 74HC107PW-Q100 |
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors
|
74HC_HCT112 74HC112PW 74HCT112PW 74HC112N 74HC112D |
74HC112;74HCT112; dual JK flip-flop with set and reset; negative-edge trigger
|
Philips
|
CD74HC107M |
<font color=red>[Old version datasheet]</font> Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
TI store
|
CD74HC112PWRE4 CD74HC112PWRG4 CD74HCT112EE4 |
<font color=red>[Old version datasheet]</font> Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger
|
TI store
|
LT1033 LT1033C LT1033CK LT1033M LT1033MK |
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70 3A. Negative Adjustable Regulator 3A, Negative Adjustable Regulator From old datasheet system
|
Linear Technology Corporation LINER[Linear Technology]
|
74ALVT16821 74ALVT16821DGG 74ALVT16821DL AV16821DL |
positive-edge trigger (3-State) 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State
|
PHILIPS[Philips Semiconductors] NXP Semiconductors
|
74ALVT162821 AV162821DL 74ALVT162821DGG 74ALVT1628 |
2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30Ω termination resistors(3-State)(30 Ω终端电阻.5V/3.3V 20位总线接口上升沿触D触发器(三态)) 2.5V/3.3V0位总线接口D型触发器,积极与30Ω终端电阻3态)(带30Ω终端电阻.5V/3.3V0位总线接口上升沿触发沿触发触发器(三态) Dual 2-Line To 4-Line Decoders/Demultiplexers 16-SO -40 to 85 2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30ohm termination resistors 3-State 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30 Ohm termination resistors (3-State)
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
74F112PC 74F112SC 74F112SJ 74F112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
74LS112 DM74LS112A DM74LS112AN DM74KS112AM |
From old datasheet system Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs
|
FAIRCHILD[Fairchild Semiconductor]
|
74LV74 74LV74D LV74 74LV74PW 74LV74PWDH 74LV74DB 7 |
DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER
|
NXP Semiconductors PHILIPS[Philips Semiconductors]
|