| PART |
Description |
Maker |
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构（2字突发结18 -兆位的DDR - II SRAM的）
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1566V1808 CY7C1566V18-400BZC CY7C1566V18-400BZ |
4M X 18 DDR SRAM, 0.45 ns, PBGA165 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor, Corp.
|
| CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| GS8662T18GE-267 |
72Mb SigmaCIO DDR-II Burst of 2 SRAM 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
GSI Technology, Inc.
|
| CY7C1423JV18-250BZXC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1548V18-300BZC CY7C1548V18-300BZI CY7C1548V18- |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 8M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1170V18-300BZXI CY7C1170V18-300BZC CY7C1170V18 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 512K X 36 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| K7K1636T2C K7K1618T2C K7K1618T2C-EI330 K7K1618T2C- |
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
1M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Samsung semiconductor
|
| GS8342R18GE-267 GS8342R36GE-167 GS8342R18E-267 GS8 |
36Mb SigmaCIO DDR-II Burst of 4 SRAM 4M X 8 DDR SRAM, 0.45 ns, PBGA165
36Mb SigmaCIO DDR-II Burst of 4 SRAM 2M X 18 DDR SRAM, 0.45 ns, PBGA165
36Mb SigmaCIO DDR-II Burst of 4 SRAM 4M X 9 DDR SRAM, 0.5 ns, PBGA165
36Mb SigmaCIO DDR-II Burst of 4 SRAM 4M X 9 DDR SRAM, 0.45 ns, PBGA165
36Mb SigmaCIO DDR-II Burst of 4 SRAM 1M X 36 DDR SRAM, 0.5 ns, PBGA165
36Mb SigmaCIO DDR-II Burst of 4 SRAM 2M X 18 DDR SRAM, PBGA165
|
GSI Technology, Inc.
|
| IDT7164 IDT7164L IDT7164L15D IDT7164L15DB IDT7164L |
Dual UART with 16-Byte Fifos, Selectable IR & 1284 Modes 80-QFP
CMOS STATIC RAM 64K (8K x 8-BIT) 8K X 8 STANDARD SRAM, 30 ns, PDIP28
8347 PBGA NO-PB W/O ENCR 8K X 8 STANDARD SRAM, 30 ns, PDIP28
CMOS STATIC RAM 64K (8K x 8-BIT) 8K X 8 STANDARD SRAM, 55 ns, CDIP28
Replaced by TL16C754B : Quad UART with 64-Byte Fifos, Auto Flow Control, Low-Power Modes 68-PLCC -40 to 85 8K X 8 STANDARD SRAM, 25 ns, PDIP28
Dual UART With 64-Byte FIFO 32-QFN 0 to 70
|
Integrated Device Techn...
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
