PART |
Description |
Maker |
STR7101 STR7000 |
(STR7101 - STR7103) Separate Excitation Switching Type (STR7000 - STR7003) Separate Excitation Switching Type
|
Sanken electric
|
IR21814 IR2181S |
High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs, All High Voltage Pins On One Side, Separate Logic and Power Ground in a 14-pin DIP package High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs in a 8-lead SOIC package
|
International Rectifier
|
MC74HC367A MC74HC367AD MC74HC367ADT MC74HC367AN ON |
Telecomm/Datacomm HC/UH SERIES, 6-BIT DRIVER, TRUE OUTPUT, PDSO16 From old datasheet system Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections Hex 3-State NonInverting Buffer with Separate 2-Bit and 4-Bit Section High-Performance Silicon-Gate CMOS
|
Motorola Mobility Holdings, Inc. ONSEMI[ON Semiconductor]
|
CY7C1415BV18-250BZI CY7C1415BV18-167BZI |
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 1M X 36 QDR SRAM, 0.45 ns, PBGA165 36-Mbit QDR™-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp. CYPRESS SEMICONDUCTOR CORP
|
MAX6453 MAX6453UT16S MAX6453UT23S MAX6453UT26S MAX |
µP Supervisors with Separate VCC Reset and Manual Reset Outputs µP Supervisors with Separate V uP Supervisors with Separate VCC Reset and Manual Reset Outputs ?P Supervisors with Separate VCC Reset and Manual Reset Outputs
|
MAXIM INTEGRATED PRODUCTS INC MAXIM - Dallas Semiconductor MAXIM[Maxim Integrated Products] Maxim Integrated Products, Inc.
|
ADDAC80 ADDAC87CBI-I ADDAC87CBI-V ADDAC85MILCBII8 |
Complete Low Cost Hybrid 12-Bit D/A Converter, -55 to 125C Complete Low Cost Hybrid 12-Bit D/A Converter, -25 to 85C Complete Low Cost Hybrid 12-Bit D/A Converter 0to 70C Complete Low Cost Hybrid 12-Bit D/A Converter, -25 to 85°C Complete Low Cost Hybrid 12-Bit D/A Converter, -55 to 125°C From old datasheet system IC,D/A CONVERTER,SINGLE Complete low cost, linearity error /- 1/2 LBS, binary input
|
Analog Devices adi
|
CY7C1472BV25-167BZXC CY7C1472BV25-167BZXI CY7C1472 |
2M X 36 ZBT SRAM, 3 ns, PBGA165 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL?/a> Architecture
|
CYPRESS SEMICONDUCTOR CORP
|
CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
1H0263-3 |
250 MHz - 500 MHz RF/MICROWAVE 90 DEGREE HYBRID COUPLER, 0.3 dB INSERTION LOSS-MAX Hybrid Couplers
|
ANAREN INC Anaren Microwave
|