| PART |
Description |
Maker |
| MC100EP35DG MC100EP35DR2 |
3.3V / 5V ECL JK Flip−Flop 100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
ON Semiconductor
|
| ECLSOIC8EVB NB6L16D MC100EL01D MC100EL04D MC100EL0 |
3.3V / 5V ECL JK Flip Flop
5V ECL 2-Input XOR/XNOR
5V ECL Divide by 2 Divider
Evaluation Board Manual for High Frequency SOIC 8
|
ONSEMI[ON Semiconductor]
|
| MC10EP29MNTXG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC20
|
ON Semiconductor
|
| MC10EL3506 MC100EL35DR2 MC100EL35DR2G MC10EL35DR2 |
5V ECL JK Flip-Flop
|
ONSEMI[ON Semiconductor]
|
| MC10EL35-D |
5V ECL JK Flip-Flop
|
ON Semiconductor
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| MC100LVEL51DR2G MC100LVEL5106 MC100LVEL51MNR4G MC1 |
3.3V ECL Differential Clock D Flip-Flop
|
ONSEMI[ON Semiconductor]
|
| MC100EL31D MC100EL31DG MC100EL31DR2 MC100EL31DR2G |
5 V ECL D Flip-Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC100EP31 MC100EP31DG MC100EP31DR2G MC100EP31DTG M |
3.3V / 5V ECL D Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC100EP51DTR2 MC100EP51DT MC100EP51DR2 MC100EP51D |
3.3V / 5V ECL D Flip-Flop with Reset and Differential Clock
|
ONSEMI[ON Semiconductor]
|
| MC100EL30DW MC100EL30DWG MC100EL30DWR2 MC100EL30DW |
5V ECL Triple D Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| NB4L52 |
2.5 to 5.5V ECL D-Flip-flop w/Diff Reset & Input Terms
From old datasheet system
|
ON Semiconductor
|
