| PART |
Description |
Maker |
| HDMP-1034A |
HDMP-1034A 路 1.4 GBd Receiver Chip with CIMT Encoder/Decoder and Variable Data Rate
|
AGILENT
|
| 106414-1205 |
QSFP to MPO Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate, 2dB Loss Budget, Cable Length 5.0m
|
Molex Electronics Ltd.
|
| 1064101200 |
QSFP to QSFP Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate
|
Molex Electronics Ltd.
|
| K4D26323RA-GC |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| K4D26323AA-GL |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| HA7-2840883 FN3594 HA1-2840_883 HA1-2840883 HA7-28 |
From old datasheet system
Very High Slew Rate Wideband Operational Amplifier
Very High Slew Rate/ Wideband Operational Amplifier
Very High Slew Rate,
Wideband Operational Amplifier(高转换率、宽带运算放大器)
Very High Slew Rate, Wideband Operational Amplifier 甚高摆率，宽带运算放大器
Very High Slew Rate, Wideband Operational Amplifier OP-AMP, 6000 uV OFFSET-MAX, 500 MHz BAND WIDTH, CDIP14
|
INTERSIL[Intersil Corporation]
Intersil, Corp.
|
| ADL5565 |
High Performance 65 MHz Bandwidth Quad IF Receiver with Antialiasing Filter and 184.32 MSPS Sampling Rate
|
Analog Devices
|
| M13L2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S128324A-2M |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| NT5DS4M32EG-6 NT5DS4M32EG NT5DS4M32EG-5 NT5DS4M32E |
1M 】 32 Bits 】 4 Banks Double Data Rate Synchronous RAM With Bi-Directional Data Strobe and DLL
|
NANOAMP[NanoAmp Solutions, Inc.]
|
