| PART |
Description |
Maker |
| 74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC74VHCT574A MC74VHCT74A ON1761 MC74VHCT74AD MC74V |
From old datasheet system
Dual D-Type Flip-Flop with Set and Reset
OCTAL D-TYPE FLLP-FLOP WITH SET AND RESET
|
ON Semiconductor
Motorola
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| 74LVC74A |
Dual D-type flip-flop with set and
|
Philips
|
| MC10EP29MNTXG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC20
|
ON Semiconductor
|
| MC74VHC74DR2G MC74VHC74DR2 MC74VHC74DTR2 MC74VHC74 |
Dual D?Type Flip?Flop with Set and Reset
Dual D−Type Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| 74AHCT74 74AHC74 74AHC74D 74AHC74PW 74AHC74PWDH 74 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
| MC74LVX74 MC74LVX74DT ON1600 MC74LVX74D MC74LVX74M |
From old datasheet system
LOW-VOLTAGE CMOS
DUAL D-TYPE FLIP-FLOP WITH SET AND CLEAR WITH 5V-TOLERANT INPUTS
|
MOTOROLA[Motorola, Inc]
ONSEMI[ON Semiconductor]
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
