PART |
Description |
Maker |
BBS-15 BBS-1/4 BBS-2/10 BBS-1-8/10 BBS-10 BBS-1-6/ |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit DDR-II SRAM 2-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 36-Mbit QDR-II SRAM 4-Word Burst Architecture Fuse 256K (32K x 8) Static RAM 64/256/512/1K/2K/4K x 18 Synchronous FIFOs Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Neuron® Chip Network Processor 64-Kbit (8K x 8) Static RAM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture 保险
|
NXP Semiconductors N.V.
|
PD46185092BF1-E40-EQ1 PD46185182BF1-E40-EQ1 PD4618 |
18M-BIT QDRTM II SRAM 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
R1Q2A3636ABG60RB0 R1Q3A3636ABG60RB0 R1Q4A3636ABG60 |
36-Mbit QDR⑩II SRAM 2-word Burst 36-Mbit QDR垄芒II SRAM 2-word Burst
|
Renesas Electronics Corporation
|
CY7C1514V18 CY7C1514V18-200BZC CY7C1514V18-250BZC |
72-Mbit QDR-II?SRAM 2-Word Burst Architecture 72-Mbit QDR-II(TM) SRAM 2-Word Burst Architecture 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture 72-MBIT QDR-II⒙ SRAM 2-WORD BURST ARCHITECTURE 72-Mbit QDR-II SRAM 2-Word Burst Architecture
|
CYPRESS[Cypress Semiconductor]
|
HM66AEB18205 HM66AEB18205BP-33 HM66AEB18205BP-30 H |
Memory>Fast SRAM>QDR SRAM 36-Mbit DDR II SRAM Separate I/O 2-word Burst
|
Renesas Technology / Hitachi Semiconductor
|
HM66AQB18202BP-40 HM66AQB18202BP-50 HM66AQB18202BP |
Memory>Fast SRAM>QDR SRAM 36-Mbit QDRTMII SRAM 2-word Burst
|
Renesas Technology / Hitachi Semiconductor
|
CY7C1313CV18-167BZC CY7C1315CV18-167BZC CY7C1911CV |
18-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture 18-Mbit QDR??II SRAM 4-Word Burst Architecture 18-Mbit QDR?II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor
|
CY7C1426AV18 |
36-Mbit QDR-II SRAM 4-Word Burst Architecture(4字Burst结构,36-Mbit QDR-II SRAM)
|
Cypress Semiconductor Corp.
|
CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构(2.0周期读写延迟 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 1M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
CY7C1511V18-250BZC CY7C1511V18-167BZC |
72-Mbit QDRII SRAM 4-Word Burst Architecture 8M X 8 QDR SRAM, 0.5 ns, PBGA165
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
CY7C1310CV18-167BZC CY7C1310CV18-167BZI CY7C1314CV |
18-Mbit QDR-II垄芒 SRAM 2-Word Burst Architecture 18-Mbit QDR-II SRAM 2-Word Burst Architecture 18-Mbit QDR-II?/a> SRAM 2-Word Burst Architecture 18-Mbit QDR-II?SRAM 2-Word Burst Architecture
|
Cypress Semiconductor
|
R1Q2A3609 R1Q2A3636 R1Q2A3618 R1Q2A3609ABG-60R R1Q |
36-Mbit QDRII SRAM 2-word Burst 36-Mbit QDR™II SRAM 2-word Burst
|
Renesas Electronics Corporation. Renesas Electronics, Corp.
|