| PART |
Description |
Maker |
| AS4DDR264M64PBG1R-5_ET AS4DDR264M64PBG1R-5_IT AS4D |
64Mx64 DDR2 SDRAM w/ SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microcircuit
|
Austin Semiconductor
|
| AS4DDR264M72PBG1R-5_ET AS4DDR264M72PBG1R-5_IT AS4D |
64Mx72 DDR2 SDRAM w/ SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microcircuit
|
Austin Semiconductor
|
| AN1078 |
ST7 PWM DUTY CYCLE SWITCH IMPLEMENTING TRUE 0% & 100% DUTY CYCLE
|
SGS Thomson Microelectronics
|
| ADXL210E ADXL210JE ADXL210AE ADXL210 |
0 g Dual Axis Accelerometer with Duty Cycle Outputs
ADXL210E: Low-Cost 10 g Dual-Axis Accelerometer with Duty Cycle Data Sheet (Rev. 0. 5/02)
|
AD[Analog Devices]
|
| ISANET-EVAL-KT 21553 |
ISAnet-EVAL-KT - PCnet-ISA II Based Shared Memory Evaluation Platform
ISAnet-EVAL-KT 40.8KB (PDF) ISAnet热解，KT公司40.8KB（PDF格式
|
Advanced Micro Devices
|
| IS61VPS102418A-250B2I IS61LPS102418A-200B2 IS61VPS |
256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA119
256Kx72,512Kx36,1024Kx18 18Mb SYNCHRONOUS PIPELINED,SINGLE CYCLE DESELECT STATIC RAM
|
Integrated Silicon Solution, Inc.
Integrated Silicon Solu...
|
| UT1553BRTIGCA UT1553B-RTIPC 5962-8862801-XA 5962-8 |
RTI remote terminal interface. 10% to 35% clock duty cycle. Jan class Q. Lead finish optional.
RTI remote terminal interface. 10% to 35% clock duty cycle. Jan class Q. Lead finish gold.
RTI remote terminal interface. 10% to 35% clock duty cycle. Jan class Q. Lead finish solder.
From old datasheet system
BCRT Bus Controller/Remote Terminal/Monitor
|
Aeroflex Circuit Technology
ETC[ETC]
|
| MAX887 MAX887HC_D MAX887HESA MAX887HC/D |
100% Duty Cycle, Low-Noise, Step-Down, PWM DC-DC Converter
100% Duty Cycle, Low-Noise, Step-Down, PWM DC-DC Converter
100% Duty Cycle / Low-Noise / Step-Down / PWM DC-DC Converter
CAP,3.3uF,100VDC,20-% Tol,20 % Tol
|
MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
|
| IDT71V67802150BQI IDT71V67802150BG IDT71V67602150P |
256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect 256 × 36，为512k × 18 3.3同步SRAM.5VI / O的脉冲计数器输出流水线，单周期取
256K X 36/ 512K X 18 3.3V Synchronous SRAMs 2.5V I/O/ Burst Counter Pipelined Outputs/ Single Cycle Deselect
|
Integrated Device Technology, Inc.
|
| CY7C1561V18-333BZC CY7C1561V18-333BZI CY7C1563V18 |
72-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
72-Mbit QDR?II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| SWE6420 |
Deep cycle battery
|
Shenzhen Sunnyway Battery Tech Co.Ltd.
|
