| PART |
Description |
Maker |
| CY7C1380C-200AC CY7C1380C-200BGC CY7C1380C-167AC C |
Memory : Sync SRAMs
PUSHBUTTON, METAL, FLAT, 22MM 5A; Switch function type:NC/NO Mom; Voltage, contact AC max:250V; Temp, op. max:55(degree C); Temp, op. min:-20(degree C); Diameter, panel cut-out:22.2mm; Length / Height, external:32mm; Dielectric RoHS Compliant: Yes
18-Mb (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.8 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 2.8 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 3 ns, PQFP100
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 2.8 ns, PQFP100
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 3.4 ns, PQFP100
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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| UPD42S16100LLA-A80 UPD42S16100LG3-A80-7JD UPD42S17 |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM
18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM
9-Mbit (256K x 32) Pipelined DCD Sync SRAM
9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM
18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
x1 Fast Page Mode DRAM x1快速页面模式的DRAM
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TOKO, Inc.
EPCOS AG
|
| IDT71T75802 IDT71T75802S100BG IDT71T75802S100BGI I |
512K x 36, 1M x 18 2.5V Synchronous ZBT⑩ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
512K X 36, 1M X 18 2.5V SYNCHRONOUS ZBT⒙ SRAMS 2.5V I/O, BURST COUNTER PIPELINED OUTPUTS
512K x 36 1M x 18 2.5V Synchronous ZBT SRAMs 2.5V I/O Burst Counter Pipelined Outputs
512K x 36, 1M x 18 2.5V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
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IDT[Integrated Device Technology]
|
| AS7C33512PFD32_36A AS7C33512PFD32_36A.V1.3 AS7C335 |
3.3V 512K x 32/36 pipelined burst synchronous SRAM 512K X 32 STANDARD SRAM, 3.4 ns, PQFP100
3.3V 512K x 32/36 pipelined burst synchronous SRAM 512K X 32 STANDARD SRAM, 3.8 ns, PQFP100
From old datasheet system
Sync SRAM - 3.3V
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| IDT71V802S133PFI IDT71V802S133BQI IDT71V67602S133P |
256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect 256 × 36，为512k × 18 3.3同步SRAM2.5VI / O的脉冲计数器输出流水线，单周期取
256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect 256K X 36 CACHE SRAM, 4.2 ns, PQFP100
256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect 256 × 36，为512k × 18 3.3同步SRAM.5VI / O的脉冲计数器输出流水线，单周期取
256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect 256K X 36 CACHE SRAM, 3.8 ns, PQFP100
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Integrated Device Technology, Inc.
|
| CY7C1360A CY7C1360A-166AC CY7C1360A-225AC CY7C1360 |
256K x 36/512K x 18 Synchronous Pipelined Burst SRAM
|
CYPRESS[Cypress Semiconductor]
|
| CY7C1366B-200BGI CY7C1366B-200BGC CY7C1366B-225BGI |
Low Cost, 300 MHz Rail-to-Rail Amplifier (Single); Package: SOT-23; No of Pins: 5; Temperature Range: Industrial 512K X 18 CACHE SRAM, 3.5 ns, PQFP100
CONNECTOR ACCESSORY 512K X 18 CACHE SRAM, 3 ns, PQFP100
9-Mb (256K x 36/512K x 18) Pipelined DCD Sync SRAM 512K X 18 CACHE SRAM, 2.8 ns, PBGA119
9-Mb (256K x 36/512K x 18) Pipelined DCD Sync SRAM 256K X 36 CACHE SRAM, 2.8 ns, PBGA165
9-Mb (256K x 36/512K x 18) Pipelined DCD Sync SRAM 9 - MB的（256 × 36/512K × 18）流水线双氰胺同步静态存储器
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Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| CY7C1303AV25-100BZC CY7C1306AV25-100BZC CY7C1303AV |
Memory : Sync SRAMs
18-Mb Burst of 2 Pipelined SRAM with QDR(TM) Architecture
18-Mb Burst of 2 Pipelined SRAM with QDR⑩ Architecture
18-Mb Burst of 2 Pipelined SRAM with QDR Architecture
18-Mb Burst of 2 Pipelined SRAM with QDR?/a> Architecture
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Cypress Semiconductor
|
| BBF2805SE BBF2815S BBF2812S BBF2805SK BBF2803SH BB |
3.3V, 20W DC-DC converter
15V, 20W DC-DC converter
12V, 20W DC-DC converter
Analog IC
18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL™ Architecture
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture
18-Mbit QDR™-II SRAM 2-Word Burst Architecture
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture
20W DC-DC Converter(输出功率20WDC-DC转换
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M.S. Kennedy Corp.
M.S. Kennedy Corporation
|
| A67P9318E-4.2F A67P8336 A67P8336E A67P8336E-2.6 A6 |
DIODE ZENER SINGLE 500mW 5.6Vz 20mA-Izt 0.05 5uA-Ir 3Vr DO35-GLASS 5K/AMMO
512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM 12k × 1856 × 36 LVTTL，流水线ZeBL的SRAM
GIGABASE 350 CAT5E PATCH 5 FT, SNAGLESS, WHITE 12k × 1856 × 36 LVTTL，流水线ZeBL的SRAM
512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM 512k × 1856 × 36 LVTTL，流水线ZeBL的SRAM
512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM 12k × 18256 × 36 LVTTL，流水线ZeBL的SRAM
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AMICC[AMIC Technology]
AMIC Technology Corporation
AMIC Technology, Corp.
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