| PART |
Description |
Maker |
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| 74ALVC74 |
Dual D-type flip-flop with set and
|
Philips
|
| MC74VHC74DR2G MC74VHC74DR2 MC74VHC74DTR2 MC74VHC74 |
Dual D?Type Flip?Flop with Set and Reset
Dual D−Type Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| 74LV74D-Q100 74LV74PW-Q100 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 74AHC74D-Q100 74AHCT74D-Q100 74AHC74BQ-Q100 74AHC7 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 74LV74 74LV74D LV74 74LV74PW 74LV74PWDH 74LV74DB 7 |
DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| 74AHC74D118 74AHCT74D 74AHC74PW-T 74AHCT74D-T 74AH |
Dual D-type flip-flop with set and reset; positive-edge trigger
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors N.V.
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| MC74LVX74DR2 MC74LVX74DR2G MC74LVX74DTR2 MC74LVX74 |
Dual D−Type Flip−Flop with Set and Clear
|
ONSEMI[ON Semiconductor]
|
