PART |
Description |
Maker |
74F109 I74F109D I74F109N N74F109D N74F109N 74F109_ |
Positive J-K positive edge-triggered flip-flops F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 From old datasheet system Positive J-Knot positive edge-triggered flip-flops
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NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
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74LCX74SJ 74LCX74MX_NL 74LCX74 74LCX74BQX 74LCX74M |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC14
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FAIRCHILD[Fairchild Semiconductor] Fairchild Semiconductor, Corp.
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74VHCT74A 74VHCT74AM 74VHCT74ASJ 74VHCT74 74VHCT74 |
Octal D-type Edge-Triggered Flip-Flops With 3-State Outputs 20-SOIC -40 to 85 AHCT/VHCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 Dual D-Type Flip-Flop with Preset and Clear AHCT/VHCT/VT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
HCTS374T HCTS374KTR HCTS374DTR |
Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 20-LCCC -55 to 125 1024 x 18 Synchronous FIFO Memory 68-CPGA -55 to 125 Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered
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Intersil Corporation
|
74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 From old datasheet system
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation Intersil, Corp.
|
M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储 Triple 3-Input Positive-AND Gates 14-SO 0 to 70 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70 Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70 Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70 2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM 2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V. 意法半导 STMICROELECTRONICS[STMicroelectronics] ST Microelectronics
|
DV74AC109 DV74ACT109 |
Dual JK Positive Edge-triggered Flip-Flop
|
AVG Semiconductors(HITEK)
|
MC74ACT109 MC74ACT109D MC74ACT109N MC74AC109 MC74A |
From old datasheet system DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
|
Motorola, Inc. ON Semiconductor
|
74LVQ74-01 |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
|
Fairchild Semiconductor
|
HD74LS74A-15 |
Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
74F50109 N74F50109N N74F50109D |
Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics
|
NXP Semiconductors PHILIPS[Philips Semiconductors]
|