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    Intel
Part No. A82596DX KU82596DX KU82596SX
OCR Text ...lieves the cpu of byte transfer overhead. buffers containing errored or collided frames can be automatically recovered with- out cpu intervention. the 82596dx/sx provides an upgrade path for existing 82586 software drivers by providing an 8...
Description High-performance 32-bit local area network coprocessor

File Size 764.91K  /  77 Page

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    Rotary
Part No. SPO18
OCR Text ... column to ensure grounding of overhead limit switch. star washers are not needed when mounting to left side column. notice the column extension mounting, fig. 4, and over - head limit switch mounting as well in fig. 5. important c...
Description (SPO15 / SPO18) Installation Instructions

File Size 2,178.31K  /  12 Page

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    Intel
Part No. 82596DX
OCR Text ...lieves the CPU of byte transfer overhead Buffers containing errored or collided frames can be automatically recovered without CPU intervention The 82596DX SX provides an upgrade path for existing 82586 software drivers by providing an 82586...
Description HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

File Size 753.74K  /  78 Page

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    Transwitch
Part No. TXC-03456
OCR Text ...rial access is provided for the overhead communications bits in the format. An alarm indication port is provided for ring configuration applications. * Maps an asynchronous 139.264 Mbit/s tributary into an AU-4/VC-4 STS-3c/SPE. * Nibble ...
Description L4M Device Level 4 Mapper

File Size 859.38K  /  96 Page

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    NOIL1SE0300A-QDC NOIL1SM0300A NOIL1SM0300A-QDC NOIL1SM0300A-WWC

ON Semiconductor
Part No. NOIL1SE0300A-QDC NOIL1SM0300A NOIL1SM0300A-QDC NOIL1SM0300A-WWC
OCR Text ...s on the input clock, the frame overhead t ime (fot) and the row overhead time (rot). the frame period is calculated as follows frame period = fot + nr. lines * (rot + nr. pixels * clock period) example: read out of the full resolution a...
Description LUPA300 CMOS Image Sensor

File Size 450.07K  /  30 Page

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    ADSP-21368

Analog Devices
Part No. ADSP-21368
OCR Text ... and bitreverse addressing Zero-overhead looping with single-cycle loop setup, providing efficient program sequencing Single Instruction Multiple Data (SIMD) architecture provides: Two computational processing elements Concurrent execution ...
Description High-Performance 32-bit Floating-Point SHARC Processor for Professional Audio Applications

File Size 1,258.62K  /  49 Page

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    Intel
Part No. 82596CA
OCR Text ... efficiency (minimum contention overhead) with networks of any length Its highly flexible CSMA CD unit supports address field lengths of zero through six bytes for IEEE 802 3 Ethernet frame delimitation It also supports 16- or 32-bit cyclic...
Description HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

File Size 728.51K  /  77 Page

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    AGERE[Agere Systems]
Part No. TTSV02622 TTSV02622V2-DB
OCR Text ... (optional). Selected transport overhead (TOH) bytes insertion and detection for interdevice communication via the TOH serial link. Streamlined pointer processor (pointer mover) for 8 kHz frame alignment. FIFOs for alignment of incoming dat...
Description STS-24 Backplane Transceiver

File Size 641.04K  /  64 Page

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    29323-BRF-001-A 29323-BRF-001-A-15

M/A-COM Technology Solutions, Inc.
M/A-COM Technology Solu...
Part No. 29323-BRF-001-A 29323-BRF-001-A-15
OCR Text ...t/sdh framers support transport overhead access; includes monitor and generator ? sts-12/stm-4 sonet/sdh tdm supporting mapping/demapping of 12 sts-1e or au-3 into/from sts 12/stm-4 frame ? pointer processing ? overhead insertion and extrac...
Description 3/6-Port DS3/E3/STS-1 Integrated
Line-Card-on-a-Chip

File Size 494.34K  /  2 Page

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