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Philips
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Part No. |
TZA3017HW
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OCR Text |
...Positive Emitter Coupled Logic (pecl), Current-Mode Logic (CML) and Low Voltage Differential Signalling (lvds) * Supports co-directional and contra-directional clocking * 4-stage FIFO providing large jitter tolerance on parallel interface *... |
Description |
30-3200 Mbits/s fibre optic
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File Size |
150.04K /
40 Page |
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it Online |
Download Datasheet
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pmc
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Part No. |
2000453
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OCR Text |
...ed inputs and outputs are 3.3 V pecl/CML compatible. * Industrial temperature range (-40 C to +85 C). * 416 pin UBGA package.
APPLICATIONS
* ATM and Multiservice Switches, Routers, and Switch/Routers. * SONET/SDH Add/Drop Multiplexers w... |
Description |
From old datasheet system
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File Size |
103.26K /
2 Page |
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it Online |
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Maxim Integrated Products, Inc. MAXIM - Dallas Semiconductor
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Part No. |
MAX3981
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OCR Text |
...N-1.0, Interfacing Between CML, pecl, and lvds. The common-mode voltages of the input and output are above 2.5V. ACcoupling capacitors are required when interfacing this part. Values of 0.10F or greater are recommended.
General Theory of... |
Description |
3.125Gbps XAUI Quad Cable Equalizer
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File Size |
766.90K /
9 Page |
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it Online |
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Linear
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Part No. |
LTC1748
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OCR Text |
...y be driven differentially from pecl, GTL and other low swing logic families or from single-ended TTL or CMOS. The low noise, high gain ENC ...lvds. When using a single-ended encode signal asymmetric rise and fall times can result in duty cycl... |
Description |
5V, 80Msps, Low Noise ADC Parallel Interface
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File Size |
548.24K /
20 Page |
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it Online |
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MAXIM - Dallas Semiconductor
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Part No. |
MAX3693EVKIT
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OCR Text |
...rface with lvds inputs and 3.3V pecl outputs. The lvds inputs (PD_+, PD_-, PCLKI+, PCLKI-, RCLK+, RCLK-) are internally terminated with 100 differential input resistance, and therefore do not require external termination. Ensure that lvds d... |
Description |
Evaluation Kit for the MAX3693
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File Size |
82.00K /
4 Page |
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it Online |
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Price and Availability
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