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cmos lvpecl lvds Datasheet PDF File

For cmos lvpecl lvds Found Datasheets File :: 1096 Search Time::7.313ms
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				ONSEMI[ON Semiconductor]
Part No.	MC100EPT20 MC100EPT20DR2 MC100EPT20DT MC100EPT20DTG MC100EPT20DG MC100EPT20DTR2 MC10EPT20DTR2 MC100EPT20D MC10EPT20 MC10EPT20D MC10EPT20DR2 MC10EPT20DT
OCR Text	cmos to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SO...lvpecl 6 NC FUNCTION Differential PECL Outputs LVTTL Input Positive Supply Ground No Connect NC ...
Description	3.3VLVTTL/LVcmos to Differential lvpecl Translator 3.3V LVTTL/LVcmos to Differential lvpecl Translator 3.3VLVTTL/LVcmos TO DIFFERENTIAL lvpecl TRANSLATOR
File Size	65.51K / 8 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY58019UMGTR SY58019UMITR SY58017U SY58026U SY58052U SY58016L SY58018U SY58019U SY58019UMG SY58025U SY58027U SY58051U
OCR Text	...Output Swing /Q0 SEL (TTL/cmos) TIME (20ps/div.) (2 23 (100mV/div.) 1PRBS) Precision Edge is a registered trademark of Micr...lvpecl output pair is the output of the device. Terminate through 50 to VCC - 2V. See "Output Interf...
Description	ULTRA-PRECISION DIFFERENTIAL 400MV lvpecl 2:1 MUX WITH INTERNAL TERMINATION
File Size	322.24K / 12 Page	View it Online	Download Datasheet

				ZARLINK[Zarlink Semiconductor Inc]
Part No.	ZL30406QGC ZL30406QGC1 ZL30406
OCR Text	....52 MHz Provides a single-ended cmos clock at 19.44 MHz Provides enable/disable control of output clocks Accepts a cmos reference at 19.44 M...lvpecl differential output clocks at 77.76 MHz, a CML differential clock programmable to 19.44 MHz, ...
Description	SONET/SDH CLOCK MULTIPLIER PLL
File Size	296.83K / 21 Page	View it Online	Download Datasheet

				ZARLINK[Zarlink Semiconductor Inc]
Part No.	ZL30406QGG1 ZL30407 MT90401 MT9046 ZL30406 ZL30406_06 ZL30406QGC
OCR Text	....52 MHz Provides a single-ended cmos clock at 19.44 MHz Provides enable/disable control of output clocks Accepts a cmos reference at 19.44 M...lvpecl differential output clocks at 77.76 MHz, a CML differential clock programmable to 19.44 MHz, ...
Description	SONET/SDH CLOCK MULTIPLIER PLL
File Size	236.12K / 21 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	NB6N14S NB6N14SMNR2G NB6N14SMNG
OCR Text	...LTAGE (130 mV/div) EN (LVTTL/cmos) VREF_AC Device DDJ = 10 ps D Q Q3 Q3 Figure 1. Logic Diagram ORDERING INFORMATION See detail...lvpecl, CML, lvds lvpecl Output 11 12 13 14 15 16 - VT IN GND VCC Q0 Q0 EP lvpecl Output LV...
Description	3.3 V 1:4 AnyLevel Differential Input to lvds Fanout Buffer/Translator
File Size	169.08K / 10 Page	View it Online	Download Datasheet

For cmos lvpecl lvds Found Datasheets File :: 1096 Search Time::7.313ms
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