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Micon Design Technology Corporation
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Part No. |
MT41J128M8 128M8 MT41J256M4 MT41J64M16
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OCR Text |
...ntial bidirectional data strobe 8n-bit prefetch architecture Differential clock inputs (CK, CK#) 8 internal banks Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals CAS (READ) latency (CL): 5, 6, 7, 8, 9, 10, or... |
Description |
1Gb: x4, x8, x16 DDR3 SDRAM
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File Size |
8,146.20K /
181 Page |
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Samsung semiconductor
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Part No. |
K7S3236T4C K7S3218T4C
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OCR Text |
...E,6F,6G,6H,6J,6K,5L-7L,4M,8M,4N,8N 10R 11R 2R 1R 2A,3A,10A,6C,6R DESCRIPTION Input Clock Q Valid output Output Echo Clock DLL Disable Addres...bit sequential for both read and write operations, requiring two full clock bus cycles. Any request ... |
Description |
1Mx36 & 2Mx18 QDRTM II b4 SRAM
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File Size |
441.06K /
20 Page |
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Integrated Silicon Solution, Inc
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Part No. |
IS61DDPB22M36 IS61DDPB22M36-375M3 IS61DDPB22M36-375M3L IS61DDPB22M36-400M3 IS61DDPB22M36-400M3L IS61DDPB24M18-375M3 IS61DDPB24M18-375M3L IS61DDPB24M18-400M3 IS61DDPB24M18-400M3L
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OCR Text |
...6L, 7L, 4M, 5M, 6M, 7M, 8M, 4N, 8N 11H 10R, 11R, 2R 1R 2A, 1B, 9B, 10B, 1C, 2C, 9C, 1D, 9D, 10D, 1E, 2E, 9E, 1F, 9F, 10F, 1G, 9G, 10G, 1J, 2...bit. 2. X = don't care; H = logic "1"; L = logic "0". 3. A read operation is started when control si... |
Description |
72 Mb (2M x 36 & 4M x 18) DDR-IIP (Burst of 2) CIO Synchronous SRAMs
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File Size |
584.40K /
24 Page |
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Integrated Silicon Solution, Inc
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Part No. |
IS61QDPB42M36-400M3 IS61QDPB42M36-400M3L IS61QDPB44M18-400M3L IS61QDPB42M36-300M3 IS61QDPB42M36-300M3L IS61QDPB42M36-333M3 IS61QDPB42M36-333M3L IS61QDPB42M36-375M3 IS61QDPB42M36-375M3L IS61QDPB44M18-300M3 IS61QDPB44M18-300M3L IS61QDPB44M18-333M3 IS61QDPB44M18-333M3L IS61QDPB44M18-375M3 IS61QDPB44M18-375M3L IS61QDPB44M18-400M3
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OCR Text |
...6L, 7L, 4M, 5M, 6M, 7M, 8M, 4N, 8N 11H 10R, 11R, 2R 1R 2A, 10A, 6C, 6P, 6R 2A, 7A, 1B, 5B, 9B, 10B, 1C, 2C, 6C, 9C, 1D, 9D, 10D, 1E, 2E, 9E,...bit linear; that is, when first address is A0+0, next internal burst addresses are A0+1, A0+2, and A... |
Description |
72 Mb (2M x 36 & 4M x 18) QUADP (Burst of 4) Synchronous SRAMs
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File Size |
644.64K /
28 Page |
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Price and Availability
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