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  ioapic Datasheet PDF File

For ioapic Found Datasheets File :: 321    Search Time::1.625ms    
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    ICS9147-03 ICS9147F-03

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS9147-03 ICS9147F-03
OCR Text ...2.9 to 2.5V) for CPUL (1:2) and ioapic outputs. Features * Total of 15 CPU speed clocks: - Two copies of CPU clock with VDDL (2.5 to 3.3V) - Twelve (12) SDRAM (3.3v) plus one CPUH/AGP (3.3V) clocks Six copies of BUS clocks (synchronous ...
Description Frequency Generator & Integrated Buffers for 686 Series CPUs

File Size 363.98K  /  8 Page

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    ICS9147-06 ICS9147F-06

ICST[Integrated Circuit Systems]
Part No. ICS9147-06 ICS9147F-06
OCR Text ...ng 505% duty cycle. The REF and ioapic clock outputs typically provide better than 0.5V/ns slew rates. Separate buffer supply pins VDDL allow for nominal 3.3V voltage or reduced voltage swing (from 2.9 to 2.5V) for CPU (1:4) and ioapic outp...
Description Frequency Generator & Integrated Buffers for PENTIUMTM

File Size 409.17K  /  6 Page

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    ICS9147-09 ICS9147F-09

ICST[Integrated Circuit Systems]
Part No. ICS9147-09 ICS9147F-09
OCR Text ...2.9 to 2.5V) for CPUL (1:2) and ioapic outputs. Features Total of 15 CPU speed clocks: - Two copies of CPU clock with VDDL (2.5 to 3.3V) - Twelve (12) SDRAM (3.3v) plus one CPUH/AGP (3.3V) clocks Six copies of BUS clock (synchronous wi...
Description Frequency Generator & Integrated Buffers for 686 Series CPUs

File Size 553.10K  /  9 Page

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    ICS9147-12 ICS9147F-12

ICST[Integrated Circuit Systems]
Part No. ICS9147-12 ICS9147F-12
OCR Text ...the crystal frequency, plus the ioapic output powered by VDDL. Additionally, the device meets the Pentium power-up stabilization, which requires that CPU and PCI clocks be stable within 2ms after power-up. High drive PCICLK and SDRAM output...
Description Pentium/ProTM System and Cyrix⑩ Clock Chip
Pentium/ProTM System and Cyrix Clock Chip

File Size 448.23K  /  9 Page

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    ICS9147-14 ICS9147F-14

ICST[Integrated Circuit Systems]
Part No. ICS9147-14 ICS9147F-14
OCR Text ... 2.9 to 2.5V) for CPU (0:3) and ioapic outputs. Block Diagram Four copies of CPU clock Twelve SDRAM (3.3V TTL), usable asAGP clocks Seven copies of PCICLK clock (synchronous with CPU clock/2 or CPU/2.5 for 75 and 83.3 MHz CPU) CPU clo...
Description Frequency Generator & Integrated Buffers for PENTIUM/ProTM

File Size 446.63K  /  7 Page

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    ICS9147-16 ICS9147F-16

ICST[Integrated Circuit Systems]
Part No. ICS9147-16 ICS9147F-16
OCR Text ...g 50 5% duty cycle. The REF and ioapic clock outputs typically provide better than 0.5V/ns slew rates. Separate buffer supply pins VDDL allow for nominal 3.3V voltage or reduced voltage swing (from 2.9 to 2.5V) for CPU (1:4) and ioapic outp...
Description Frequency Generator & Integrated Buffers for PENTIUMTM

File Size 372.80K  /  6 Page

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    ICS9147-22 ICS9147F-22

ICST[Integrated Circuit Systems]
Integrated Device Technology
Part No. ICS9147-22 ICS9147F-22
OCR Text ...the crystal frequency, plus the ioapic output powered by VDDL. Additionally, the device meets the Pentium powerup stabilization, which requires that CPU and PCI clocks be stable within 2ms after power-up. High drive PCICLK and SDRAM outputs...
Description Pentium-ProTM System and Cyrix Clock Chip
Pentium-ProTM System and Cyrix⑩ Clock Chip
Pentium/ProTM System and Cyrix™ Clock Chip
Pentium/ProTM System Clock Chip
High-Performance Impact-X<TM> PAL(R) Circuits 28-PLCC 0 to 75
Pentium/ProTM System and Cyrix? Clock Chip

File Size 252.51K  /  7 Page

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    ICS9148-02 ICS9148F-02

ICST[Integrated Circuit Systems]
Part No. ICS9148-02 ICS9148F-02
OCR Text ...op PCICLK (0:5) clocks. CPU and ioapic output buffer strength controlled by CPU 3.3_2.5# pin to match VDDL voltage. High drive CPUCLK outputs typically provide greater than 1 V/ns slew rate into 20pF loads. PCICLK outputs typically provide ...
Description CKM66, 430TX Main Clock, Supports to 66.6MHz
Pentium/ProTM System Clock Chip

File Size 660.71K  /  16 Page

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    ICS9148-03 ICS9148F-03

Integrated Circuit Systems
ICS
Part No. ICS9148-03 ICS9148F-03
OCR Text ...the crystal frequency. Plus the ioapic output powered by VDDL1. One 48 MHz for USB, and one 24 MHz clock for Super IO. Spread Spectrum built in - 1.5% modulation to reduce the EMI. Rise time adjustment for VDD at 3.3V or 2.5V CPU. Additiona...
Description Frequency Generator & Integrated Buffers for PENTIUM/ProTM
LX Single Chip Clock, Supports 66.6MHz

File Size 517.72K  /  12 Page

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    ICS9148-10 ICS9148YF-10 AV9148F-10

ICST[Integrated Circuit Systems]
Integrated Circuit Syst...
Part No. ICS9148-10 ICS9148YF-10 AV9148F-10
OCR Text ...enerates system clocks for CPU, ioapic, PCI, plus 14.314 MHz REF (0:2), USB, and Super I/O Supports single or dual processor systems Supports Spread Spectrum modulation for CPU & PCI clocks, down spread -1% Skew from CPU (earlier) to PCI cl...
Description Pentium/PRO system clock chip
Pentium/ProTM System Clock Chip

File Size 423.29K  /  12 Page

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For ioapic Found Datasheets File :: 321    Search Time::1.625ms    
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