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Atmel
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| Part No. |
80C32E
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| OCR Text |
...ces system power consumption by bringing the clock frequency down to any value, even dc, without loss of data. the 80c32e has 2 software-selectable modes of reduced activity for further reduction in power consumption. in the idle mode the c... |
| Description |
Radiation Tolerant ROMless version of the 80C52 single chip 8-bit microcontroller.
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| File Size |
186.18K /
20 Page |
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Atmel
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| Part No. |
AT17LV010-10DP
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| OCR Text |
...during fpga loading operations. bringing ser_en low enables the two-wire serial programming mode. for non-isp applications, ser_en should be tied to v cc . v cc 3.3v (0.3v).
5 a717lv010-10dp 4265a ? aero ? 07/03 fpga master serial mo... |
| Description |
AT17LV010-10DP Advance Information [Updated 7/03. 11 Pages]
FPGA Configuration EEPROM packaged in the 28-pin 400 mils wide FP package.
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| File Size |
133.82K /
11 Page |
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it Online |
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Atmel, Corp.
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| Part No. |
AT17LV010A
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| OCR Text |
... programming mode is entered by bringing ser_en low. in this mode the chip can be programmed by the 2-wire serial interface. the programming is done at vcc supply only. programming super voltages are generated inside the chip. see the progr... |
| Description |
1M FPGA Configuration EEPROM Memory(1M 现场可编程门阵列FPGA）配置EEPROM存储 100FPGA配置存储器（100万现场可编程门阵列（FPGA）的配置的EEPROM存储器）
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| File Size |
126.62K /
13 Page |
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it Online |
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Atmel
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| Part No. |
AT17LV002A AT17LV010A AT17LV128A AT17LV256A AT17LV512A AT17LV65A AT17LV002A-10QI AT17LV010A-10QI
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| OCR Text |
...during FPGA loading operations. bringing SER_EN Low enables the 2-wire Serial Programming Mode. For non-ISP applications, SER_EN should be tied to VCC. 3.3V (10%) and 5.0V (5% Commercial, 10% Industrial) power supply pin.
GND nCASC
A2... |
| Description |
2M-bit Configuration EEPROM (5V and 3.3V), Altera Pinout.
1M-bit FPGA Configuration EEPROM (5V and 3.3V). Altera Pinout.
128K-bit FPGA Configuration EEPROM (5V and 3.3V). Altera Pinout.
256K-bit FPGA Configuration EEPROM (5V and 3.3V). Altera Pinout.
512K-bit FPGA Configuration EEPROM (5V and 3.3V). Altera Pinout.
65K-bit FPGA Configuration EEPROM (5V and 3.3V). Altera Pinout.
FPGA configuration EEPROM memory. Memory size 2-Mbit.
FPGA configuration EEPROM memory. Memory size 1-Mbit.
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| File Size |
174.52K /
19 Page |
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it Online |
Download Datasheet |
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Atmel
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| Part No. |
AT17F16A
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| OCR Text |
... FPGA configuration operations. bringing SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications, SER_EN should be tied to VCC.
5.12
VCC
+3.3V (10%).
Notes:
1. This pin has an internal 20 K pull-up resis... |
| Description |
16 Mbit In-System Programable PROM (3.3V) for Altera.
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| File Size |
191.15K /
15 Page |
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it Online |
Download Datasheet |
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Atmel
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| Part No. |
AT17F040A AT17F080A
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| OCR Text |
... FPGA configuration operations. bringing SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications, SER_EN should be tied to VCC. +3.3V (10%).
Notes: 1. This pin has an internal 20 K pull-up resistor. 2. This pin has ... |
| Description |
4 Mbit In-System Programable PROM (3.3V)Altera Pinout
8 Mbit In-System Programable PROM (3.3V) Altera Pinout
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| File Size |
173.44K /
15 Page |
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it Online |
Download Datasheet |
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