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  267mhz Datasheet PDF File

For 267mhz Found Datasheets File :: 87    Search Time::2.813ms    
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    Samsung Semiconductor Co., Ltd.
Part No. M470T2953CZ0-LD5 M470T2953CZ3-LD5
OCR Text ...00 mhz f ck for 400mb/sec/pin, 267mhz f ck for 533mb/sec/pin, 333mhz f ck for 667mb/sec/pin, 400mhz f ck for 800mb/sec/pin ?4 banks ?posted cas ? programmable cas latency: 3, 4, 5, 6 ? programmable additive latency: 0, 1 , 2 , 3 , 4 , ...
Description 128M X 64 DDR DRAM MODULE, 0.5 ns, ZMA200 ROHS COMPLIANT, SODIMM-200

File Size 345.22K  /  20 Page

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    Samsung Semiconductor Co., Ltd.
Part No. M470T3354EZ3-LD5
OCR Text ...00 mhz f ck for 400mb/sec/pin, 267mhz f ck for 533mb/sec/pin, 333mhz f ck for 667mb/sec/pin, 400mhz f ck for 800mb/sec/pin ?4 banks ? posted cas ? programmable cas latency: 3, 4, 5, 6 ? programmable additive latency: 0, 1 , 2 , 3, 4, 5...
Description 32M X 64 DDR DRAM MODULE, 0.5 ns, ZMA200 ROHS COMPLIANT, SODIMM-200

File Size 343.91K  /  20 Page

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    Samsung Semiconductor Co., Ltd.
Part No. M470T6464AZ3-LD5 M470T2864AZ3-LD5
OCR Text ...00 mhz f ck for 400mb/sec/pin, 267mhz f ck for 533mb/sec/pin, 333mhz f ck for 667mb/sec/pin ? 8 banks ? posted cas ? programmable cas latency: 3, 4, 5 ? programmable additive latency: 0, 1 , 2 , 3 and 4 ? write latency(wl) = read latenc...
Description 64M X 64 DDR DRAM MODULE, 0.5 ns, ZMA200 ROHS COMPLIANT, SODIMM-200
128M X 64 DDR DRAM MODULE, 0.5 ns, ZMA200 ROHS COMPLIANT, SODIMM-200

File Size 421.83K  /  23 Page

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    ICS
Part No. ICS93732
OCR Text ...6 MHz 100 / 125/ 133/167MHz 200/267mhz MIN TYP 100 48 47 20 50 49.4 579 MAX 120 65 75 150 100 50.5 51 950 UNITS ps ps ps % % ps -150 Notes: 1. Refers to transition on noninverting output. 2. While the pulse skew is almost constant ove...
Description Clock Buffer

File Size 91.42K  /  9 Page

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    ICS93732 ICS93732FLF-T ICS93732G-T

ICST[Integrated Circuit Systems]
Part No. ICS93732 ICS93732FLF-T ICS93732G-T
OCR Text ...6 MHz 100 / 125/ 133/167MHz 200/267mhz MIN TYP 100 48 47 20 50 49.4 579 MAX 120 65 75 150 100 50.5 51 950 UNITS ps ps ps % % ps -150 Notes: 1. Refers to transition on noninverting output. 2. While the pulse skew is almost constant ove...
Description Low Cost DDR Phase Lock Loop Zero Delay Buffer

File Size 474.29K  /  8 Page

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    K4T51043Q K4T51043QB-GCCC K4T51043QB-GCD5 K4T51043QB-ZCCC K4T51043QB-ZCD5 K4T51083QB-GCCC K4T51083QB-GCD5 K4T51083QB-ZCC

Samsung semiconductor
Part No. K4T51043Q K4T51043QB-GCCC K4T51043QB-GCD5 K4T51043QB-ZCCC K4T51043QB-ZCD5 K4T51083QB-GCCC K4T51083QB-GCD5 K4T51083QB-ZCCC K4T51083QB-ZCD5 K4T51163QB-ZCD5
OCR Text ... 200 MHz fCK for 400Mb/sec/pin, 267mhz fCK for 533Mb/sec/pin * 4 Banks * Posted CAS * Programmable CAS Latency: 3, 4, 5 * Programmable Additive Latency: 0, 1 , 2 , 3 and 4 * Write Latency(WL) = Read Latency(RL) -1 * Burst Length: 4 , 8(Inte...
Description 512Mb B-die DDR2 SDRAM

File Size 504.88K  /  29 Page

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    ICS85320AMILF ICS85320AMILFT ICS85320I

Integrated Device Technology
Integrated Device Techn...
Part No. ICS85320AMILF ICS85320AMILFT ICS85320I
OCR Text ...tl ? maximum output frequency: 267mhz ? part-to-part skew: 275ps (maximum) ? additive phase jitter, rms: 0.05ps (typical) ? 3.3v operating supply voltage (operating range 3.135v to 3.465v) ? 2.5v operating supply voltage (operating range ...
Description LVCMOS/LVTTL-TO-DIFFERENTIAL 3.3V, 2.5V LVPECL TRANSLATOR

File Size 1,001.40K  /  16 Page

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