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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
EE801NDGI8
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OCR Text |
... generation capability plla 1 - 255 1 or 4 6 - 2047 yes no pllb 1 - 255 4 6 - 2047 yes yes pllc 1 - 255 1 or 8 bit divide 6 - 2047 yes no plld 1 - 255 1 or 4 6 - 2047 yes no vco d xdiv m ( ) f out = xdiv*m d f in * odiv (eq. 2)
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Description |
VIDEO CLOCK GENERATOR, QCC24
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File Size |
240.67K /
27 Page |
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it Online |
Download Datasheet |
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ETC[ETC]
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Part No. |
SI5321
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OCR Text |
...loss-of-input clock Support for 255/238 (15/14), 255/237 (85/79), and 66/64 FEC scaling (ITU-T G.709 and IEEE 802.3ae) Selectable loop bandw...8. PLL Self-Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... |
Description |
From old datasheet system SONET/SDH PRECISION CLOCK MULTIPLIER IC
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File Size |
384.45K /
34 Page |
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it Online |
Download Datasheet |
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Price and Availability
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