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Maxim
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| Part No. |
DS21354DK
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| OCR Text |
...........................5 Table 2. CPLD Register Map ..........................................................................................048MHz and TCLK-2.048MHz LEDs. * Due to the dual winding transformer, only the 120W line build-out c... |
| Description |
T1 Single-Chip Transceiver Design Kit Daughter Card
From old datasheet system
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| File Size |
1,080.15K /
20 Page |
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Zarlink Semiconductor
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| Part No. |
ZL30462
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| OCR Text |
...line package ? 8khz, 1.544mhz, 2.048mhz or 19.44mhz input reference frequencies ? 8khz (frame pulse), 2.048mhz, 8.192mhz, 16.384mhz, 19.44mhz and two 155.52mhz (lvpecl) output clock frequencies ? low intrinsic jitter and wander generati... |
| Description |
Compact Timing Module with 155.52 & 19.44 MHz Outputs
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| File Size |
216.87K /
22 Page |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
ZL30409_DDB ZL30409 ZL30409_DDA
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| OCR Text |
...nterfaces Selectable 19.44 MHz, 2.048MHz, 1.544MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals Provides 5 styles of 8 KHz framing pulses Holdover frequency ... |
| Description |
Dual reference frequency selectable, 3.3V Digital PLL with multiple clock outputs for T1/E1 and Stratum 4 and 4E applications, with Stratum 3 Holdover
T1/E1 System Synchronizer with Stratum 3 Holdover
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| File Size |
284.56K /
32 Page |
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Exar, Corp.
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| Part No. |
XR-T6165
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| OCR Text |
2.02 1990 exar corporation, 48720 kato road, fremont, ca 94538 (510) 668-7000 (510) 668-7010 1 may 19973 features low power cmos...048mhz clock. used to clock out pcm data. 5 5 blank i pcmout data blankin... |
| Description |
Codirectional Digital Data Processor 同向数字数据处理
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| File Size |
162.30K /
16 Page |
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EXAR[Exar Corporation]
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| Part No. |
XRT8001IP XRT8001 XRT8001ID
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| OCR Text |
...ming reference of 1.54MHz (T1), 2.048MHz (E1), 8kHz, 56kHz, or 64kHz The XRT8001 WAN Clock can be configured to operate in one of six modes: 1. The Forward/Master Mode 2. The Reverse/Master Mode 3. The "Fractional T1/E1" Reverse/Master Mode... |
| Description |
WAN Clock for T1 and E1 Systems
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| File Size |
1,027.52K /
48 Page |
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EXAR[Exar Corporation]
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| Part No. |
XRT8000_06 XRT8000 XRT8000ID XRT8000IP
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| OCR Text |
... harmonic of either 1.544MHz or 2.048MHz as input reference and generates 1.2kHz and multiples of 2.4kHz, 56kHz or 64kHz. In the REVERSE mode an input clock of 56kHz or 64kHz is used ORDERING INFORMATION
Part No. XRT8000IP XRT8000ID Packag... |
| Description |
Clock Synchronizer/Adapter for Communications
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| File Size |
624.22K /
24 Page |
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MAXIM - Dallas Semiconductor
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| Part No. |
DS21448DK
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| OCR Text |
...j1 line interface design kit 2 of 17 component list designation qty description supplier part 1 1 3.3v e1/t1/j1 line interface, 0...048mhz, external source (through aux clk bnc), and tri-state. mclk_src: mclk source (offset = 0x0... |
| Description |
3.3V E1/T1/J1 Line Interface Design Kit Daughter Card
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| File Size |
812.28K /
17 Page |
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Maxim
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| Part No. |
DS21448
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| OCR Text |
... on 0.63mm (22AWG) cables up to 2.5km (E1) and 6000ft (T1) in length. The user has the option to use internal receive termination, software ...048MHz MCLK for both E1 and T1 applications (with the option of using a 1.544MHz MCLK in T1 applicat... |
| Description |
3.3V E1/T1/J1 Quad Line Interface
From old datasheet system
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| File Size |
745.82K /
59 Page |
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EXAR[Exar Corporation]
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| Part No. |
TAN-16
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| OCR Text |
2.048MHz) Clock Signal from an 8kHz Reference Clock
July 1998-2
The XRT8000 device can be configured to generate either a T1 (1.544MHz) or E1 (2.048MHz) rate clock signal, from a "Reference Clock signal of frequency 8kHz. The approach t... |
| Description |
How to Generate a 1.544MHz (or 2.048MHz) Clock Signal from an 8kHz Reference Clock
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| File Size |
39.27K /
6 Page |
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it Online |
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