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  single-balanced Datasheet PDF File

For single-balanced Found Datasheets File :: 5545    Search Time::2.594ms    
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    MAX9250

Maxim Integrated Products
Part No. MAX9250
OCR Text ... five control data inputs are single-bit-error tolerant output transition time is scaled to operating frequency for reduced emi stagge...balanced lvds deserializers ________________________________________________________________ maxim i...
Description (MAX9248 - MAX9250) 2.5MHz to 42MHz DC-Balanced LVDS Deserializers

File Size 233.01K  /  20 Page

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    MORNSUN Science& Techno...
Part No. LH10-10A05 LH10-10A12 LH10-10A15 LH10-10A24 LH10-10B03 LH10-10B03-15 LH10-10B05 LH10-10B09 LH10-10B12 LH10-10D0505-02
OCR Text ...- load regulation 10%-100% load single output -- 1 -- dual output(balanced load) -- 2 -- isolated triple output (balanced load) main circuit -- 3 -- auxiliary circuit -- 5 -- isolated and separated twin output (balanced load) main circu...
Description 10W, AC-DC converter
   10W, AC-DC converter

File Size 1,656.88K  /  7 Page

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    RF2713PCBA-D RF2713PCBA-M RF271306 RF2713

RFMD[RF Micro Devices]
Part No. RF2713PCBA-D RF2713PCBA-M RF271306 RF2713
OCR Text ...rters. The unit operates from a single 3V to 6V power supply. 0.157 0.150 0.018 0.014 QUADRATURE MODULATOR/DEMODULATOR RoHS Complian...balanced configuration, the input impedance would remain 1260. The mixers are Gilbert Cell designs w...
Description QUADRATURE MODULATOR/DEMODULATOR

File Size 174.16K  /  14 Page

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    MAX9254

Maxim Integrated Products
Part No. MAX9254
OCR Text single-ended lvc- mos/ lvttl outputs. a separate parallel-rate lvds clock provides the timing for deserialization. the max9242/ max9244/max9...balanced mode. the modulation rate of the spread is 32khz for a 33mhz lvds clock input and scales li...
Description (MAX9242 - MAX9254) 21-Bit Deserializers

File Size 320.73K  /  22 Page

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    SL3522CMC SL3522AMC SL3522NA1C SL3522

MITEL[Mitel Networks Corporation]
Part No. SL3522CMC SL3522AMC SL3522NA1C SL3522
OCR Text ... 2, 7 See notes 2, 6, 7 R1 = 50 single ended See note 2 Single ended See notes 2, 8 0.5 -0.59 -0.54 -0.49 1.30 18 -5 20 -0.1 30 +0.25 -05 +0...balanced Limited Output level of nominally -1.0dBm on each RF Output connection (pin 9 and 10), for ...
Description 500MHz 75dB Logarithmic/Limiting Amplifier

File Size 830.37K  /  19 Page

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    RF2713

RFMD[RF Micro Devices]
Part No. RF2713
OCR Text ...rters. The unit operates from a single 3V to 6V power supply. Optimum Technology Matching(R) Applied 0.157 0.150 0.018 0.014 0.008 0.00...balanced configuration, the input impedance would remain 1260. The mixers are Gilbert Cell designs w...
Description QUADRATURE MODULATOR/DEMODULATOR

File Size 134.65K  /  12 Page

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    TQP3M9041-PCB TQP3M9041-15

TriQuint Semiconductor
Part No. TQP3M9041-PCB TQP3M9041-15
OCR Text ...res ? 0. 33 db nfmin (single channel) at 2600 m hz ? 2 3 00 ? 6 0 00 mhz o perational bandwidth ? gain = 18 .4 db at...balanced configuration, this lna provides 18 .4 db gain, 20.2 dbm iip3 and 0. 8 db noise figure. ...
Description 2300-6000 MHz Dual LNA

File Size 598.49K  /  10 Page

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    NJ88C50 NJ88C50MA NJ88C50NP NJ88C50_MA_NP

Zarlink Semiconductor Inc
Part No. NJ88C50 NJ88C50MA NJ88C50NP NJ88C50_MA_NP
OCR Text ... input buffer, may be used with single ended prescaler output if Fimb is biased. Main synthesiser balanced input buffer, may be used with balanced prescaler output, or biased for single ended operation. Serial input for programming data. Se...
Description Dual Low Power Frequency Synthesiser

File Size 520.38K  /  17 Page

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