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SIEMENS AG
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| Part No. |
HYS64V4300GU
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| OCR Text |
...puts (ra0 ~ ra11 / ca0 ~ ca7, ca10) clk0 - clk3 clock input ba0, ba1 bank select dqmb0 - dqmb7 data mask dq0 - dq63 data input/output cs0 - cs3 chip select cb0 - cb7 check bits (x72 organization only) v dd power (+ 3.3 v) ras row addres... |
| Description |
3.3 V 4M × 64-Bit 1 Bank SDRAM Module(3.3 V 4M × 64-× 1列同步动态RAM模块)
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| File Size |
93.18K /
12 Page |
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it Online |
Download Datasheet
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SIEMENS AG
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| Part No. |
HYS64V8301GU
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| OCR Text |
...puts (ra0 ~ ra11 / ca0 ~ ca7, ca10) clk0 - clk3 clock input ba0, ba1 bank select dqmb0 - dqmb7 data mask dq0 - dq63 data input/output cs0 - cs3 chip select cb0 - cb7 check bits (x72 organization only) v dd power (+ 3.3 v) ras row addres... |
| Description |
3.3 V 8M *64/72-Bit SDRAM Modules(3.3 V 8M×64/72-Bit 同步动态RAM 模块)
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| File Size |
94.26K /
12 Page |
View
it Online |
Download Datasheet |
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Nanya Technology, Corp.
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| Part No. |
M1Y1G64TU8HA0B-3C M1U1G64TU8HA0F-3C M1U1G64TU8HA0B-3C
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| OCR Text |
...efines the column address (ca0-ca10) when sampled at the rising clock edge. in addition to the column address, ap is used to invoke autoprecharge operation at the end of the burst read or write cycle. if ap is high, autoprecharge is sele... |
| Description |
128M X 64 DDR DRAM MODULE, 0.45 ns, DMA240 GREEN, DIMM-240
128M X 64 DDR DRAM MODULE, 0.45 ns, DMA240 DIMM-240
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| File Size |
174.23K /
20 Page |
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it Online |
Download Datasheet |
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Nanya Technology, Corp.
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| Part No. |
M1Y1G64TU8HA2B-3C
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| OCR Text |
...efines the column address (ca0-ca10) when sampled at the rising clock edge. in addition to the column address, ap is used to invoke autoprecharge operation at the end of the burst read or write cycle. if ap is high, autoprecharge is sele... |
| Description |
128M X 64 DDR DRAM MODULE, 0.45 ns, DMA240 ROHS COMPLIANT, DIMM-240
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| File Size |
218.80K /
18 Page |
View
it Online |
Download Datasheet |
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Nanya Technology, Corp.
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| Part No. |
NT1GT64U8HA0B-3C NT1GT64U8HA0F-3C
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| OCR Text |
...efines the column address (ca0-ca10) when sampled at the rising clock edge. in addition to the column address, ap is used to invoke autoprecharge operation at the end of the burst read or write cycle. if ap is high, autoprecharge is sele... |
| Description |
128M X 64 DDR DRAM MODULE, 0.45 ns, DMA240 DIMM-240
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| File Size |
311.94K /
20 Page |
View
it Online |
Download Datasheet |
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International Business Machines, Corp.
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| Part No. |
IBMB6M64734BGA
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| OCR Text |
...defines the column address (ca0-ca10) when sampled at the rising clock edge. in addition to the column address, ap is used to invoke autoprecharge operation at the end of the burst read or write cycle. if ap is high, autopre- charge is sele... |
| Description |
64Mx72 One Bank Registered DDR SDRAM Module(64Mx72 1组带寄存的双数据速率同步动态RAM模块) 64Mx72一个银行注册DDR SDRAM内存模块64Mx72一组带寄存的双数据速率同步动态内存模块）
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| File Size |
199.24K /
23 Page |
View
it Online |
Download Datasheet |
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