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Zarlink
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Part No. |
MT9041B
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OCR Text |
...Interfaces Selectable 1.544MHz, 2.048MHz or 8kHz input reference signals Provides C1.5, C2, C3, C4, C8 and C16 output clock signals Provides 3 different styles of 8 KHz framing pulses Attenuates wander from 1.9 Hz
DS5059 ISSUE 4 June 2000
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Description |
T1/E1 System Synchronizer
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File Size |
512.83K /
21 Page |
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Maxim
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Part No. |
DS26502DK
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OCR Text |
...
16 5 3 1 6 1 1 1 1 1 1 4 1 1 1 2 2 7 1 1 2 5 10
0.1mF 20%, 16V X7R ceramic capacitors (0603) 10mF 20%, 16V tantalum capacitors (B case) ...048MHz Oscillator, crystal clock, 3.3V, 1.544MHz
Panasonic Panasonic Panasonic Panasonic Panasoni... |
Description |
T1/E1/J1/64KCC Bits Element Design Kit
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File Size |
1,357.28K /
30 Page |
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it Online |
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MAXIM[Maxim Integrated Products]
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Part No. |
DS26502 DS26502LN DS26502L
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OCR Text |
...andard T1/J1 (1.544MHz) and E1 (2.048MHz) Interface to CMI-Coded T1/J1 and E1 Short- and Long-Haul Line Interface Transmit and Receive T1 and E1 SSM Messages with Message Validation T1/E1 Jitter Attenuator with Bypass Mode Fully Independent... |
Description |
T1/E1/J1/64KCC BITS Element
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File Size |
983.34K /
124 Page |
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it Online |
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ICS
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Part No. |
ICS843002-31
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OCR Text |
...ENUATOR
FEATURES
* Outputs: * 2 High frequency differential LVPECL outputs Output frequency: up to 700MHz * 1 LVCMOS/LVTTL VCXO PLL output...048MHz outputs) The 2.048MHz output frequency requirement is low enough that the FemtoClockTM circui... |
Description |
700MHz, FemtoClock? VCXO Based Frequency Translator and Jitter Attenuator
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File Size |
276.08K /
24 Page |
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it Online |
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Zarlink
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Part No. |
ZL30402
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OCR Text |
...uirements of G.813 Option 1 and 2 for SDH Equipment Clocks (SEC) Generates clocks for ST-BUS, DS1, DS2, DS3, OC-3, E1, E2, E3, STM-1 and 19....048MHz and 19.44MHz reference frequencies. Allows Hardware or Microprocessor control Pin compatible ... |
Description |
SONET/SDH Network Element PLL From old datasheet system
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File Size |
429.33K /
42 Page |
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it Online |
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Zarlink
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Part No. |
MT9125
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OCR Text |
.../O DSTi ENB1 ENB2
Transcoder 2
VDD
VSS
PWRDN
IC
MS1 MS2
A/ FORMAT
MS3 MS4
Figure 1 - Functional Block Diagram
8-...048MHz Clock output for ST-BUS applications. This clock is MCLK divided by 2 and inverted. The C2o o... |
Description |
CMOS Dual ADPCM Transcoder
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File Size |
190.50K /
17 Page |
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it Online |
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Zarlink
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Part No. |
ZL30409
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OCR Text |
...nterfaces Selectable 19.44 MHz, 2.048MHz, 1.544MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals Provides 5 styles of 8 KHz framing pulses Holdover frequency ... |
Description |
T1/E1 System Synchronizer with Stratum 3 Holdover
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File Size |
277.95K /
32 Page |
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it Online |
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Zarlink
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Part No. |
MT90226
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OCR Text |
... cell delineation
DS5664 Issue 2 November 2002
Ordering Information MT90225AG 384 Pin PBGA MT90226AG 384 Pin PBGA -40 to 85C TC and UNI ...048MHz ................................................................................................ |
Description |
16/8 Port TC PHY Device
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File Size |
747.48K /
91 Page |
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it Online |
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ZARLINK[Zarlink Semiconductor Inc]
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Part No. |
MT9045AN MT9045
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OCR Text |
...for 1,544 kbit/s interfaces and 2,048 kbit/s interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 1.544MHz, 2.048MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C16... |
Description |
Dual reference frequency selectable 3.3V Digital PLL with multiple clock outputs for T1/E1 (ITU-T G.812 type IV), Stratum( 3, 4, 4E) and STS-3/OC3 systems T1/E1/OC3 System Synchronizer
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File Size |
292.25K /
34 Page |
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it Online |
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Price and Availability
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